Patents by Inventor Lan Chang
Lan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973260Abstract: A light-transmitting antenna includes a substrate, a first and a second conductive pattern. The first and the second conductive pattern is disposed on a first and a second surface of the substrate respectively. The first conductive pattern includes a first feeder unit, a first and a second radiation unit, a first and a second coupling unit and a first parasitic unit. The first feeder unit is connected to the second radiation unit. The first and the second radiation unit are located between the first and the second coupling unit. One side and the other side of the first parasitic unit is connected to the second coupling unit and adjacent to the first coupling unit respectively. The second conductive pattern includes a second feeder unit, a third coupling unit, a second parasitic unit, and a fourth coupling unit.Type: GrantFiled: November 9, 2022Date of Patent: April 30, 2024Assignee: Industrial Technology Research InstituteInventors: Ruo-Lan Chang, Mei-Ju Lee, Cheng-Hua Tsai, Meng-Hsuan Chen, Wei-Chung Chen
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Publication number: 20240120656Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.Type: ApplicationFiled: December 22, 2022Publication date: April 11, 2024Applicant: Industrial Technology Research InstituteInventors: Meng-Hsuan Chen, Cheng-Hua Tsai, Mei-Ju Lee, Ruo-Lan Chang, Wei-Chung Chen
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Publication number: 20240020856Abstract: A system for processing video of a sporting activity is disclosed. The system comprises: a plurality of portable electronic devices, each of which comprises at least one camera for capturing video of the sporting activity; and one or more aggregated data processing devices. Each portable electronic device is configured to: generate, using its camera(s), video data representative of the sporting activity; perform processing of the video data to generate video analysis data; and transfer the video analysis data to the aggregated data processing device(s). The aggregated data processing device(s) are configured to perform processing of the video analysis data, so as to generate activity analysis data. Apparatus for holding a portable electronic device is also disclosed, which comprises a housing, within which the portable electronic device can be mounted and enclosed, and an active cooling system for cooling the portable electronic device.Type: ApplicationFiled: July 12, 2023Publication date: January 18, 2024Inventors: Kevin William KING, Rajiv Tharmeswaran MAHESWARAN, Tracey Chui Ping HO, Yu-Han CHANG, Alexa Chen Lan CHANG, Jeffrey Wayne SU
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Patent number: 11855185Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.Type: GrantFiled: March 10, 2021Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wen-Ju Chen, Chung-Ting Ko, Ya-Lan Chang, Ting-Gang Chen, Tai-Chun Huang, Chi On Chui
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Publication number: 20230395426Abstract: Provided is a conductive structure and a method for forming such a structure. The method includes forming a treatable layer by depositing a layer comprising a metal over a structure; performing a directional treatment process on a targeted portion of the treatable layer to convert the targeted portion to a material different from a non-targeted portion of the treatable layer, wherein the directional treatment process is selected from the group consisting of nitridation, oxidation, chlorination, carbonization; and selectively removing the non-targeted portion from the structure, wherein the targeted portion remains over the structure.Type: ApplicationFiled: June 1, 2022Publication date: December 7, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Hsiang Chao, Shu-Lan Chang, Ching-Yi Chen, Shih-Wei Yeh, Pei Shan Chang, Ya-Yi Cheng, Yu-Chen Ko, Yu-Shiuan Wang, Chun-Hsien Huang, Hung-Chang Hsu, Chih-Wei Chang, Ming-Hsing Tsai, Wei-Jung Lin
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Publication number: 20230395702Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.Type: ApplicationFiled: August 2, 2023Publication date: December 7, 2023Inventors: Wen-Ju Chen, Chung-Ting Ko, Ya-Lan Chang, Ting-Gang Chen, Tai-Chun Huang, Chi On Chui
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Publication number: 20230395689Abstract: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.Type: ApplicationFiled: July 25, 2023Publication date: December 7, 2023Inventors: Po-Chi Wu, Chai-Wei Chang, Jung-Jui Li, Ya-Lan Chang, Yi-Cheng Chao
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Publication number: 20230378325Abstract: Semiconductor device structure and methods of forming the same are described. The structure includes a dielectric layer disposed over an epitaxy source/drain region and a conductive feature disposed in the dielectric layer. The conductive feature includes a metal liner including a first material and a metal fill surrounded by the metal liner. The metal fill includes the first material having a first grain size. The conductive feature further includes a metal cap disposed on the metal liner and the metal fill, and the metal cap includes the first material having a second grain size different from the first grain size.Type: ApplicationFiled: May 23, 2022Publication date: November 23, 2023Inventors: Sheng-Hsuan LIN, Feng-Yu CHANG, Shu-Lan CHANG, I Lee, Chun-Yen LIAO
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Publication number: 20230317899Abstract: This disclosure relates to a transparent display that includes a transparent substrate, a plurality of wires, and a plurality of electronic components. The wires are disposed on the transparent substrate, and the wires have at least one serpentine part having a first end and a second end that are opposite to each other. There is an extending path formed from the first end to the second end. The electronic components are disposed on the plurality of wires. The wires have at least one part that surrounds an opening area and has a total extending length. The at least one part of the wires includes the at least one serpentine part. A ratio of a sum in length of the at least one serpentine part along the extending path to the total extending length is equal to or greater than 10%.Type: ApplicationFiled: August 11, 2022Publication date: October 5, 2023Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ying-Ting LIOU, Ruo-Lan CHANG, Wei-Chung CHEN, Hao Che KAO
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Patent number: 11764280Abstract: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.Type: GrantFiled: July 8, 2020Date of Patent: September 19, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Chi Wu, Chai-Wei Chang, Jung-Jui Li, Ya-Lan Chang, Yi-Cheng Chao
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Publication number: 20230277172Abstract: A shipping cover for a staple cartridge includes a body having an upper surface and a lower surface that is in close opposition to the staple cartridge when the shipping cover is secured to the staple cartridge. The shipping cover includes a latch that is received within a body of the staple cartridge to secure the shipping cover to the cartridge body. The latch is manually movable by a clinician to facilitate removal of the shipping cover from the staple cartridge.Type: ApplicationFiled: July 21, 2020Publication date: September 7, 2023Inventors: Lan Chang, Xiao Zhou, Hui Zhan, Jun Zhang
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Publication number: 20230260836Abstract: A method includes forming a dielectric layer over a source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the source/drain region. A conductive liner is formed on sidewalls and a bottom of the opening. A surface modification process is performed on an exposed surface of the conductive liner. The surface modification process forms a surface coating layer over the conductive liner. The surface coating layer is removed to expose the conductive liner. The conductive liner is removed from the sidewalls of the opening. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with a remaining portion of the conductive liner and the dielectric layer.Type: ApplicationFiled: May 13, 2022Publication date: August 17, 2023Inventors: Pei Shan Chang, Yi-Hsiang Chao, Chun-Hsien Huang, Peng-Hao Hsu, Kevin Lee, Shu-Lan Chang, Ya-Yi Cheng, Ching-Yi Chen, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
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Publication number: 20230119022Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.Type: ApplicationFiled: December 19, 2022Publication date: April 20, 2023Inventors: Po-Chi Wu, Chai-Wei Chang, Jung Jui Li, Ya-Lan Chang, Yi-Cheng Chao
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Publication number: 20230067539Abstract: A method is provided that includes forming a first metal layer of a seal structure over a micro-electromechanical system (MEMS) structure and over a channel formed through the MEMS structure to an integrated circuit of a semiconductor structure. The first metal layer is formed at a first temperature. The method includes forming a second metal layer over the first metal layer. The second metal layer is formed at a second temperature less than the first temperature. The method includes performing a first cooling process to cool the semiconductor structure.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Inventors: Kai-Lan CHANG, Yu-Lung Yeh, Yen-Hsiu Chen, Shuo Yen Tai, Yung-Hsiang Chen
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Patent number: 11581259Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.Type: GrantFiled: November 17, 2020Date of Patent: February 14, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Wei Chang, Chien-Shun Liao, Sung-Li Wang, Shuen-Shin Liang, Shu-Lan Chang, Yi-Ying Liu, Chia-Hung Chu, Hsu-Kai Chang
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Publication number: 20230018328Abstract: A method of manufacturing a catalyst article, the method comprising: providing an anionic complex comprising a PGM and a carboxylate ion; providing a support material; applying the anionic complex to the support material to form a loaded support material; disposing the loaded support material on a substrate; and heating the loaded support material to form nanoparticles of the PGM on the support material.Type: ApplicationFiled: July 11, 2022Publication date: January 19, 2023Inventors: Jochem Alex BLUM, Hsiao-Lan CHANG, Hai-Ying CHEN, Nicola COLLIS, Jennifer Marion GABRIELSSON, Gemma Louisa MOXHAM, Nicoleta MURESAN, Dongsheng QIAO, Emma SCHOFIELD, David THOMPSETT, Yaping WAN
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Publication number: 20230016515Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.Type: ApplicationFiled: July 28, 2022Publication date: January 19, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Wei Chang, Chien-Shun Liao, Sung-Li Wang, Shuen-Shin Liang, Shu-Lan Chang, Yi-Ying Liu, Chia-Hung Chu, Hsu-Kai Chang
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Patent number: 11532748Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.Type: GrantFiled: September 28, 2020Date of Patent: December 20, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Chi Wu, Chai-Wei Chang, Jung-Jui Li, Ya-Lan Chang, Yi-Cheng Chao
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Patent number: 11527685Abstract: An emitting device comprising a first light emitter adapted to emit a first radiation, and a second light emitter adapted to emit a second radiation different from the first radiation, the first light emitter comprising a first semiconducting structure and a first radiation converter, the second light emitter comprising a second semiconducting structure and a second radiation converter, each semiconducting structure comprising a semiconducting layer adapted to emit a third radiation, each radiation converter comprising a set of particles able to convert the third radiation into the first or second radiation, the particles of the first radiation converter being attached to a surface by a bulk of photosensitive resin and the particles of the second radiation converter being attached to a surface by grafting.Type: GrantFiled: June 27, 2019Date of Patent: December 13, 2022Assignee: AlediaInventors: Ying-Lan Chang, Sylvia Scaringella, Ivan-Christophe Robin, Abdelhay Aboulaich
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Publication number: 20220367193Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.Type: ApplicationFiled: July 27, 2022Publication date: November 17, 2022Inventors: Ya-Lan Chang, Ting-Gang Chen, Tai-Chun Huang, Chi On Chui, Yung-Cheng Lu