Abstract: According to the preferred embodiment, a method is provided for automatically coloring VLSI design elements for the purpose of assigning binary properties to the elements. The preferred method is particularly applicable for use generating phase shift mask designs from VLSI CAD datasets. The preferred method uses net coloring to automatically generate a data set of colored elements. The preferred method is not dependent on the order in which the elements are operated upon. The preferred method has the additional advantage of being able to automatically detect conflicts that prevent the VLSI design from being optimally colored. The preferred method is equally applicable to hierarchical VLSI databases with nested components and traditional flat databases. When applied the hierarchical databases, the preferred method provides element coloring with minimal data flattening required.

Abstract: A lithographic patterning method and mask set using a phase shift trim mask having mask dimensions increased in block size so as to remove previous exposure defects.

Abstract: A method and apparatus for correcting defects in a phase shift mask to be used in photolithography. More specifically, the method of the invention includes creating a second repair mask which contains phase shifters. Regions surrounding the defects on the first mask are made opaque. The design circuitry located in these defective regions is copied onto the second mask. During a second exposure the design circuitry is placed onto the semiconductor wafer. Therefore, this method and apparatus provides an inexpensive solution to a difficult problem.

Abstract: An efficient method for modifying a chip or package design allows for the creation of small shapes without excessive expansion of design data. A computer program takes a physical design, represented in a computer data file, and generates a modified version of the design in which fill holes have been added. Subsequently, when the modified design is processed, the resulting semiconductor chip or package will contain physical images of the added fill holes, with the effect of making local pattern density more uniform and hence reducing process-induced variations in feature size and shape.

Abstract: An apparatus implemented in a computer aided design (CAD) system automatically generates phase shifted mask designs for very large scale integrated (VLSI) chips from existing circuit design data. The system uses a series of basic geometric operations to design areas requiring phase assignment, resolve conflicting phase assignments, and eliminate unwanted phase edges. This apparatus allows automatic generation of phase shift mask data from any circuit design that allows for phase shifting. Since the dimensional input for all geometric operations is directly linked to the design ground rules given to the circuit designers, any designable circuit layout can also be phase shifted with this algorithm. The autogeneration of phase shift patterns around an existing circuit design is broken down into four major tasks: 1. Define areas that need a phase assignment; 2. Make a first pass phase assignment unique to each critical feature and define "runs" of interrelated critical features; 3.

Abstract: An optical proximity correction (OPC) routine that enhances the fidelity of VLSI pattern transfer operations such as photolithography and reactive ion etch (RIE) by predistorting the mask while biasing only critical features and eliminating, as much as possible, the creation of additional vertices. The OPC routine accomplishes corrections in a timely and cost effective manner on realistic data sets without causing unnecessary increase in data volume. The OPC method employs a series of shrink, expand and subtraction operations that separate complex computer aided design (CAD) data for a lithography mask or reticle into sets of basic rectangles. More particularly, the OPC method first identifies a plurality of gate regions in a CAD design. A plurality of design shapes in the CAD design are sorted according to geometric type. A plurality of sorted design shapes share at least one side with a second design shape. The sorted design shapes are then grouped according to width.

Abstract: An optical proximity correction (OPC) routine that enhances the fidelity of VLSI pattern transfer operations such as photolithography and reactive ion etch (RIE) by predistorting the mask while biasing only critical features and eliminating, as much as possible, the creation of additional vertices. The OPC routine accomplishes corrections in a timely and cost effective manner on realistic data sets without causing unnecessary increase in data volume. The OPC method employs a series of shrink, expand and subtraction operations that separate complex computer aided design (CAD) data for a lithography mask or reticle into sets of basic rectangles. More particularly, the OPC method first identifies a plurality of gate regions in a CAD design. A plurality of design shapes in the CAD design are sorted according to geometric type. A plurality of sorted design shapes share at least one side with a second design shape. The sorted design shapes are then grouped according to width.

Abstract: A process of phase edge lithography is employed in the manufacture of very large scale integrated (VLSI) chips in which chrome images are biased on a phase edge of a phase shift mask (PSM) and the mask overexposed to compensate for the positive bias. This overexposure eliminates any residual images from the phase edge mask with minimum impact to the desired images. This simple process results in a trim-less phase edge process that takes advantage of the improved resolution and process latitude of phase edge PSMs while avoiding layout impacts caused by a trim mask or other phase edge elimination methods.

Abstract: A method implemented in a computer aided design (CAD) system automatically generates phase shifted mask designs for very large scale integrated (VLSI) chips from existing circuit design data. The system uses a series of basic geometric operations to design areas requiring phase assignment, resolve conflicting phase assignments, and eliminate unwanted phase edges. This process allows automatic generation of phase shift mask data from any circuit design that allows for phase shifting. Since the dimensional input for all geometric operations is directly linked to the design ground rules given to the circuit designers, any designable circuit layout can also be phase shifted with this algorithm. The autogeneration of phase shift patterns around an existing circuit design is broken down into four major tasks: 1. Define areas that need a phase assignment; 2. Make a first pass phase assignment unique to each critical feature and define "runs" of interrelated critical features; 3.