Patents by Inventor Lawrence C. Gunn, III
Lawrence C. Gunn, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7397101Abstract: A horizontal germanium silicon heterostructure photodetector comprising a horizontal germanium p-i-n diode disposed over a horizontal parasitic silicon p-i-n diode uses silicon contacts for electrically coupling to the germanium p-i-n through the p-type doped and n-type doped regions in the silicon p-i-n without requiring direct physical contact to germanium material. The current invention may be optically coupled to on-chip and/or off-chip optical waveguide through end-fire or evanescent coupling. In some cases, the doping of the germanium p-type doped and/or n-type doped region may be accomplished based on out-diffusion of dopants in the doped silicon material of the underlying parasitic silicon p-i-n during high temperature steps in the fabrication process such as, the germanium deposition step(s), cyclic annealing, contact annealing and/or dopant activation.Type: GrantFiled: July 7, 2005Date of Patent: July 8, 2008Assignee: Luxtera, Inc.Inventors: Gianlorenzo Masini, Lawrence C. Gunn, III, Giovanni Capellini
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Patent number: 7378861Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of the wafer. A wafer level test system uses an optical probe to search for and align with an optical alignment loop. The test system uses a located alignment loop as a reference point to locate other devices on the wafer. The test system tests the operation of selected devices disposed on the wafer. The alignment loop is also used as a reference device for an adjacent device of unknown performance.Type: GrantFiled: February 26, 2007Date of Patent: May 27, 2008Assignee: Luxtera, Inc.Inventors: Roman Malendevich, Myles Sussman, Lawrence C. Gunn, III
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Patent number: 7340709Abstract: In a computer-assisted product development system comprising a processor and a storage, a software-implemented method for asserting design rules related to the manufacturability of optoelectronic devices comprising germanium. Design rules may be established for devices comprising germanium and/or germanium and silicon heterostructures, thereby enabling and/or enhancing the manufacturability of photodetectors comprising germanium in integrated CMOS devices according to standard and/or custom CMOS processes. In some cases, design rules may be established to define allowable ranges for geometrical parameters related to the shapes defined in one or more mask layers; in some cases, design rules may be established to define allowable ranges for geometrical parameters related to the dimensions of actually constructed devices.Type: GrantFiled: July 7, 2005Date of Patent: March 4, 2008Assignee: Luxtera, Inc.Inventors: Gianlorenzo Masini, Lawrence C. Gunn, III, Giovanni Capellini
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Patent number: 7298945Abstract: A polarization splitting grating coupler (PSGC) connects an optical signal from an optical element, such as a fiber, to an optoelectronic integrated circuit. The PSGC separates a received optical signal into two orthogonal polarizations and directs the two polarizations to separate waveguides on an integrated circuit. Each of the two separated polarizations can then be processed, as needed for a particular application, by the integrated circuit. A PSGC can also operate in the reverse direction, and couple two optical signals from an integrated circuit to two respective orthogonal polarizations of one optical output signal sent off chip to an optical fiber.Type: GrantFiled: March 17, 2006Date of Patent: November 20, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime J. Rattier, Jeremy Witzens
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Patent number: 7298939Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of a wafer. A wafer level test system uses optical and electronic probes to search for and align with an optoelectronic alignment structure. The test system uses a located optoelectronic alignment structure as a reference point to locate other devices on the wafer. The system tests the operation of selected devices disposed on the wafer. The optoelectronic alignment loop is also used as an alignment reference of known performance for an adjacent device of unknown performance.Type: GrantFiled: March 16, 2005Date of Patent: November 20, 2007Assignee: Luxtera, Inc.Inventors: Roman Malendevich, Myles Sussman, Lawrence C. Gunn III
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Patent number: 7262117Abstract: The present invention discloses an integration flow of germanium into a conventional CMOS process, with improvements in performing selective area growth, and implementing electrical contacts to the germanium, in a way that has minimal impact on the preexisting transistor devices. The present invention also provides methods to integrate the germanium without impacting the optical or electrical performance of these devices, except where intended, such as in a germanium photodetector, or germanium waveguide photodetector.Type: GrantFiled: February 22, 2005Date of Patent: August 28, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Giovanni Capellini, Gianlorenzo Masini
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Patent number: 7262852Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light from top of the wafer.Type: GrantFiled: November 14, 2005Date of Patent: August 28, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Roman Malendevich, Thierry J. Pinguet, Maxime Jean Rattier, Myles Sussman, Jeremy Witzens
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Patent number: 7260293Abstract: Various configurations of elongate scattering elements in an optical waveguide grating coupler for coupling light between a planar waveguide and an optical element such as an optical fiber, where the light may have a Gaussian intensity distribution. The elongate scattering elements are preferably curved, and in some embodiments, the scattering elements have elliptically curved shape. One or more of the elongate scattering elements may be segmented into various geometrical shapes, such as rectangular, square, circular and elliptical. The elongate scattering elements have at least one characteristic selected from the group consisting of grating width, height, spacing, depth and index of refraction forming the elongate scattering elements, where the magnitude of the at least one characteristic varies irregularly with position along the guiding portion of the optical waveguide grating coupler.Type: GrantFiled: December 6, 2005Date of Patent: August 21, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7260289Abstract: Various configurations of elongate scattering elements in an optical waveguide grating coupler for coupling light between a planar waveguide and an optical element such as an optical fiber, where the light may have a Gaussian intensity distribution. The elongate scattering elements are preferably curved, and in some embodiments, the scattering elements have elliptically curved shape. One or more of the elongate scattering elements may be segmented into various geometrical shapes, such as rectangular, square, circular and elliptical. The elongate scattering elements have at least one characteristic selected from the group consisting of grating width, height, spacing, depth and index of refraction forming the elongate scattering elements, where the magnitude of the at least one characteristic varies irregularly with position along the guiding portion of the optical waveguide grating coupler.Type: GrantFiled: February 10, 2004Date of Patent: August 21, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime J. Rattier
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Patent number: 7259031Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.Type: GrantFiled: November 8, 2005Date of Patent: August 21, 2007Assignee: Luxtera, Inc.Inventors: Alexander G. Dickinson, Lawrence C. Gunn, III, Philip M. Neches, Andrew Shane Huang
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Patent number: 7251386Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.Type: GrantFiled: January 14, 2004Date of Patent: July 31, 2007Assignee: Luxtera, IncInventors: Alexander G. Dickinson, Lawrence C. Gunn, III, Andrew Shane Huang, Philip M. Neches
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Patent number: 7251408Abstract: High speed optical modulators can be made of a lateral PN diode formed in a silicon optical rib waveguide, disposed on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Each of the doped regions can have a stepped or gradient doping profile within it or several doped sections with different doping concentrations. Forming the doped regions of a PN diode modulator with stepped or gradient doping profiles can optimize the trade off between the series resistance of the PN diode and the optical loss in the center of the waveguide due to the presence of dopants.Type: GrantFiled: April 5, 2006Date of Patent: July 31, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
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Patent number: 7251403Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: July 31, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7245803Abstract: An optical waveguide grating coupler for coupling light between a planar waveguide and an optical element such as an optical fiber. The optical waveguide grating coupler includes a grating comprising a plurality of elongate scattering elements. The optical waveguide grating coupler is preferably flared, and in various embodiments has hyperbolically shaped sidewalls. The elongate scattering elements are preferably curved, and in some embodiments, the scattering elements have elliptically curved shapes. Preferably, the elongated scattering elements have grating widths selected to accommodate the desired optical intensity distribution.Type: GrantFiled: February 10, 2004Date of Patent: July 17, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime J. Rattier
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Patent number: 7231105Abstract: An apparatus and method for splitting a received optical signal into its orthogonal polarizations and sending the two polarizations on separate dual integrated waveguides to other systems on chip for further signal processing. The present invention provides an apparatus and method for facilitating the processing of optical signals in planar waveguides received from optical fibers.Type: GrantFiled: March 17, 2006Date of Patent: June 12, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7224174Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of the wafer. A wafer level test system uses an optical probe to search for and align with an optical alignment loop. The test system uses a located alignment loop as a reference point to locate other devices on the wafer. The test system tests the operation of selected devices disposed on the wafer. The alignment loop is also used as a reference device for an adjacent device of unknown performance.Type: GrantFiled: December 17, 2004Date of Patent: May 29, 2007Assignee: Luxtera, Inc.Inventors: Roman Malendevich, Myles Sussman, Lawrence C. Gunn, III
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Patent number: 7218826Abstract: A standard CMOS process is used to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. FIG. 12 shows an active waveguide formed by a standard CMOS process on a five layer substrate. The waveguide is a silicon strip loaded waveguide with a three layer core made of a silicon strip on a silicon slab with a silicon dioxide layer between the strip and slab. The active waveguide has two doped regions in the silicon slab adjacent to and on either side of the waveguide. FIG. 12A is a table summarizing the elements of the waveguide of FIG. 12 and the CMOS transistors of FIGS. 1 and 2, which are formed from the same materials at the same time on the same silicon substrate. In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors.Type: GrantFiled: August 29, 2005Date of Patent: May 15, 2007Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Bing Li
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Patent number: 7203403Abstract: The index of refraction of waveguide structures can be varied by altering carrier concentration. The waveguides preferably comprise semiconductors like silicon that are substantially optically transmissive at certain wavelengths. Variation of the carrier density in these semiconductors may be effectuated by inducing an electric field within the semiconductor for example by apply a voltage to electrodes associated with the semiconductor. Variable control of the index of refraction may be used to implement a variety of functionalites including, but not limited to, tunable waveguide gratings and resonant cavities, switchable couplers, modulators, and optical switches.Type: GrantFiled: April 7, 2005Date of Patent: April 10, 2007Assignee: California Institute of TechnologyInventor: Lawrence C. Gunn, III
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Patent number: 7194166Abstract: A group of waveguide grating couplers is disposed on a semiconductor substrate. The grating couplers are all within a spot illuminated on the substrate by a light from an optical fiber. The light propagating in the fiber is wavelength division multiplexed (WDM) and consists of several channels. Within the group of grating couplers, at least one grating coupler is designed to be tuned to each of the channels. The group of grating couplers demultiplexes the channels propagating in the fiber. A group of waveguide grating couplers can also be used to multiplex several channels of light into an optical fiber. Single mode and multimode fiber can be used to carry the multiplexed channels of light in an optical multiplexing and demultiplexing system.Type: GrantFiled: August 26, 2005Date of Patent: March 20, 2007Assignee: Luxtera, Inc.Inventor: Lawrence C. Gunn, III
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Patent number: 7184626Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light from top of the wafer.Type: GrantFiled: April 7, 2004Date of Patent: February 27, 2007Assignee: Luxtera, IncInventors: Lawrence C. Gunn, III, Roman Malendevich, Thierry J. Pinguet, Maxime J. Rattier, Myles Sussman, Jeremy Witzens