Abstract: The present invention provides an inter-frequency neighboring cell proximity detection method, an inter-frequency neighboring cell measurement method, a radio network controller, and user equipment. In this method, a signal of an intra-frequency cell of a current serving cell of a user equipment is measured, a measurement result is compared with proximity detection information of an inter-frequency neighboring cell, and reporting may be performed when the information is met.

Abstract: The present disclosure relates to an integrated circuit (IC) that includes a high-k metal gate (HKMG) non-volatile memory (NVM) device and that provides small scale and high performance, and a method of formation. In some embodiments, the integrated circuit includes a logic region and an embedded memory region disposed adjacent to the logic region. The logic region has a logic device disposed over a substrate and including a first metal gate disposed over a first high-k gate dielectric layer. The memory region has a non-volatile memory (NVM) device including a second metal gate disposed over a second high-k gate dielectric layer. By having HKMG structures in both the logic region and the memory region, IC performance is improved and further scaling becomes possible in emerging technology nodes.

Abstract: The present disclosure relates to an integrated circuit (IC) that includes a high-k metal gate (HKMG) non-volatile memory (NVM) device and that provides small scale and high performance, and a method of formation. In some embodiments, the integrated circuit includes a logic region having a logic device disposed over a substrate and including a first metal gate disposed over a first high-k gate dielectric layer and an embedded memory region disposed adjacent to the logic region. The embedded memory region has a split gate flash memory cell including a select gate and a control gate. The control gate or the select gate is a metal gate separated from the substrate by a second high-k gate dielectric layer. By having HKMG structures in both the logic region and the memory region, IC performance is improved and further scaling becomes possible in emerging technology nodes.

Abstract: A Universal Serial Bus (USB) dock is provided. The USB dock includes: a plurality of downstream ports; and a upstream port, connecting the USB dock to a portable device, wherein the upstream port includes an On-the-go (OTG) ID pin and a differential pair; and a microcontroller, configured to detect operating states of the portable device, wherein when it is detected that the portable device is in a USB OTG host mode and has entered a suspend state, the microcontroller controls the portable device to switch from the USB OTG host mode to a USB device mode by toggling a state of the USB OTG ID pin, thereby charging the portable device via the upstream port.

Abstract: A method for enabling one or more nodes to communicate with an access point (AP) according to a CSMA/CA protocol is provided. In one embodiment of the method, when the individual node enters into a state of having at least one packet of data to be transmitted to the AP, the individual node waits for a non-zero deterministic delay so that any packet arrived during the delay is allowed to be aggregated and transmitted upon one transmission opportunity, thereby improving channel utilization. The delay is determined such that a predicted system throughput is maximized. It is found that the system throughput is significantly affected by the relationship between the delay and the number of the one or more nodes. Hence, the delay is advantageously determined according to the number of the one or more nodes. After the delay expires, the individual node initiates a contending procedure.

Abstract: In widely deployed wireless “hot-spot” networks, nodes frequently join or leave, inelastic/elastic and saturated/non-satuarted flows coexist. In such dynamic and diverse environments, it is challenging to maximize the channel utilization while providing satisfactory user experiences. In this invention, one proposes a novel contention-on-demand (CoD) MAC scheme to address this problem. The CoD scheme consists of a fixed-CW algorithm, a dynamic-CW algorithm, and an admission control unit. The fixed-CW algorithm allows elastic flows to access limited system bandwidth; the dynamic-CW algorithm enables inelastic flows to contend for channel on demand and quickly adapt to network change; and the admission control unit rejects overloaded traffic for providing good user experiences. One then performs an asymptotic analysis to develop a simple but efficient admission control rule. Finally, extensive simulations verify that the scheme is very effective and the theoretical result is very accurate.

Abstract: Systems and methods for rendering dynamic content when converting a website to its static representation. A set of commands may be created with a syntax using the data attribute in HTML 5. Web designers may inject these attributes into the code of the webpages without affecting how the webpages will render in any browser that supports HTML 5. A specific and documented set of data attributes may indicate that the given element is a type of dynamic content. These data attributes will also indicate how to handle the dynamic elements such that a static representation of each visual state rendered in the browser may be generated accordingly.

Abstract: A three-level rectifier includes at least one phase bridge arm that includes an upper-half and a lower-half bridge arm circuit modules. The upper-half bridge arm circuit module includes a first diode unit and a second diode unit that are in series connection, and a first power semiconductor switch unit. The lower-half bridge arm circuit module includes a third diode unit and a fourth diode unit that are in series connection, and a second power semiconductor switch unit. These first and second power semiconductor switch units are connected to the neutral point of the capacitor unit; the second diode unit and the third diode unit are connected to the alternating-current terminal; the first diode unit and the fourth diode unit are respectively connected to the positive terminal and negative terminal of the direct-current bus. The two circuit modules are disposed side by side and facing each other.

Abstract: The present disclosure relates to an integrated circuit (IC) that includes a high-k metal gate (HKMG) non-volatile memory (NVM) device and that provides small scale and high performance, and a method of formation. In some embodiments, the integrated circuit includes a logic region and an embedded memory region disposed adjacent to the logic region. The logic region has a logic device disposed over a substrate and including a first metal gate disposed over a first high-k gate dielectric layer. The memory region has a non-volatile memory (NVM) device including a second metal gate disposed over a second high-k gate dielectric layer. By having HKMG structures in both the logic region and the memory region, IC performance is improved and further scaling becomes possible in emerging technology nodes.

Abstract: The present disclosure relates to an integrated circuit (IC) that includes a high-k metal gate (HKMG) non-volatile memory (NVM) device and that provides small scale and high performance, and a method of formation. In some embodiments, the integrated circuit includes a logic region having a logic device disposed over a substrate and including a first metal gate disposed over a first high-k gate dielectric layer and an embedded memory region disposed adjacent to the logic region. The embedded memory region has a split gate flash memory cell including a select gate and a control gate. The control gate or the select gate is a metal gate separated from the substrate by a second high-k gate dielectric layer. By having HKMG structures in both the logic region and the memory region, IC performance is improved and further scaling becomes possible in emerging technology nodes.

Abstract: Embodiments of the present invention provide a method includes: receiving, by a base station, a long DRX parameter sent by an RNC, where the long DRX parameter includes at least two of a cycle length of a long DRX cycle, a long DRX on length and a long DRX off length; determining, when the UE enters the CELL-FACH state, by the base station, and according to a first timer and a first preset duration corresponding to the first timer, that the UE enters the long DRX cycle; and determining, when the UE enters the long DRX cycle, by the base station, and according to the H-RNTI of the UE, the cycle length of the long DRX cycle and the long DRX on length, a radio subframe on which long DRX on of the UE is in the long DRX cycle.

Abstract: A method for implementing a packet I/O engine on a programmable computing platform is provided, where the engine performs I/O functions for plural threads generated by a plurality of user applications. In the method, the platform is configured such that only one thread is permitted to initialize and configure the resources. Furthermore, I/O-device queues each for buffering packets either transmitted to or received from an individual external I/O device are set up. For a plurality of unsafe I/O-device queues determined, among the I/O-device queues, to be multi-thread unsafe, a plurality of multi-producer, multi-consumer software queues for buffering packets delivered between the plurality of the unsafe I/O-device queues and the plurality of user applications is set up.

Abstract: Compute-intensive packet processing (CIPP) in a computer system comprising a programmable computing platform is accelerated by using a packet I/O engine, implemented on the platform, to perform packet I/O functions, where the packet I/O engine is configured to achieve direct access to a network interface card (NIC) from a user application. For a Linux-based computer system, standard I/O mechanisms of Linux are bypassed and only the packet I/O engine is used in performing the I/O functions. Furthermore, the computer system is configured to: process a batch of packets, instead of packet by packet, in every function call; and when moving a packet between a buffer of an individual user application and a queue of the packet I/O engine, copy a packet descriptor of the packet instead the entire packet. In addition, workflows across different working threads are balanced and parallelism is exploited to fully utilize resources of the platform.

Abstract: The disclosure provides a power converter including a cabinet, a first converter circuit module, a second converter circuit module, and a DC capacitor module. The first converter circuit module includes at least one first bridge arm. The second converter circuit module includes at least one second bridge arm. The first converter circuit module, the second converter circuit module, and the DC capacitor module are disposed in the cabinet. The second bridge arm and the first bridge arm are arranged side by side in parallel. The DC capacitor module is electrically connected between the first bridge arm and the second bridge arm, so that the first bridge arm and the second bridge arm share the DC capacitor module.

Abstract: In widely deployed wireless “hot-spot” networks, nodes frequently join or leave, inelastic/elastic and saturated/non-satuarted flows coexist. In such dynamic and diverse environments, it is challenging to maximize the channel utilization while providing satisfactory user experiences. In this invention, one proposes a novel contention-on-demand (CoD) MAC scheme to address this problem. The CoD scheme consists of a fixed-CW algorithm, a dynamic-CW algorithm, and an admission control unit. The fixed-CW algorithm allows elastic flows to access limited system bandwidth; the dynamic-CW algorithm enables inelastic flows to contend for channel on demand and quickly adapt to network change; and the admission control unit rejects overloaded traffic for providing good user experiences. One then performs an asymptotic analysis to develop a simple but efficient admission control rule. Finally, extensive simulations verify that the scheme is very effective and the theoretical result is very accurate.

Abstract: A method for enabling one or more nodes to communicate with an access point (AP) according to a CSMA/CA protocol is provided. In one embodiment of the method, when the individual node enters into a state of having at least one packet of data to be transmitted to the AP, the individual node waits for a non-zero deterministic delay so that any packet arrived during the delay is allowed to be aggregated and transmitted upon one transmission opportunity, thereby improving channel utilization. The delay is determined such that a predicted system throughput is maximized. It is found that the system throughput is significantly affected by the relationship between the delay and the number of the one or more nodes. Hence, the delay is advantageously determined according to the number of the one or more nodes. After the delay expires, the individual node initiates a contending procedure.

Abstract: Disclosed herein are methods and compositions for the identification of teloRNA marks to assess the differentiation status of an individual stem cell or a population of stem cells, to diagnose whether and to what extent a stem cell or stem cell culture has already initiated cell differentiation, and to monitor the differentiation status of an individual stem cell or a stem cell culture during passage. The use of these methods and compositions to monitor the pluripotency and differentiation status of a stem cell or stem cell culture during differentiation enables the identification of undifferentiated and pluripotent stem cells prior to the initiation of differentiation.

Abstract: A method and a device for processing a random access parameter, so as to properly adjust the random access parameter and improve a success rate of random access includes receiving a random access report of a first cell reported by one or more user terminals, where a random access detection item recorded in the random access report includes: at least one of number of times of preamble cycles in each random access, a reason for preamble transmission failure within each preamble cycle period and a random access delay; performing random access detection item statistics according to the random access report and obtaining a statistical value, if the statistical value reaches a preset threshold, adjusting the random access parameter of the first cell; and issuing the adjusted random access parameter to a user terminal belonging to the first cell.

Abstract: A five-level rectifier includes at least one phase bridge arm that includes an upper-half and a lower-half bridge arm circuit modules. The upper-half bridge arm circuit module includes a first power semiconductor switch unit, a second power semiconductor switch unit, a first diode unit, a second diode unit, a first connecting busbar, a first insulated wire and a first transfer busbar; the lower-half bridge arm circuit module includes a third power semiconductor switch unit, a fourth power semiconductor switch unit, a third diode unit, a fourth diode unit, a second connecting busbar, a second insulated wire and a second transfer busbar. The two modules are disposed side by side and facing each other.

Abstract: The present invention discloses a method and an apparatus for obtaining terminal minimization of drive-tests data, relates to the field of communication technologies, and solves a problem that when determining, according to minimization of drive-tests (MDT) data, that a current operating status of a network is abnormal, an operation, maintenance and administration (OAM) cannot accurately determine whether the abnormality of the network is caused by a terminal or the network itself since the MDT data received by the OAM does not include an identity of the terminal. The method includes: obtaining MDT data measured by a terminal and an identity of the terminal; and reporting the MDT data measured by the terminal and the identity of the terminal to an OAM. Embodiments of the present invention are mainly applied to a process of obtaining terminal minimization of drive-tests data.