Patents by Inventor Li-Qun Xia

Li-Qun Xia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080146007
    Abstract: A method for forming a compressive stress carbon-doped silicon nitride layer is provided. The method includes forming an initiation layer and a bulk layer thereon, wherein the bulk layer has a compressive stress of between about ?0.1 GPa and about ?10 GPa. The initiation layer is deposited from a gas mixture that includes a silicon and carbon-containing precursor and optionally a nitrogen and/or source but does not include hydrogen gas. The bulk layer is deposited from a gas mixture that includes a silicon and carbon-containing precursor, a nitrogen source, and hydrogen gas. The initiation layer is a thin layer that allows good transfer of the compressive stress of the bulk layer therethrough to an underlying layer, such as a channel of a transistor.
    Type: Application
    Filed: December 14, 2006
    Publication date: June 19, 2008
    Inventors: Mihaela Balseanu, Victor T. Nguyen, Li-Qun Xia, Vladimir Zubkov, Derek R. Witty, Hichem M'Saad
  • Publication number: 20080132087
    Abstract: A method for providing a dielectric film having enhanced adhesion and stability. The method includes a post deposition treatment that densifies the film in a reducing atmosphere to enhance stability if the film is to be cured ex-situ. The densification generally takes place in a reducing environment while heating the substrate. The densification treatment is particularly suitable for silicon-oxygen-carbon low dielectric constant films that have been deposited at low temperature.
    Type: Application
    Filed: January 11, 2008
    Publication date: June 5, 2008
    Applicant: Applied Materials, Inc.
    Inventors: Li-Qun Xia, Frederic Gaillard, Ellie Yieh, Tian H. Lim
  • Publication number: 20080099920
    Abstract: Embodiments in accordance with the present invention relate to multi-stage curing processes for chemical vapor deposited low K materials. In certain embodiments, a combination of electron beam irradiation and thermal exposure steps may be employed to control selective outgassing of porogens incorporated into the film, resulting in the formation of nanopores. In accordance with one specific embodiment, a low K layer resulting from reaction between a silicon-containing component and a non-silicon containing component featuring labile groups, may be cured by the initial application of thermal energy, followed by the application of radiation in the form of an electron beam.
    Type: Application
    Filed: October 22, 2007
    Publication date: May 1, 2008
    Applicant: APPLIED MATERIALS, INC. A Delaware corporation
    Inventors: Francimar Schmitt, Yi Zheng, Kang Yim, Sang Ahn, Lester D'Cruz, Dustin Ho, Alexandros Demos, Li-Qun Xia, Derek Witty, Hichem M'Saad
  • Patent number: 7326657
    Abstract: A method for providing a dielectric film having enhanced adhesion and stability. The method includes a post deposition treatment that densifies the film in a reducing atmosphere to enhance stability if the film is to be cured ex-situ. The densification generally takes place in a reducing environment while heating the substrate. The densification treatment is particularly suitable for silicon-oxygen-carbon low dielectric constant films that have been deposited at low temperature.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: February 5, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Li-Qun Xia, Frederic Gaillard, Ellie Yieh, Tian H. Lim
  • Publication number: 20080020591
    Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.
    Type: Application
    Filed: June 13, 2007
    Publication date: January 24, 2008
    Applicant: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
  • Publication number: 20080014761
    Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 17, 2008
    Inventors: Ritwik Bhatia, Li-Qun Xia, Chad Peterson, Hichem M'Saad
  • Patent number: 7319068
    Abstract: A method is provided for processing a substrate including providing a processing gas comprising an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: January 15, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Li-Qun Xia, Ping Xu, Louis Yang
  • Publication number: 20070287301
    Abstract: Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed form the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.
    Type: Application
    Filed: March 30, 2007
    Publication date: December 13, 2007
    Inventors: Huiwen Xu, Mei-Yee Shek, Li-Qun Xia, Amir Al-Bayati, Derek Witty, Hichem M'Saad
  • Publication number: 20070281497
    Abstract: Methods are provided for processing a substrate comprising a bilayer barrier film thereon. In one aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and ultraviolet curing the dielectric layer. In another aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and curing the dielectric layer with an electron beam treatment.
    Type: Application
    Filed: May 21, 2007
    Publication date: December 6, 2007
    Inventors: Yijun Liu, Huiwen Xu, Li-Qun Xia, Chad Peterson, Hichem M'saad
  • Publication number: 20070275569
    Abstract: One embodiment of the present invention is a method for fabricating a dielectric film, comprising chemical vapor depositing a dielectric film, and curing the dielectric film, wherein the dielectric film comprises silicon and carbon, and the chemical vapor depositing utilizes a precursor comprising one or more organo-silicon compounds and one or more carbon-carbon bond containing hydrocarbon compounds.
    Type: Application
    Filed: August 14, 2007
    Publication date: November 29, 2007
    Inventors: FARHAD MOGHADAM, Jun Zhao, Timothy Weidman, Rick Roberts, Li-Qun Xia, Alexandros Demos
  • Publication number: 20070232082
    Abstract: A method of forming a layer on a substrate in a chamber, wherein the substrate has at least one formed feature across its surface, is provided. The method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas.
    Type: Application
    Filed: January 30, 2007
    Publication date: October 4, 2007
    Inventors: Mihaela Balseanu, Meiyee Shek, Li-Qun Xia, Hichem M'Saad
  • Publication number: 20070232071
    Abstract: Methods of controlling the step coverage and pattern loading of a layer on a substrate are provided. The dielectric layer may be a silicon nitride, silicon oxide, or silicon oxynitride layer. The method comprises depositing a dielectric layer on a substrate having at least one formed feature across a surface of the substrate and etching the dielectric layer with a plasma from oxygen or a halogen-containing gas to provide a desired profile of the dielectric layer on the at least one formed feature. The deposition of the dielectric layer and the etching of the dielectric layer may be repeated for multiple cycles to provide the desired profile of the dielectric layer.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 4, 2007
    Inventors: Mihaela Balseanu, Li-Qun Xia, Mei-Yee Shek, Hichem M'Saad
  • Publication number: 20070202640
    Abstract: A method of forming source and drain regions in a semiconductor transistor. The method includes the steps of forming a first sidewall spacer on sidewall surfaces of a gate electrode that is formed on an underlying substrate, where the first sidewall spacer includes amorphous carbon. The method may also include implanting the source and drain regions in the semiconductor substrate, and removing the first sidewall spacer before annealing the source and drain regions. The method may still further include forming a second sidewall spacer on the sidewall surfaces of the gate electrode, where the second sidewall spacer has a k-value less than 4. Also, a method to enhance conformality of a sidewall spacer layer. The method may include the steps of pulsing a radio-frequency power source to generate periodically a plasma, and depositing the plasma on sidewall surfaces of a gate electrode to form the sidewall spacer layer.
    Type: Application
    Filed: February 28, 2006
    Publication date: August 30, 2007
    Applicant: Applied Materials, Inc.
    Inventors: Amir Al-Bayati, Reza Arghavani, Mei-Yee Shek, Li-Qun Xia, Mihaela Balseanu, Bok Kim, Michael Cox, Chad Peterson, Hichem M'Saad
  • Patent number: 7253123
    Abstract: A method for forming sidewall spacers on a gate stack by depositing one or more layers of silicon containing materials using PECVD process(es) on a gate structure to produce a spacer having an overall k value of about 3.0 to about 5.0. The silicon containing materials may be silicon carbide, oxygen doped silicon carbide, nitrogen doped silicon carbide, carbon doped silicon nitride, nitrogen doped silicon oxycarbide, or combinations thereof. The deposition is performed in a plasma enhanced chemical vapor deposition chamber and the deposition temperature is less than 450° C. The sidewall spacers so produced provide good capacity resistance, as well as excellent structural stability and hermeticity.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: August 7, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Reza Arghavani, Michael Chiu Kwan, Li-Qun Xia, Kang Sub Yim
  • Patent number: 7244672
    Abstract: A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing fluorocarbon gas. The hydrogen-containing fluorocarbon gas may be used to selectively etch an organosilicate layer formed on a silicon oxide stop etch layer when fabricating a damascene structure.
    Type: Grant
    Filed: March 9, 2005
    Date of Patent: July 17, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Huong Thanh Nguyen, Michael Scott Barnes, Li-Qun Xia, Mehul Naik
  • Publication number: 20070141855
    Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.
    Type: Application
    Filed: February 26, 2007
    Publication date: June 21, 2007
    Inventors: Francimar Schmitt, Li-Qun Xia, Son Nguyen, Shankar Venkataraman
  • Patent number: 7229911
    Abstract: Methods are provided for processing a substrate for depositing an adhesion layer between a conductive material and a dielectric layer. In one aspect, the invention provides a method for processing a substrate including positioning a substrate having a conductive material disposed thereon, introducing a reducing compound or a silicon based compound, exposing the conductive material to the reducing compound or the silicon based compound, and depositing a silicon carbide layer without breaking vacuum.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: June 12, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Nagarajan Rajagopalan, Meiyee Shek, Albert Lee, Annamalai Lakshmanan, Li-Qun Xia, Zhenjiang Cui
  • Patent number: 7226876
    Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: June 5, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Francimar Campana Schmitt, Li-Qun Xia, Son Van Nguyen, Shankar Venkataraman
  • Publication number: 20070079753
    Abstract: A method of forming a graded dielectric layer on an underlying layer including flowing a mixture of a silicon-carbon containing gas, an oxygen containing gas and a carrier gas through a showerhead comprising a blocking plate and a faceplate to form an oxide rich portion of the graded dielectric layer, where the silicon-carbon containing gas has an initial flow rate, flowing the silicon-carbon containing gas at a first intermediate flow rate for about 0.5 seconds or longer, where the first intermediate flow rate is higher than the initial flow rate, and flowing the silicon-carbon containing gas at a fastest flow rate higher than the first intermediate flow rate to form a carbon rich portion of the graded dielectric layer.
    Type: Application
    Filed: December 8, 2006
    Publication date: April 12, 2007
    Applicant: Applied Materials, Inc.
    Inventors: Deenesh Padhi, Sohyun Park, Ganesh Balasubramanian, Juan Rocha-Alvarez, Li-Qun Xia, Derek Witty, Hichem M'Saad
  • Patent number: 7183201
    Abstract: A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing fluorocarbon gas. The hydrogen-containing fluorocarbon gas may be used to selectively etch an organosilicate layer formed on a silicon oxide stop etch layer when fabricating a damascene structure.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: February 27, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Huong Thanh Nguyen, Michael Scott Barnes, Li-Qun Xia, Mehul Naik