Patents by Inventor Li TING

Li TING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250254906
    Abstract: A method includes a number of operations. A semiconductor fin is formed and extends from a substrate. A dummy gate structure is formed across the semiconductor fin. An exposed surface of the gate layer is converted into a surface modification layer over the gate layer. Source/drain regions are formed on the semiconductor fin. The dummy gate structure is removed. A gate structure is formed over the semiconductor fin and extends between the source/drain regions and in the surface modification layer.
    Type: Application
    Filed: February 6, 2024
    Publication date: August 7, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Kang HO, Tsai-Yu Huang, Li-Ting Wang, Chi On CHUI
  • Patent number: 12369394
    Abstract: In an embodiment, a method includes forming a plurality of fins adjacent to a substrate, the plurality of fins comprising a first fin, a second fin, and a third fin; forming a first insulation material adjacent to the plurality of fins; reducing a thickness of the first insulation material; after reducing the thickness of the fist insulation material, forming a second insulation material adjacent to the first insulation material and the plurality of fins; and recessing the first insulation material and the second insulation material to form a first shallow trench isolation (STI) region.
    Type: Grant
    Filed: April 25, 2024
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Szu-Ying Chen, Sen-Hong Syue, Li-Ting Wang, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 12362285
    Abstract: An alignment structure for a semiconductor device and a method of forming same are provided. A method includes forming an isolation region over a substrate and forming an alignment structure over the isolation region. Forming the alignment structure includes forming a sacrificial gate electrode layer over the substrate and the isolation region. The sacrificial gate electrode layer is patterned to form a plurality of first sacrificial gates over the isolation region. At least one of the plurality of first sacrificial gates is reshaped. The at least one of the plurality of first sacrificial gates is disposed at an edge of the alignment structure in a plan view. A sidewall of the at least one of the plurality of first sacrificial gates comprises a notch at an interface between the at least one of the plurality of first sacrificial gates and the isolation region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: July 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Sheng Lai, Wei-Chung Sun, Li-Ting Chen, Kuei-Yu Kao, Chih-Han Lin
  • Patent number: 12349435
    Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.
    Type: Grant
    Filed: February 13, 2024
    Date of Patent: July 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: De-Fang Chen, Teng-Chun Tsai, Cheng-Tung Lin, Li-Ting Wang, Chun-Hung Lee, Ming-Ching Chang, Huan-Just Lin
  • Publication number: 20250139226
    Abstract: An automatic system updating apparatus and method are provided, which identifies the event of system update and collects the updating results to the allowlist. The apparatus determines whether at least one pending event intercepted from a file system belongs to a system update event based on a plurality of update rules. The apparatus executes the at least one pending event and generates at least one executable file corresponding to the at least one pending event in response to the at least one pending event belonging to the system update event, and the new generated at least one executable file is not included in an allowlist. The apparatus adds the at least one executable file corresponding to the at least one pending event to the allowlist based on a security setting.
    Type: Application
    Filed: October 24, 2024
    Publication date: May 1, 2025
    Inventors: Tzi-Cker CHIUEH, Lap-Chung LAM, Li-Ting HUANG, Hsuan-Lin CHENG, Xu-Kang WU, Dong-Shen WU
  • Publication number: 20250131731
    Abstract: An electronic device for assisting driver in recording images is introduced. In the electronic device, a panoramic camera unit is installed on a transportation vehicle to capture an initial video. A positioning unit detects a real-time location of the transportation vehicle. A database stores scenic spot information including multiple scenic spot locations. An intelligence processing unit receives the initial video and uses artificial intelligence to identify a user's image and an image of the scenic spot to be locked at the scenic spot location. The intelligence processing unit receives the real-time location and determines the direction of travel. The intelligence processing unit reads the scenic spot information and determines a viewing range of the transportation vehicle entering the scenic spot location based on the real-time location and the direction of travel to capture a time period within the viewing range from the initial video and crop a recorded video.
    Type: Application
    Filed: September 20, 2024
    Publication date: April 24, 2025
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: WEN-TING TSAI, LI-TING HUANG, FU-CHEN HSU, YANG-ZHENG OU, WEI-JUN WANG, MING-HSIEN WU
  • Publication number: 20250129212
    Abstract: A porous film is formed by reacting polyamic acid and multi-isocyanate, and the polyamic acid is formed by reacting 1 to 20 parts by mole of (a1) first diamine having a hydroxyl group, 80 to 99 parts by mole of (a2) second diamine without any hydroxyl group, and 100 parts by mole of (b) dianhydride. The multi-isocyanate and (b) dianhydride have a molar ratio of 0.25:100 to 20:100. The porous film has an average pore size of 500 nm to 2000 nm.
    Type: Application
    Filed: March 15, 2024
    Publication date: April 24, 2025
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Li-Ting HUANG, Tzong-Ming LEE
  • Publication number: 20250107207
    Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.
    Type: Application
    Filed: December 9, 2024
    Publication date: March 27, 2025
    Inventors: Chi-Sheng LAI, Wei-Chung SUN, Yu-Bey WU, Yuan-Ching PENG, Yu-Shan LU, Li-Ting CHEN, Shih-Yao LIN, Yu-Fan PENG, Kuei-Yu KAO, Chih-Han LIN, Jing Yi YAN, Pei-Yi LIU
  • Publication number: 20250096233
    Abstract: A manufacturing method of a lithium battery negative electrode includes the following. A copper foil is providing. An electroplating process is performed to form a lithium deposition layer on the copper foil. An electrolyte solution used in the electroplating process includes an organic solvent and fluorine-containing lithium salt. The organic solvent includes ester solvents, ether solvents, alcohol solvents, or combinations thereof, and the fluorine-containing lithium salt includes LiPF6, LiFSI, LiTF, LiDFOB, LiTFSI, or combinations thereof.
    Type: Application
    Filed: October 24, 2023
    Publication date: March 20, 2025
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Chun-Che Tsao, Li-Ting Wang
  • Publication number: 20250001044
    Abstract: Tissue compositions and methods of preparation thereof are provided. The tissue compositions can be used to treat or regenerate muscle tissue. The compositions can be configured to provide increased strength compared to other muscle matrices.
    Type: Application
    Filed: May 6, 2024
    Publication date: January 2, 2025
    Inventors: Li Ting Huang, Eric Stec, Nathaniel Bachrach, Hui Xu
  • Patent number: 12166096
    Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Sheng Lai, Yu-Fan Peng, Li-Ting Chen, Yu-Shan Lu, Yu-Bey Wu, Wei-Chung Sun, Yuan-Ching Peng, Kuei-Yu Kao, Shih-Yao Lin, Chih-Han Lin, Pei-Yi Liu, Jing Yi Yan
  • Publication number: 20240395871
    Abstract: In an embodiment, a device includes: a gate structure on a channel region of a substrate; a gate mask on the gate structure, the gate mask including a first dielectric material and an impurity, a concentration of the impurity in the gate mask decreasing in a direction extending from an upper region of the gate mask to a lower region of the gate mask; a gate spacer on sidewalls of the gate mask and the gate structure, the gate spacer including the first dielectric material and the impurity, a concentration of the impurity in the gate spacer decreasing in a direction extending from an upper region of the gate spacer to a lower region of the gate spacer; and a source/drain region adjoining the gate spacer and the channel region.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Wei-Ting Chien, Wen-Yen Chen, Li-Ting Wang, Su-Hao Liu, Liang-Yin Chen, Huicheng Chang
  • Publication number: 20240390554
    Abstract: Disclosed herein are muscle implants and methods of making muscle implants comprising one or more decellularized muscle matrices. The muscle matrices can be provided in a particulate form suitable for injection or implantation.
    Type: Application
    Filed: February 21, 2024
    Publication date: November 28, 2024
    Inventors: Hui Xu, Eric Stec, Li Ting Huang
  • Patent number: 12154949
    Abstract: In an embodiment, a device includes: a gate structure on a channel region of a substrate; a gate mask on the gate structure, the gate mask including a first dielectric material and an impurity, a concentration of the impurity in the gate mask decreasing in a direction extending from an upper region of the gate mask to a lower region of the gate mask; a gate spacer on sidewalls of the gate mask and the gate structure, the gate spacer including the first dielectric material and the impurity, a concentration of the impurity in the gate spacer decreasing in a direction extending from an upper region of the gate spacer to a lower region of the gate spacer; and a source/drain region adjoining the gate spacer and the channel region.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: November 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Ting Chien, Wen-Yen Chen, Li-Ting Wang, Su-Hao Liu, Liang-Yin Chen, Huicheng Chang
  • Publication number: 20240387397
    Abstract: An alignment structure for a semiconductor device and a method of forming same are provided. A method includes forming an isolation region over a substrate and forming an alignment structure over the isolation region. Forming the alignment structure includes forming a sacrificial gate electrode layer over the substrate and the isolation region. The sacrificial gate electrode layer is patterned to form a plurality of first sacrificial gates over the isolation region. At least one of the plurality of first sacrificial gates is reshaped. The at least one of the plurality of first sacrificial gates is disposed at an edge of the alignment structure in a plan view. A sidewall of the at least one of the plurality of first sacrificial gates comprises a notch at an interface between the at least one of the plurality of first sacrificial gates and the isolation region.
    Type: Application
    Filed: July 27, 2024
    Publication date: November 21, 2024
    Inventors: Chi-Sheng Lai, Wei-Chung Sun, Li-Ting Chen, Kuei-Yu Kao, Chih-Han Lin
  • Publication number: 20240380254
    Abstract: A wireless power transmitter circuit includes a power stage circuit including switches coupled to a resonant transmitter circuit; and a transmission control circuit controlling the power stage circuit and including: a modulation circuit generating a PWM control signal during a power supply procedure, to control the switches to convert a DC power and generate a wireless transmission power at the resonant transmitter circuit, thereby supplying the wireless power to a corresponding wireless power receiver circuit; a storage unit storing an authentication code-threshold database; and a communication circuit receiving an authentication code and a signal intensity value transmitted by the wireless power receiver circuit, to read an alignment intensity threshold corresponding to the authentication code from the storage unit, and to compare the signal intensity value with the alignment intensity threshold during a groping procedure to determine whether the wireless power transmitter circuit is aligned with the wirele
    Type: Application
    Filed: September 17, 2023
    Publication date: November 14, 2024
    Inventors: Li-Ting Tsai, Fu-Chi Lin
  • Publication number: 20240379407
    Abstract: A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Wen-Yen Chen, Li-Ting Wang, Wan-Chen Hsieh, Bo-Cyuan Lu, Tai-Chun Huang, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20240377263
    Abstract: A temperature measuring apparatus for measuring a temperature of a substrate is described. A light emitting source that emits light signals such as laser pulses are applied to the substrate. A detector on the other side of the light emitting source receives the reflected laser pulses. The detector further receives emission signals associated with temperature or energy density that is radiated from the surface of the substrate. The temperature measuring apparatus determines the temperature of the substrate during a thermal process using the received laser pulses and the emission signals. To improve the signal to noise ratio of the reflected laser pulses, a polarizer may be used to polarize the laser pulses to have a S polarization. The angle in which the polarized laser pulses are applied towards the substrate may also be controlled to enhance the signal to noise ratio at the detector's end.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Tz-Shian CHEN, Yi-Chao WANG, Wen-Yen CHEN, Li-Ting WANG, Huicheng CHANG, Yee-Chia YEO
  • Publication number: 20240379356
    Abstract: A method of forming a semiconductor device includes removing a light-sensitive material from a workpiece utilizing polarized electromagnetic radiation and annealing features on the workpiece utilizing electromagnetic radiation polarized in a different direction than the polarized electromagnetic radiation utilized to remove the light-sensitive material. In some embodiments, the electromagnetic radiation used to anneal the features on the workpiece is not polarized. In some described embodiments, light-sensitive material removed from the workpiece is exhausted from the chamber in which the light-sensitive removal process is carried out before it can deposit on surfaces of the chamber.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Tz-Shian CHEN, Li-Ting WANG, Yee-Chia YEO
  • Publication number: 20240379355
    Abstract: A method of forming a semiconductor device includes removing a light-sensitive material from a workpiece utilizing polarized electromagnetic radiation and annealing features on the workpiece utilizing electromagnetic radiation polarized in a different direction than the polarized electromagnetic radiation utilized to remove the light-sensitive material. In some embodiments, the electromagnetic radiation used to anneal the features on the workpiece is not polarized. In some described embodiments, light-sensitive material removed from the workpiece is exhausted from the chamber in which the light-sensitive removal process is carried out before it can deposit on surfaces of the chamber.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Tz-Shian CHEN, Li-Ting WANG, Yee-Chia YEO