Patents by Inventor Li Wei
Li Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240130276Abstract: A riding mowing device includes a seat used for a user to sit on and including a seat cushion and a backrest; a frame for supporting the seat; a cutting assembly including a cutting deck and a mowing element for mowing grass, where the mowing element is at least partially accommodated in the cutting deck, and the cutting assembly is mounted to the frame; a traveling assembly for driving the riding mowing device to travel; a control circuit board for controlling at least the cutting assembly and the traveling assembly; and a power supply assembly for supplying power to at least the cutting assembly and the traveling assembly. At least part of the control circuit board is disposed between the seat and the power supply assembly.Type: ApplicationFiled: December 11, 2023Publication date: April 25, 2024Inventors: Li Li, Tianfang Wei, Fan Gao, Liang Chen, Haishen XU, Ming Gao, Min Zhang, Tao Zhang, Jiajun Huang, Yunfei Gao
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Publication number: 20240136226Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Li-Wei CHU, Ying-Chi SU, Yu-Kai CHEN, Wei-Yip LOH, Hung-Hsu CHEN, Chih-Wei CHANG, Ming-Hsing TSAI
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Patent number: 11967596Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.Type: GrantFiled: August 5, 2021Date of Patent: April 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
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Patent number: 11967357Abstract: A memory unit with time domain edge delay accumulation for computing-in-memory applications is controlled by a first word line and a second word line. The memory unit includes at least one memory cell, at least one edge-delay cell multiplexor and at least one edge-delay cell. The at least one edge-delay cell includes a weight reader and a driver. The weight reader is configured to receive a weight and a multi-bit analog input voltage and generate a multi-bit voltage according to the weight and the multi-bit analog input voltage. The driver is connected to the weight reader and configured to receive an edge-input signal. The driver is configured to generate an edge-output signal having a delay time according to the edge-input signal and the multi-bit voltage. The delay time of the edge-output signal is positively correlated with the multi-bit analog input voltage multiplied by the weight.Type: GrantFiled: January 21, 2022Date of Patent: April 23, 2024Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Meng-Fan Chang, Ping-Chun Wu, Li-Yang Hong, Jin-Sheng Ren, Jian-Wei Su
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Patent number: 11961772Abstract: The present application relates to the field of semiconductor manufacturing technologies, and in particular to a method and an apparatus for automatically processing wafers. The method for automatically processing the wafers includes the following steps: providing several wafers, wherein the wafers operate on a primary path, and the primary path is a path for forming semiconductor structures on the surfaces of the wafers; determining whether there is a need for detecting defects of the wafers, and if yes, automatically switching an operating path of the wafers to a secondary path; detecting the defects of the wafers in the secondary path; and determining whether the defect detection on the wafers is finished, and if yes, automatically switching the operating path of the wafers to the primary path. The application makes it possible to automatically detect the defects of the wafers with different SWR conditions, thereby improving the automation degree of machines.Type: GrantFiled: June 24, 2021Date of Patent: April 16, 2024Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Peng Yang, Biao Gao, Li-Wei Wu, Wen-Yi Wang
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Patent number: 11961834Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.Type: GrantFiled: March 21, 2022Date of Patent: April 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Lin Peng, Li-Wei Chu, Ming-Fu Tsai, Jam-Wem Lee, Yu-Ti Su
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Patent number: 11962861Abstract: A live broadcast room red envelope processing method and apparatus are provided. The method includes: receiving a red envelope sending instruction sent by a first audience client, where the red envelope sending instruction includes a red envelope receiving object, red envelope information and a target live broadcast room; determining red envelope content according to the red envelope information; sending, if the red envelope receiving object is all audiences in the target live broadcast room, a red envelope display instruction to all second audience clients in the target live broadcast room; receiving a red envelope receiving instruction sent by the second audience client in response to the red envelope display instruction; determining a target second audience client in response to the red envelope receiving instruction, and sending red envelope content to an audience account corresponding to the target second audience client.Type: GrantFiled: August 4, 2020Date of Patent: April 16, 2024Assignee: BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD.Inventor: Li Wei
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Patent number: 11959655Abstract: Provided are an air-conditioning system, a data transmission method and apparatus, and a non-transitory computer storage medium. A centralized air-conditioning controller, at least one air conditioner, and at least one environmental information collection module are provided.Type: GrantFiled: July 11, 2019Date of Patent: April 16, 2024Assignees: QINGDAO HAIER AIR-CONDITIONING ELECTRONIC CO., LTD., QINGDAO HAIER SMART TECHNOLOGY R&D CO., LTD., HAIER SMART HOME CO., LTD.Inventors: Wei Wei, Yongjun Zhao, Li Chen Zhang
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Publication number: 20240115410Abstract: An assistive device structure for positioning and pressure relief is provided, including a first elastic layer and a second elastic layer, which are attached by using a high-frequency encapsulation process, sealing, bagging, thermoforming, or an integrally molding process. Each of the first and second elastic layers has a bottom surface and an arc surface disposed opposite to each other. The arc surface includes two protrusions and a recess formed there in between. The two protrusions have different heights. A hollow area is disposed in the recess of the first and second elastic layers. Based on such structure, the bottom surfaces of the first and second elastic layers are attached to form the proposed assistive device structure for a user to lean against and providing multiple positioning effects and pressure relief. More than four axial directions of supporting forces are generated to effectively enhance muscle relaxation and stress relief.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: SY-WEN HORNG, LONG-YING CHENG, CHI-WEI HUNG, HSIANG-JUNG HUNG, LI-CHE HUNG
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Publication number: 20240118052Abstract: A pneumatic arrow gun has a gun body, an arrow, a positioning sleeve, and a connecting wire. The arrow is for inserting into an air tube of the gun body. The positioning sleeve is temporarily mounted around the air tube, and the arrow is disposed through the positioning sleeve. The connecting wire connects the gun body to the positioning sleeve. Because the positioning sleeve is temporarily mounted around the air tube, the arrow slides forward relative to the positioning sleeve after triggering. When triggering the arrow, the connecting wire naturally dangles. When the arrow detaches from the air tube, the positioning sleeve located at a nock of the arrow due to the sliding of the arrow. Therefore, a rebound of the arrowhead is prevented. The safety and the shooting stability are ensured. Further, the arrow is easily retrieved by the connecting wire.Type: ApplicationFiled: December 21, 2022Publication date: April 11, 2024Inventors: Li-Wei CHEN, Tsang-Yao LU
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Publication number: 20240120388Abstract: Provided are structures and methods for forming structures with sloping surfaces of a desired profile. An exemplary method includes performing a first etch process to differentially etch a gate material to a recessed surface, wherein the recessed surface includes a first horn at a first edge, a second horn at a second edge, and a valley located between the first horn and the second horn; depositing an etch-retarding layer over the recessed surface, wherein the etch-retarding layer has a central region over the valley and has edge regions over the horns, and wherein the central region of the etch-retarding layer is thicker than the edge regions of the etch-retarding layer; and performing a second etch process to recess the horns to establish the gate material with a desired profile.Type: ApplicationFiled: January 18, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Jih-Sheng Yang, Shih-Chieh Chao, Chia Ming Liang, Yih-Ann Lin, Ryan Chia-Jen Chen
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Patent number: 11955062Abstract: Provided are a display driving method and apparatus, and a display panel and an electronic device. The display driving method is applied to a display panel, and comprises: determining a first charging duration of each display point on the basis of a preset position, in a display panel, of each display point in the display panel; generating, according to the first charging duration of each display point, a display control signal corresponding to each display point; and adjusting a second charging duration of each display point according to the display control signal.Type: GrantFiled: September 29, 2022Date of Patent: April 9, 2024Assignee: Chipone Technology (Beijing) Co., LTD.Inventors: Li-Tang Lin, Chia-Wei Su
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Patent number: 11955554Abstract: A method of fabrication of a multi-gate semiconductor device that includes providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers. The plurality of the second type of epitaxial layers is oxidized in the source/drain region. A first portion of a first layer of the second type of epitaxial layers is removed in a channel region of the fin to form an opening between a first layer of the first type of epitaxial layer and a second layer of the first type of epitaxial layer. A portion of a gate structure is then formed in the opening.Type: GrantFiled: July 15, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Huan-Sheng Wei, Hung-Li Chiang, Chia-Wen Liu, Yi-Ming Sheu, Zhiqiang Wu, Chung-Cheng Wu, Ying-Keung Leung
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Patent number: 11957018Abstract: A display device includes: a substrate having display and non-display areas; a first conductive layer including first and second sub-conductive lines; a second conductive layer including third and fourth sub-conductive lines, wherein, in the display area, the first sub-conductive line and the third sub-conductive lines cross from a top view; and a third conductive layer including third conductive lines and corresponding to the non-display area; wherein, corresponding to the non-display area, a portion of a projection of the one of the third conductive lines is overlapped with a portion of a projection of the second sub-conductive line on the substrate, and another portion of the projection of the one of the third conductive lines is overlapped with a portion of a projection of the fourth sub-conductive line on the substrate.Type: GrantFiled: May 9, 2023Date of Patent: April 9, 2024Assignee: INNOLUX CORPORATIONInventors: Hui-Min Huang, Li-Wei Sung, Cheng-Tso Chen, Chia-Min Yeh
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Patent number: 11951286Abstract: An automatic injection device for fluid has a sleeve, an actuating unit, a barrel with a piercing needle and a high-pressure air source. The high-pressure air source is mounted slidably in the barrel. The actuating unit is mounted in the sleeve and barrel and selectively blocks the high-pressure air source. When the user needs to release the high-pressure air in the high-pressure air source, the user press the actuating unit to allow the high-pressure air source to slide until the high-pressure air source hits the piercing needle. Therefore, the high-pressure air in the high-pressure air source is easily released by actuate the actuating unit without additional hand tools.Type: GrantFiled: December 25, 2020Date of Patent: April 9, 2024Assignee: BANZA STAMPING INDUSTRY CORP.Inventors: Li-Wei Chen, Cole Krebs
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Publication number: 20240109955Abstract: Disclosed are antigen binding polypeptides and antigen binding polypeptide complexes (e.g., antibodies and antigen binding fragments thereof) having certain structural and/or functional features. Also disclosed are polynucleotides and vectors encoding such polypeptides and polypeptide complexes; host cells, pharmaceutical compositions and kits containing such polypeptides and polypeptide complexes; and methods of using such polypeptides and polypeptide complexes.Type: ApplicationFiled: June 30, 2023Publication date: April 4, 2024Inventors: Juan LI, Chi-Jen WEI, Ronnie R. WEI, Zhi-Yong YANG, John R. MASCOLA, Gary J. NABEL, John MISASI, Amarendra PEGU, Lingshu WANG, Tongqing ZHOU, Misook CHOE, Olamide K. OLONINIYI, Bingchun ZHAO, Yi ZHANG, Eun Sung YANG, Man CHEN, Kwanyee LEUNG, Wei SHI, Nancy J. SULLIVAN, Peter D. KWONG, Richard A. KOUP, Barney S. GRAHAM, Peng HE
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Publication number: 20240113112Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.Type: ApplicationFiled: December 1, 2023Publication date: April 4, 2024Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
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Patent number: 11948971Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.Type: GrantFiled: August 10, 2021Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jeng-Wei Yu, Tsz-Mei Kwok, Tsung-Hsi Yang, Li-Wei Chou, Ming-Hua Yu
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Publication number: 20240103097Abstract: The present disclosure provides a direct current (DC) transformer error detection apparatus for a pulsating harmonic signal, including a DC and pulsating harmonic current output module and an external detected input module, where the DC and pulsating harmonic current output module outputs a DC and a DC superimposed pulsating harmonic current to an internal sampling circuit and a self-calibrated standard resistor array; and the internal sampling circuit converts the input DC and the input DC superimposed pulsating harmonic current into a voltage signal, and sends the voltage signal to an analog-to-digital (AD) sampling and measurement component through a front-end conditioning circuit and a detected input channel. The DC transformer error detection apparatus can complete self-calibration for measurement of the DC and the pulsating harmonic signal on a test site.Type: ApplicationFiled: August 17, 2022Publication date: March 28, 2024Inventors: Xin Zheng, Wenjing Yu, Tao Peng, Yi Fang, Ming Lei, Hong Shi, Ben Ma, Li Ding, Wei Wei, Linghua Li, He Yu, Tian Xia, Yingchun Wang, Sike Wang, Dongri Xie, Xin Wang, Bo Pang, Xianjin Rong
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Patent number: D1019739Type: GrantFiled: May 8, 2020Date of Patent: March 26, 2024Assignee: COMPAL ELECTRONICS, INC.Inventors: Chen-Hsien Cheng, Li-Fang Chen, Ruei-Hong Hong, Ting-Wei Wu