Patents by Inventor Li-Wen Wang

Li-Wen Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10948470
    Abstract: The disclosure describes embodiments of an airborne molecular contamination (AMC) monitoring apparatus. The AMC apparatus includes a manifold having a plurality of inlets and one or more outlets. A sampling tube bus fluidly is coupled to the manifold, the sampling tube bus comprising a plurality of individual sampling tubes, each individual sampling tube being fluidly coupled to one of the plurality of inlets. One or more analyzers are each fluidly coupled to one of the one or more outlets of the manifold to analyze fluid drawn into the manifold through one or more of the plurality of individual sampling tubes. A control and communication system coupled to the one or more analyzers. Other embodiments are described and claimed.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: March 16, 2021
    Assignee: TRICORNTECH TAIWAN
    Inventors: Tsung-Kuan A. Chou, Pei-Wen Chung, Li-Peng Wang
  • Patent number: 10939945
    Abstract: A minimally invasive bone fracture positioning device includes a sleeve, a movable unit, and a support. The sleeve includes an alignment portion located on a longitudinal axis of the sleeve. The movable unit includes a positioning portion. The positioning portion is located on the longitudinal axis and is spaced from the alignment portion. The movable unit is mounted in a radial direction of the sleeve. The movable unit is slideable relative to the sleeve along the longitudinal axis. A support is coupled to the sleeve and the movable unit. The movable unit is spaced from the sleeve by the support.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: March 9, 2021
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Yue-Jun Wang, Chih-Hao Chang, Shih-Hua Huang, Chih-Lung Lin, Tung-Lin Tsai, Chun-Chieh Tseng, Li-Wen Weng
  • Patent number: 10905653
    Abstract: Provided is a sequentially decomposable polypeptide-based nanocarrier with protective shell for delivery of hydrophobic drugs and preparation thereof.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: February 2, 2021
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Li-Wen Wang, Tzu-Wei Wang
  • Publication number: 20210014702
    Abstract: A data communication system able to provide a speedy response to a user equipment transmitting data includes a base station and a data center. The base station is disposed adjacent to the data center, the base station is coupled between the data center and the user equipment, and the base station transmits data provided by the user equipment to the data center. The data center processes first data from the user equipment, and transmits a second data to the user equipment through the base station. Therefore, the data transmission time between the data center and the user equipment is shortened, and the data can be quickly fed back to the user equipment.
    Type: Application
    Filed: July 11, 2019
    Publication date: January 14, 2021
    Inventors: YAO-TING CHANG, CHAO-KE WEI, TZE-CHERN MAO, LI-WEN CHANG, HUI-HSUAN WANG
  • Publication number: 20200372950
    Abstract: A semiconductor memory device includes: a column of segments, each segment including bit cells; a local write bit (LWB) line; a local write bit_bar (LWB_bar) line; a global write bit (GWB) line; a global write bit_bar (GWBL_bar) line; each of the bit cells being connected correspondingly between the LWB and LWB_bar lines; and a distributed write driving arrangement including a global write driver connected between the GWB line and the LWB line and between the GWB_bar line and the LWB_bar line; and a local write driver included in each segment, each local write driver being connected between the GWB line and the LWB line and between the GWB_bar line and the LWB_bar line; and wherein: the global write driver and each local write driver is connected between the GWB line and the LWB line and between the GWB_bar line and the LWB_bar line.
    Type: Application
    Filed: August 12, 2020
    Publication date: November 26, 2020
    Inventors: Hidehiro FUJIWARA, Hung-Jen LIAO, Li-Wen WANG, Jonathan Tsung-Yung CHANG, Yen-Huei CHEN
  • Patent number: 10783955
    Abstract: A circuit includes a column of memory cells, a first read data line coupled exclusively with a first subset of memory cells of the column of memory cells, a second read data line coupled exclusively with a second subset of memory cells of the column of memory cells, and a plurality of read word lines. Each read word line of the plurality of read word lines is coupled with a memory cell of the first subset of memory cells and with a memory cell of the second subset of memory cells.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: September 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hidehiro Fujiwara, Li-Wen Wang, Yen-Huei Chen, Hung-Jen Liao
  • Patent number: 10784252
    Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 22, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang Huang, Li-Fan Chen, Chih-Hsuan Lin, Yu-Kai Wang, Hung-Wei Chen, Ching-Wen Wang, Ting-You Lin, Chun-Chih Chen
  • Patent number: 10755768
    Abstract: A semiconductor memory device includes: a local write bit (LWB) line; a local write bit_bar (LWB_bar) line; a global write bit (GWB) line; a global write bit_bar (GWBL_bar) line; a column of segments, each segment including bit cells; each of the bit cells including a latch circuit and first and second pass gates connecting the corresponding LWB and LWB_bar lines to the latch circuit; and a distributed write driving arrangement. The distributed write driving arrangement includes: a global write driver including a first inverter connected between the GWB line and the LWB line, and a second inverter connected between the GWB_bar line and the LWB_bar line; and a local write driver included at an interior of each segment, each local write driver including a third inverter connected between the GWB line and the LWB line; and a fourth inverter connected between the GWB_bar line and the LWB_bar line.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: August 25, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hidehiro Fujiwara, Hung-Jen Liao, Li-Wen Wang, Jonathan Tsung-Yung Chang, Yen-Huei Chen
  • Publication number: 20200155138
    Abstract: A fibrocartilage suturing device is provided to solve the problem where the conventional procedure of the surgery is inconvenient. The fibrocartilage suturing device includes a tube assembly, a tubular member, and an anchor. The tube assembly extends through the tube assembly and includes an insertion section. The movement member is coupled with the tube assembly and includes a thrust rod extending through the tubular member. The anchor is located at one end of the thrust rod and includes a body and at least two wings connected to the body is able to be folded and unfolded relative to the body. The body of the anchor is connected to an end of a thread. Another end of the thread is connected to the tubular member.
    Type: Application
    Filed: September 12, 2019
    Publication date: May 21, 2020
    Inventors: Chen-Chie WANG, Po-Chih Chow, Yue-Jun Wang, Shih-Hua Huang, Chih-Lung Lin, Tung-Lin Tsai, Chun-Chieh Tseng, Li-Wen Weng
  • Patent number: 10651114
    Abstract: An apparatus and method of three dimensional conductive lines comprising a first memory column segment in a first tier, a second memory column segment in a second tier, and conductive lines connecting the first memory column segment to the second memory column segment. In some embodiments a conductive line is disposed in the first tier on a first side of the memory column and in the second tier on a second side of the memory column.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: May 12, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Yu Lin, Kao-Cheng Lin, Li-Wen Wang, Yen-Huei Chen
  • Publication number: 20200128958
    Abstract: The disclosure provides a smart liquor cabinet and a management method for the liquor cabinet. In the management method, a voice command is received and an intent of the voice command is determined. If the intent of the voice command is related to a remaining space of the liquor cabinet, then the remaining space with no liquor in the liquor cabinet is determined. If the intent of the voice command is related to an inventory situation of the liquor cabinet, then the inventory situation of stored liquor in the liquor cabinet is determined. The response of the intent is outputted. The response is related to the remaining space or the inventory situation. In this way, the liquor and space in the liquor cabinet may be counted easily and quickly.
    Type: Application
    Filed: May 24, 2019
    Publication date: April 30, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Chung Lo, Kai-Yi Chen, Li-Yuan Hsu, Yi-Wen Wang, Hsiu-Hang Lin
  • Publication number: 20200111526
    Abstract: A semiconductor memory device comprising a plurality of memory cells configured to store digital data and an input multiplexer configured to enable the selection of a particular memory cell from the plurality of memory cells. The semiconductor memory device further comprises a read/write driver circuit configured to read data from the selected memory cell and write data to the selected memory cell, and a write logic block configured to provide logical control to the read/write driver circuit for writing data to the selected of memory cell. The read/write driver circuit may be coupled to the read/write input multiplexer by a data line and an inverted data line and the read and the write operations to the selected memory cell occur over the same data line and inverted data line.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Chien-Yuan Chen, Che-Ju Yeh, Hau-Tai Shieh, Cheng-Hung Lee, Hung-Jen Liao, Sahil Preet Singh, Manish Arora, Hemant Patel, Li-Wen Wang
  • Publication number: 20200098740
    Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Li-Fan CHEN, Chih-Hsuan LIN, Yu-Kai WANG, Hung-Wei CHEN, Ching-Wen WANG, Ting-You LIN, Chun-Chih CHEN
  • Publication number: 20200020383
    Abstract: A semiconductor memory device includes: a local write bit (LWB) line; a local write bit_bar (LWB_bar) line; a global write bit (GWB) line; a global write bit_bar (GWBL_bar) line; a column of segments, each segment including bit cells; each of the bit cells including a latch circuit and first and second pass gates connecting the corresponding LWB and LWB_bar lines to the latch circuit; and a distributed write driving arrangement. The distributed write driving arrangement includes: a global write driver including a first inverter connected between the GWB line and the LWB line, and a second inverter connected between the GWB_bar line and the LWB_bar line; and a local write driver included at an interior of each segment, each local write driver including a third inverter connected between the GWB line and the LWB line; and a fourth inverter connected between the GWB_bar line and the LWB_bar line.
    Type: Application
    Filed: July 3, 2019
    Publication date: January 16, 2020
    Inventors: Hidehiro FUJIWARA, Hung-Jen LIAO, Li-Wen WANG, Jonathan Tsung-Yung CHANG, Yen-Huei CHEN
  • Patent number: 10510401
    Abstract: A semiconductor memory device comprising a plurality of memory cells configured to store digital data and an input multiplexer configured to enable the selection of a particular memory cell from the plurality of memory cells. The semiconductor memory device further comprises a read/write driver circuit configured to read data from the selected memory cell and write data to the selected memory cell, and a write logic block configured to provide logical control to the read/write driver circuit for writing data to the selected of memory cell. The read/write driver circuit may be coupled to the read/write input multiplexer by a data line and an inverted data line and the read and the write operations to the selected memory cell occur over the same data line and inverted data line.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semicondutor Manufacturing Company Limited
    Inventors: Chien-Yuan Chen, Che-Ju Yeh, Hau-Tai Shieh, Cheng-Hung Lee, Hung-Jen Liao, Sahil Preet Singh, Manish Arora, Hemant Patel, Li-Wen Wang
  • Publication number: 20190341346
    Abstract: A method of designing a memory circuit is provided that includes generating a layout of a first memory cell using an integrated circuit design system. The layout of the first memory cell is generated by routing a first word line in a first layer on a first level, and routing a second word line in the first layer. Also, the method includes generating a layout of a second memory cell using the integrated circuit design system. The layout of the second memory cell is generated by routing a third word line in the first layer, the second word line being between the first word line and the third word line, and routing a fourth word line in the first layer, the third word line being between the second word line and the fourth word line. Moreover, the method includes assigning a first color scheme to the first word line and to the third word line, and assigning a second color scheme to the second word line and to the fourth word line.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Inventors: Hidehiro FUJIWARA, Li-Wen WANG, Yen-Huei CHEN, Hung-Jen LIAO
  • Patent number: 10431295
    Abstract: A static random access memory (SRAM) that includes a memory cell comprising at least two p-type pass gates. The SRAM also includes a first data line connected to the memory cell, a second data line connected to the memory cell and a voltage control unit connected to the first data line, wherein the voltage control unit is configured to control the memory cell.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: October 1, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Li-Wen Wang, Chih-Yu Lin, Yen-Huei Chen, Hung-Jen Liao
  • Patent number: 10408923
    Abstract: A laser radar device comprises a laser projecting system and a laser radar detecting system. The laser projecting system comprises a laser diode; and a light source orientation adjustment unit comprising a collimating lens and a Powell lens to modulate the angle at which the first incident laser beam is projected onto an object. The laser radar detecting system comprises at least two laser radar detection units disposed in the horizontal direction and vertical direction of the object, respectively. The laser radar detection units each comprise a wedge-shaped lens, an aspherical lens system and an optical detector. By designing optical parameters of the wedge-shaped lens and stacking the laser radar detection units in the horizontal direction and vertical direction, it is feasible to facilitate overall device manufacturing and processing, meet R&D needs, and adjust an optical system in its entirety easily.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: September 10, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chao-Wen Liang, Li-Tsun Wang, Shih-Che Chien, Yu-Sung Hsiao
  • Patent number: 10354952
    Abstract: A memory cell comprises a first word line in a first layer on a first level. The memory cell also comprises a second word line having a first portion in the first layer and a second portion in a second layer. The second layer is on a second level different from the first level. The memory cell further comprises a first via layer coupling the first portion of the second word line with the second portion of the second word line.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: July 16, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hidehiro Fujiwara, Li-Wen Wang, Yen-Huei Chen, Hung-Jen Liao
  • Publication number: 20190184464
    Abstract: A 3D printing method of a metal object includes stacking molten metal powders along an outlined path to form a metal object. An inert gas is introduced into a chamber with the metal object inside, and the metal object is hot isostatic pressed in the chamber at 80-120 MPa and 900-1000° C. for 1-4 hours.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Inventors: Yue-Jun Wang, Chun-Chieh Tseng, Li-Wen Weng, Tung-Lin Tsai, Ying-Cheng Lu, Chiu-Feng Lin