Abstract: A micro electro mechanical system (MEMS) includes a circuit substrate comprising electronic circuitry, a support substrate having a recess, a bonding layer disposed between the circuit substrate and the support substrate, through holes passing through the circuit substrate to the recess, a first conductive layer disposed on a front side of the circuit substrate, and a second conductive layer disposed on an inner wall of the recess. The first conductive layer extends into the through holes and the second conductive layer extends into the through holes and coupled to the first conductive layer.

Abstract: A semiconductor device includes a substrate; an interconnect structure over the substrate; a first passivation layer over the interconnect structure; a first conductive pad, a second conductive pad, and a conductive line disposed over the first passivation layer and electrically coupled to conductive features of the interconnect structure; a conformal second passivation layer over and extending along upper surfaces and sidewalls of the first conductive pad, the second conductive pad, and the conductive line; a first conductive bump and a second conductive bump over the first conductive pad and the second conductive pad, respectively, where the first conductive bump and the second conductive bump extend through the conformal second passivation layer and are electrically coupled to the first conductive pad and the second conductive pad, respectively; and a dummy bump over the conductive line, where the dummy bump is separated from the conductive line by the conformal second passivation layer.

Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: A semiconductor structure includes a plurality of fin structures extending along a first direction, a plurality of gate structure segments positioned along a line extending in a second direction, the second direction being orthogonal to the first direction, wherein the gate structure segments are separated by dummy fin structures. The semiconductor structure further includes a conductive layer disposed over both the gate structure segments and the dummy fin structures to electrically connect at least some of the gate structure segments, and a cut feature aligned with one of the dummy fin structures and positioned to electrically isolate gate structure segments on both sides of the one of the dummy fin structures.

Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: A recombinant human collagen-based multifunctional stent coating and a preparation method thereof are provided. The preparation method includes (1) activating a substrate material; (2) placing the activated substrate material in an amino compound-containing solution for a reaction to obtain an aminated substrate material; (3) placing the aminated substrate material in a polyanion electrolyte solution for a reaction, and cleaning with deionized water. The recombinant human collagen-based multifunctional stent coating prepared by the present invention effectively improves the anticoagulation and rapid endothelialization performance of biomaterials, such as vascular stent materials, and reduces the late thrombosis and restenosis problems existing in current stent materials.

Abstract: This invention proposes a single-vector-based finite control set model predictive control for two parallel power converters, which adopts a centralized control structure to achieve accurate control of overall performance. It establishes predictive models for line currents and three phase-circulating currents and constructs a novel cost function that uses these currents as performance indices to implement the predictive control algorithm based on the proposed predictive models. The invention proposes dynamic weighting coefficients and adjustment principles to improve system control performance. A finite set output signal matrix containing important characteristic information of all alternative vectors is constructed to avoid redundant calculations in each control horizon, reducing computation time during practical implementation.

Abstract: Provided are compositions and methods for enhanced prime editing, which include a pegRNA that encodes a target mutation in a target protein, along with one or more nearby silent or conservative mutations. These silent mutations can increase the editing efficiency, without causing a change to the target protein sequence. Also provided are compositions and methods of using the improved prime editing for preventing or treating infections by SARS-CoV or SARS-CoV-2.

Abstract: Provided are fusion proteins and related molecules useful for conducting base editing with reduced or no off-target mutations. The fusion protein may include a first fragment comprising a nucleobase deaminase or a catalytic domain thereof, a second fragment comprising a nucleobase deaminase inhibitor, and a protease cleavage site between the first fragment and the second fragment. Also provided are improved prime editing systems, including prime editing guide RNA with improved stability.

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

Abstract: Monoalkyl tin triamide compounds having purity of at least about 99 mol % and the chemical formula RSn(NMe2)3 are described. R1 is selected from RA, RB, and RC; RA is a primary alkyl group having about 1 to 10 carbon atoms, RB is a secondary alkyl group having about 3 to 10 carbon atoms, and RC is a tertiary alkyl group having about 3 to 10 carbon atoms; each R2 is independently an alkyl group having about 1 to 10 carbon atoms; and a content of R1Sn(NR22)2(N(R2)CH2NR22) is less than about 1 mol %. Methods for synthesizing, purifying, and storing these compounds are also provided. The monoalkyl tin compounds may be used for the formation of high-resolution EUV lithography patterning precursors and are attractive due to their high purity and minimal concentration of dialkyl tin and other tin impurities.

Abstract: A reversible stress-responsive material, a preparation method, and a use thereof are provided. The reversible stress-responsive material prepared by the present disclosure has the property of real-time reversible force response at room temperature. When used with crosslinked plastic (high Tg) and rubber (low Tg) polymer materials, the reversible stress-responsive material can significantly enhance the mechanical strength and ductility of covalently cross-linked polymers. In the present disclosure, the triazolinedione (TAD)-indole click chemistry with the force-induced reversible property is used to construct a force-reversible crosslinked polymer material, and such a force-induced reversible crosslinking method can achieve the breakage and re-forming of covalent crosslinking points at room temperature in a solid state without any external stimuli other than the ambient temperature.

Abstract: A method of normalizing detector elements in an imaging system is described herein. The method includes a line source that is easier to handle for a user, and decouples the normalization of the detector elements into a transaxial domain and an axial domain in order to isolate errors due to positioning of the line source. Additional simulations are performed to augment the real scanner normalization. A simulation of a simulated line source closely matching the real line source can be performed to isolate errors due to physical properties of the crystals and position of the crystals in the system, wherein the simulated detector crystals are otherwise modeled uniformly. A simulation of a simulated cylinder source can be performed to determine errors due to other effects stemming from gaps between the detector crystals.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first vertical structure and a second vertical structure formed over the substrate, and an isolation structure between the first and second vertical structures. The isolation structure can include a center region and footing regions formed on opposite sides of the center region. Each of the footing regions can be tapered towards the center region from a first end of the each footing region to a second end of the each footing region.

Abstract: A method includes: turning on a first switch coupled between a first array of memory and a voltage supply according to a first charge signal; turning on a second switch coupled between a second array of memory and the voltage supply according to a second charge signal different from the first charge signal; and generating the first charge signal and the second charge signal according to a word line address. The second array of memory is located between the second switch and the first array of memory.

Abstract: A semiconductor device includes a substrate; an interconnect structure over the substrate; a first passivation layer over the interconnect structure; a first conductive pad, a second conductive pad, and a conductive line disposed over the first passivation layer and electrically coupled to conductive features of the interconnect structure; a conformal second passivation layer over and extending along upper surfaces and sidewalls of the first conductive pad, the second conductive pad, and the conductive line; a first conductive bump and a second conductive bump over the first conductive pad and the second conductive pad, respectively, where the first conductive bump and the second conductive bump extend through the conformal second passivation layer and are electrically coupled to the first conductive pad and the second conductive pad, respectively; and a dummy bump over the conductive line, where the dummy bump is separated from the conductive line by the conformal second passivation layer.

Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

Abstract: This disclosure relates generally to wireless communications and, more particularly, to systems and methods for maintaining signal and data connections from a mobile base station portion relative to a fixed network portion. In one embodiment, a method performed by a communication node gateway, includes: receiving a signal from a mobile communication node portion at a first dynamic port during a first duration of time; directing the signal from the first dynamic port to a static port associated with transport network layer information during the first duration of time; receiving the signal at a second dynamic port during a second duration of time after the first duration of time; and directing the signal from the second dynamic port to the static port during the second duration of time by using the transport network layer information.

Abstract: A bus breaker control circuit for a railway vehicle includes a close relay, an open relay, a power supply circuit for a bus breaker, a power supply circuit for the hold relay, and a delay module; the power supply circuit for the hold relay comprises a normally-closed contact of the open relay, an auxiliary normally-open contact of the bus breaker, and the hold relay sequentially connected in series to a train power supply; the power supply circuit for the bus breaker comprises a normally-open contact of the hold relay and the bus breaker sequentially connected in series to the train power supply; and the delay module is connected in parallel with the hold relay, normally-closed contacts of the delay module are connected in series to the power supply circuit for the close relay.