Patents by Inventor Liang Gao

Liang Gao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240266485
    Abstract: The present application provides an array base plate and a light emitting apparatus, which relates to the technical field of displaying. The array base plate includes: a substrate; and a plurality of electrically-conductive-pad groups located on the substrate, wherein each of the electrically-conductive-pad groups includes at least one electrically conductive pad; the electrically conductive pad includes an electrically conducting layer and a first connecting layer, the first connecting layer is located on one side of the electrically conducting layer away from the substrate, and an orthographic projection of the first connecting layer on the substrate and an orthographic projection of the electrically conducting layer on the substrate at least partially intersect or overlap; and a thickness of the first connecting layer in a thickness direction of the substrate is greater than or equal to a thickness of the electrically conducting layer in the thickness direction of the substrate.
    Type: Application
    Filed: February 23, 2022
    Publication date: August 8, 2024
    Applicants: HEFEI BOE RUISHENG TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bing Zhang, Hai Tang, Xiao Wang, Chaoren Lv, Ping Kang, Liang Gao
  • Publication number: 20240267525
    Abstract: This disclosure relates generally to video coding and particularly to smooth-sub-block motion compensation, disclosing methods and systems for determining subblock motion vectors of a video block based on motion information of its spatial neighboring block, temporal blocs spatially co-located with the neighboring blocks, or co-located temporal block of the video block.
    Type: Application
    Filed: August 24, 2023
    Publication date: August 8, 2024
    Applicant: TENCENT AMERICA LLC
    Inventors: Liang ZHAO, Xin ZHAO, Han GAO, Shan LIU
  • Publication number: 20240266746
    Abstract: A radiator for terahertz electromagnetic radiation includes one or more radiator units. Each of the one or more radiator units respectively includes: an oscillator arrangement operable to generate third harmonic power, and a patch antenna arrangement operably coupled with the oscillator arrangement for radiating terahertz electromagnetic radiation based on the generated third harmonic power.
    Type: Application
    Filed: July 12, 2023
    Publication date: August 8, 2024
    Inventors: Liang GAO, Chi Hou CHAN
  • Publication number: 20240262915
    Abstract: The present invention relates to the technical field of antibody drugs, and particularly relates to an anti-TIGIT antibody or antigen-binding fragment thereof, an anti-TIGIT/anti-PD-L1 antibody or antigen-binding fragment thereof, and pharmaceutical compositions containing an anti-TIGIT antibody or antigen-binding fragment thereof or an anti-TIGIT/anti-PD-L1 antibody or antigen-binding fragment thereof, and applications thereof. The anti-TIGIT/anti-PD-L1 antibody of the present invention has significant antitumor activity, and can be applied in the preparation of antitumor drugs.
    Type: Application
    Filed: September 22, 2021
    Publication date: August 8, 2024
    Applicant: NANJING SANHOME PHARMACEUTICAL CO., LTD.
    Inventors: Liang JIN, Yang XIAO, Liwen ZHAO, Cheng LUO, Fei GAO
  • Publication number: 20240267567
    Abstract: The various implementations described herein include methods and systems for encoding and decoding video. In one aspect, a method of video decoding includes receiving video data that includes a first block from a bitstream, where the first block is encoded using a first partition mode. The method further includes identifying first and second sections of the first block and identifying blending values for blending the first and second sections. The blending values are obtained from one or more lookup tables (LUTs). The LUTs include values ranging from 0 to N, a first value in the LUTs is set to 0 and corresponds to a portion that is outside of a first blending region, and a second value in the LUTs is set to N and corresponds to a portion that is outside of a second blending region. The method also includes decoding the first block using the blending values.
    Type: Application
    Filed: September 11, 2023
    Publication date: August 8, 2024
    Inventors: Han Gao, Xin Zhao, Liang Zhao, Jing YE, Shan Liu
  • Publication number: 20240267518
    Abstract: The various implementations described herein include methods and systems for encoding and decoding video. In one aspect, a method of video decoding includes receiving video data that includes a first block that is partitioned into a first section and a second section, from a video bitstream. The method further includes identifying a prediction mode for the first block from a syntax element of the video bitstream. In accordance with the prediction mode being a partition-based inter-intra prediction mode wherein the first section is associated with an inter prediction mode and the second section is associated with an intra prediction mode, the first section is blended using a first blending mask and the second section is blended using a second blending mask, the second blending mask being different than the first blending mask. The method also includes decoding the first block using the blended first and second sections.
    Type: Application
    Filed: September 11, 2023
    Publication date: August 8, 2024
    Inventors: Han GAO, Xin ZHAO, Liang ZHAO, Shan LIU
  • Patent number: 12057481
    Abstract: A method for forming a semiconductor memory device is disclosed. A substrate is provided. A source diffusion region is formed in the substrate. Two floating gates are on opposite sides of the source diffusion region. A first dielectric cap layer is formed directly on each of the floating gates. An erase gate is formed on the source diffusion region. The erase gate partially overlaps an upper inner corner of each of the floating gates. A second dielectric cap layer is formed on the erase gate and the first dielectric cap layer. A select gate is formed on a sidewall of the first dielectric cap layer in a self-aligned manner. A drain diffusion region is formed in the substrate and adjacent to the select gate.
    Type: Grant
    Filed: May 21, 2023
    Date of Patent: August 6, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Liang Yi, Zhiguo Li, Xiaojuan Gao, Chi Ren
  • Patent number: 12058316
    Abstract: Method, device, and non-transitory storage medium for motion vector prediction (MVP) list construction for video coding are provided. One or more motion vector (MV) candidates may be retrieved from a reference MV bank, the one or more MV candidates being associated with a current block. A position to insert the one or more MV candidates from the reference MV bank into an MVP list associated with the current block is determined. The one or more MV candidates from the reference MV bank is inserted into the MVP list associated with the current block based on the position.
    Type: Grant
    Filed: September 9, 2022
    Date of Patent: August 6, 2024
    Assignee: TENCENT AMERICA LLC
    Inventors: Han Gao, Xin Zhao, Liang Zhao, Shan Liu
  • Publication number: 20240259589
    Abstract: This disclosure relates generally to video coding and particularly to methods and systems for signaling of compound inter prediction modes. For example, a correlation between a use of optical flow refinement and various compound inter prediction modes is explored to design example schemes for signaling an optical flow refinement flag and a compound inter prediction mode for a video block. Specifically, the signaling of the inter prediction modes for a block may depend on whether the optical flow refinement is applied to the block or not.
    Type: Application
    Filed: September 8, 2023
    Publication date: August 1, 2024
    Applicant: TENCENT AMERICA LLC
    Inventors: Liang ZHAO, Xin ZHAO, Han GAO, Shan LIU
  • Publication number: 20240250095
    Abstract: The present disclosure provides an array substrate and a method for manufacturing the same, a display panel and a display device. The array substrate includes along a thickness direction: a base substrate; a gate line fixing portion and a common electrode, materials of the gate line fixing portion and the common electrode are identical conductive materials and the gate line fixing portion and the common electrode are located in the same structural layer; a gate line arranged on the gate line fixing portion, and a common electrode line arranged on the common electrode, the gate line fixing portion is used for fixing the gate line to the base substrate. The display panel includes the array substrate. The display device includes the display panel. The manufacturing method is used to manufacture the array substrate.
    Type: Application
    Filed: October 27, 2021
    Publication date: July 25, 2024
    Inventors: Zexu LIU, Jincheng GAO, Haijiao QIAN, Lixing ZHAO, Liang CHEN, Tao WANG, Dengpan ZHU, Wentao LU, Guanyong ZHANG
  • Publication number: 20240249559
    Abstract: Embodiments of the disclosure provide an image liveness detection method and device. The method includes: performing semantic segmentation processing on a to-be-detected image to obtain a first masked image corresponding to a medium image block in the to-be-detected image; performing a biometric recognition on the to-be-detected image to obtain boundary information of a biometric image block in the to-be-detected image; performing pixel processing on the to-be-detected image based on the boundary information to obtain a second masked image corresponding to the biometric image block; obtaining, through calculation, a degree of overlap between the medium image block and the biometric image block based on the first masked image and the second masked image; determining a liveness detection result of the to-be-detected image according to the degree of overlap.
    Type: Application
    Filed: April 2, 2024
    Publication date: July 25, 2024
    Inventors: Liang GAO, Xunyi ZHOU, Dingheng ZENG
  • Patent number: 12046571
    Abstract: Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: July 23, 2024
    Assignee: Adeia Semiconductor Bonding Technologies Inc.
    Inventors: Cyprian Emeka Uzoh, Jeremy Alfred Theil, Liang Wang, Rajesh Katkar, Guilian Gao, Laura Wills Mirkarimi
  • Patent number: 12047586
    Abstract: A method performed by a video decoder includes receiving a coded video bitstream including a current picture, a first reference picture, a second reference picture, and a joint motion vector difference (JMVD) associated with at least one block in the current picture. The method includes determining whether one or more scaling factors are used for an adaptive motion vector difference resolution (AMVD) based JMVD based on a predetermined condition. The method includes, in response to determining the one or more scaling factors are used for the AMVD based JMVD, scaling the JMVD based on the one or more scaling factors. The method includes deriving a first MVD for the first reference picture based on the scaled JMVD. The method includes deriving a second MVD for the second reference picture based on the derived first MVD. The method includes reconstructing the at least one block based on the derived first MVD and the derived second MVD.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: July 23, 2024
    Assignee: TENCENT AMERICA LLC
    Inventors: Liang Zhao, Xin Zhao, Han Gao, Shan Liu
  • Publication number: 20240239754
    Abstract: Provided are a phenanthroimidazole derivative, and a preparation method therefor, and an application thereof. The phenanthroimidazole derivative has a structural formula as shown in Formula (I), R being an electron donor group, wherein by taking a phenanthroimidazole group containing a trifluoromethyl phenyl group as an electron acceptor, and in virtue of the properties of the specific electron donor group R, the phenanthroimidazole derivative containing a light-absorbing photosensitive group of a series D-?-A structure is synthesized, and can be used as a photoinitiator, which is used in the technical field of UV light-curing systems or 3D printing.
    Type: Application
    Filed: July 30, 2021
    Publication date: July 18, 2024
    Applicant: GUANGDONG UNIVERSITY OF TECHNOLOGY
    Inventors: Yanping HUO, Yudong WEN, Hongping XIANG, Shaomin JI, Wencheng CHEN, Jiye LUO, Liang GAO, Jingwei ZHAO
  • Patent number: 12041571
    Abstract: There is provided a method comprising receiving at least one measured signal characteristic from a user equipment, the user equipment being located at a user equipment location; comparing the at least one measured signal characteristic to at least one of a plurality of signal characteristics, each signal characteristic being associated with a respective measurement point; and determining, based on the comparing, a probability that the user equipment location is a first location.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: July 16, 2024
    Assignee: NOKIA SOLUTIONS AND NETWORKS OY
    Inventors: Jun Wang, Gang Shen, Liuhai Li, Liang Chen, Kan Lin, Zhihua Wu, Chaojun Xu, Jiexing Gao
  • Patent number: 12036632
    Abstract: A multi-station turning tool includes a lower bottom plate mechanism. A first hydraulic pipeline arranged in hydraulic fluid to an upper and an end face clamping hydraulic cylinders; a supporting plate mechanism internally provided with an air-detection pipeline; a positioning mechanism includes a substrate and a plurality of supporting blocks; an upper clamping mechanism includes a V-shaped clamping block connected to an upper clamping big arm that's connected to the upper clamping hydraulic cylinder; an end face clamping mechanism includes an end face clamping block that's connected to an end face clamping big arm that's connected to the end face clamping hydraulic cylinder through a piston ejector rod; an end face clamping air-detection mechanism includes an air pressure detection component, connected to a controller, and is capable of detecting a pressure of the air-detection pipeline to identify working states of the positioning mechanism and the upper clamping mechanisms.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: July 16, 2024
    Assignees: QINGDAO UNIVERSITY OF TECHNOLOGY, NINGBO SANHAN ALLOY MATERIAL CO., LTD.
    Inventors: Changhe Li, Haogang Li, Liang Luo, Huajun Cao, Bingheng Lu, Lizhi Tang, Yanbin Zhang, Haizhou Xu, Min Yang, Huaping Hong, Shuo Yin, Xin Cui, Mingzheng Liu, Teng Gao, Yali Hou, Runze Li
  • Patent number: 12032893
    Abstract: Simultaneous automatic placement and routing speeds up implementation an integrated circuit layout and improves the resulting layout such that the layout is more compact, has reduced parasitics, and has improved circuit performance characteristics (e.g., power, frequency, propagation delay, gain, and stability). A technique generates solutions based on random normalized polish expression, and includes cost considerations based on routing of interconnect.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: July 9, 2024
    Assignee: Pulsic Limited
    Inventors: Mark Waller, Paul Clewes, Liang Gao, Jonathan Longrigg
  • Publication number: 20240211648
    Abstract: Disclosed is a system platform for evaluation and research and development of vibration and noise reduction technology for rail transit, including a hemi-anechoic chamber, a run-through tunnel, a simulated track, and a reduced-scale train running on the simulated track. The run-through tunnel is enclosed by sound insulation and absorption boards. The side wall of the hemi-anechoic chamber is provided with a door opening; the exit of the run-through tunnel communicates with the door opening, and the entrance of the run-through tunnel is arranged at the end part, away from the hemi-anechoic chamber, of the run-through tunnel. The simulated track is continuously arranged into the hemi-anechoic chamber from the outside of the run-through tunnel via the entrance, the exit and the door opening.
    Type: Application
    Filed: June 5, 2023
    Publication date: June 27, 2024
    Inventors: BOWEN HOU, XINGYU CHEN, LIANG GAO, HUI YIN, DI WANG, BINGBING WANG, LINCHUAN QIAO, MENGFEI DU, YUNWEI ZHU, YI XIANG
  • Publication number: 20240213181
    Abstract: Provided is a display panel, including: a substrate, the substrate comprising a display area and a non-display area, the non-display area comprising a bonding area located at a side of the display area, the bonding area comprising a plurality of bonding pads, wherein the display panel further comprises a first insulating protective film layer, a detection pad is provided between at least two of the plurality of bonding pads, and the first insulating protective film layer is located at a side of the detection pad away from the substrate. A display device is further provided.
    Type: Application
    Filed: November 15, 2021
    Publication date: June 27, 2024
    Inventors: Hao SUN, Xiaoxia HUANG, Enjian YANG, Liang GAO, Shuang ZHANG, Feifan LI, Bin WANG, Hufei YANG, Ajuan DU, Yongle WANG
  • Patent number: 12013729
    Abstract: A flexible support plate is configured to support a display panel, and is provided with a bendable region. The bendable region has at least one boundary line extending in a first direction, and the boundary line is part of a side of the flexible support plate. A plurality of hollows are arranged at intervals in the bendable region, the plurality of hollows are divided into a plurality of hollow groups arranged in the first direction, and each hollow group includes at least one hollow. For any boundary line, any one of the plurality of hollow groups has one boundary point, the boundary point is disposed on a contour line of a hollow in the hollow group to which the boundary point belongs, and the boundary point has a smallest distance from a corresponding boundary line in the contour line to which the boundary point belongs.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: June 18, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Hufei Yang, Liang Gao, Ajuan Du, Feifan Li, Hao Sun, Xiaoxia Huang, Bin Wang, Yongle Wang, Enjian Yang, Shuang Zhang, Bowen Xiao