Abstract: The present disclosure provides a pea peptide with auxiliary hypoglycemic function, and preparation method and application thereof. The pea peptide includes at least peptide segments pEE, pEK and pER in its composition; and based on a mass of the pea peptide, a content of the peptide segment pEE is ?100.00 mg/100 g, a content of the peptide segment pEK is ?80.00 mg/100 g and a content of the peptide segment pER is ?90.00 mg/100 g. The pea peptide has a significant efficacy in an aspect of reducing blood glucose.

Abstract: A testing system for an image processing algorithm including a control unit, an image processing device, an image processing hardware, and a testing device is disclosed. The control unit provides an original image and parameters. The image processing device obtains the original image and the parameters, and drives the image processing hardware to perform a first image processing procedure to the original image based on the parameters to generate a hardware-processed image. The testing device obtains the original image, the parameters, and the hardware-processed image, and performs, through a simulation software, a second image processing procedure to the original image based on the parameters to generate a software-processed image. The testing device compares the hardware-processed image with the software-processed image through a testing software to generate a comparing result that shows a pixel difference of the hardware-processed image and the software-processed image.

Abstract: The disclosure provides a display device including a liquid crystal panel and a plurality of backlight units. The plurality of backlight units are configured to provide light to the liquid crystal panel. Each of the backlight units includes a driving substrate and a light-emitting element disposed on the driving substrate. The driving substrate includes a data line, a scanning line, and a driving circuit including three nodes. The three nodes of the driving circuit are respectively electrically connected to the data line, the scanning line, and the light-emitting element. The display device of the disclosure may have a relatively large size.

Abstract: The disclosed embodiments provide a distributed transaction system including a group of validator nodes that are known to each other in a network but are indistinguishable to other network nodes. The validator nodes form a Committee including a Leader node and one or more Associate nodes. The Committee may be dynamically changed, such that new network nodes may be added to the Committee or may replace existing validator nodes. The Associate nodes also may coordinate with each other to select a new Leader node. The disclosed embodiments reduce the distributed system's reliance on the stability of any particular node(s) in the network, as the validator nodes in the Committee may be changed at a sufficient frequency to remove unreliable, unavailable, or otherwise untrusted nodes. Further, the disclosed embodiments provide a scheme that helps ensure the Leader node, as well as the other Committee members, functions properly.

Abstract: A small-file storage optimization system based on a virtual file system in a KUBERNETES user-mode application which is applied to a target file system includes a network file system including a network file system server and a network file system client, a user-mode application mounted on a shared directory exposed by the network file system server through the network file system client, and a virtual file system including a virtual file system client and a virtual file system server. A file block creating and formatting module in the virtual file system server creates a virtual file block for storing small files on one or more object storage target devices of the target file system, and the virtual file block is mounted on the shared directory exposed by the network file system server.

Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming a metal gate over the fin, the metal gate being surround by a dielectric layer; etching the metal gate to reduce a height of the metal gate, where after the etching, a recess is formed over the metal gate between gate spacers of the metal gate; lining sidewalls and a bottom of the recess with a semiconductor material; filling the recess by forming a dielectric material over the semiconductor material; forming a mask layer over the metal gate, where a first opening of the mask layer is directly over a portion of the dielectric layer adjacent to the metal gate; removing the portion of the dielectric layer to form a second opening in the dielectric layer, the second opening exposing an underlying source/drain region; and filling the second opening with a conductive material.

Abstract: An electronic device coupled to a display includes a graphics card and a processor. The graphics card reads the extended display identification data from the display. The processor determines, according to the extended display identification data, that the display is able to display a default resolution at a first refresh rate at most, and determines, according to the extended display identification data, whether the display device is able to display the default resolution at a second refresh rate that exceeds the first refresh rate. When it is determined that the display is able to display the default resolution at the second refresh rate, the processor adds the second refresh rate into the extended display identification data.

Abstract: An antenna apparatus includes a radiator, a first grounding branch, and a second grounding branch. The radiator includes a feed point, a first radiation section, and a second radiation section. The first radiation section and the second radiation section are disposed on two sides of the feed point by a first gap and a second gap. A first ground end is disposed at one end of the first radiation section away from the first gap, and a second ground end is disposed at one end of the second radiation section away from the second gap. The first and second grounding branches intersect with the radiator. A matching circuit is coupled in series in the first grounding branch, and a first high-frequency filter is coupled in series in the second grounding branch.

Abstract: An illumination system and a projection device are provided. The illumination system includes an excitation light source, a wavelength conversion module and a light combining prism. The excitation light source emits an exciting light beam. The light combining prism has a first, second, and third surfaces. The exciting light beam enters the light combining prism through the first surface, and is totally reflected by the second surface to leave the light combining prism through the third surface and is transmitted to the wavelength conversion module. The exciting light beam is converted into a wavelength converted light beam by a wavelength conversion region of the wavelength conversion module or reflected by a reflecting region of the wavelength conversion module at different timings, and the wavelength converted light beam or the exciting light beam sequentially penetrates through the third surface and the second surface to leave the light combining prism.

Abstract: The present disclosure provides a method and a device for determining an edge application, an apparatus and a storage medium. The method includes: receiving a DNS addressing request from a UE, the DNS addressing request including indication information for addressing the edge application; obtaining information of a target edge application in accordance with the indication information for addressing the edge application; and transmitting the information of the target edge application to the UE.

Abstract: A method of generating a netlist of an IC device includes receiving gate region information of the IC device. The gate region information includes a width of the gate region, the width extending at least from a first edge of an active region to a second edge of the active region, a location of a gate via positioned within the active region and along the width, and a first gate resistance value corresponding to the gate region. The method includes determining a second gate resistance value based on the location and the width, and modifying the netlist based on the second gate resistance value.

Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.

Abstract: A semiconductor image sensor includes a pixel. The pixel includes a first substrate; and a photodiode in the first substrate. The semiconductor image sensor further includes an interconnect structure electrically connected to the pixel. The semiconductor image sensor further includes a reflection structure between the interconnect and the photodiode, wherein the reflection structure is configured to reflect light passing through the photodiode back toward the photodiode.

Abstract: The present disclosure provides a stellarator magnet based on cubic permanent magnet blocks and an arrangement optimization method thereof. For the characteristic that a three-dimensional magnet coil of a stellarator is complex in structure, the present disclosure provides the stellarator magnet based on the cubic permanent magnet blocks with uniform magnetization, same magnetization and same size; the magnetization directions of the cubic permanent magnet blocks are defined in a limited number of fixed alternative directions; the magnetic field configuration of the stellarator is generated by dipole magnetic fields provided by the permanent magnet blocks and planar coils, so that the device complexity of the stellarator is reduced, and the difficulty and cost of the machining and installation of the magnet are reduced.

Abstract: A method includes forming a first semiconductor layer over a substrate; forming a second semiconductor layer over the first semiconductor layer; forming a dummy gate structure over the second semiconductor layer; performing an etching process to form a recess in the first and second semiconductor layers; forming a epitaxy structure over in the recess, wherein the epitaxy structure is in contact with the first and second semiconductor layers; performing a solid phase diffusion process to form a doped region in the epitaxy structure, in which the doped region is in contact with the second semiconductor layer and is separated from the first semiconductor layer; and replacing the dummy gate structure with a metal gate structure.

Abstract: There is provided an array substrate including a plurality of pixel regions arranged in rows and columns. The plurality of pixel regions include a corresponding pixel electrode array and a corresponding pixel circuit associated with the corresponding pixel electrode array. Each of the pixel electrode arrays is arranged in rows and columns, and each pixel electrode array includes a plurality of pixel electrodes arranged in an array. The array substrate further includes a plurality of sets of gate lines extending in a row direction and a plurality of sets of data lines extending in a column direction. The plurality of sets of gate lines and rows of the pixel electrode arrays are alternately arranged with each other in the column direction. The plurality of sets of data lines and columns of the pixel regions are alternately arranged with each other in the row direction.

Abstract: An electronic device includes a first sub-pixel and a test element. The first sub-pixel includes a first transistor, and a first electronic unit. The first electronic unit is electrically connected to the first transistor. The test element is electrically connected to the first transistor. The test element has a first impedance, the first electronic unit has a second impedance, and the first impedance is higher than the second impedance.

Abstract: Managing multiple chain transaction rollback on a native cloud environment in a Kubernetes distributed system which extends API capabilities to build compensate API mappings which are used to reverse the invocation chain and stores the mappings in a key value store. An embodiment of the present invention extracts the reverse invocation chain from a framework of libraries and mapping API to check whether rollback is necessary when a service fails. An embodiment of the present invention executes an entire whole rollback.

Abstract: Disclosed are compounds of Formula (I), methods of using the compounds as immunomodulators, and pharmaceutical compositions comprising such compounds. The compounds are useful in treating, preventing or ameliorating diseases or disorders such as cancer or infections.

Abstract: A method for laser processing a packaging box is provided, which includes feeding a paper material printed with a pattern on the front side thereof to a cutting machine by back feeding using an automatic paper feeder; performing edge finding on the rear side of the paper material, and forming indentations on the rear side of the paper material corresponding to where the pattern is on the front side; conveying the paper material to a laser cutting machine to perform registration marking on the rear side of the paper material before laser cutting; and finally performing laser cutting based on the registration markings to obtain a packaging box with the pattern printed on the front side and the indentations formed on the rear side.