Abstract: The present disclosure provides a manufacturing method of an electronic device including the following steps. A substrate and a connecting element are provided, where the connecting element is disposed on the substrate. The connecting element is detected to obtain an opening, where the connecting element includes a first conductive line segment and a second conductive line segment, and the opening is located between the first conductive line segment and the second conductive line segment. A conductive element is provided corresponding to the opening. The conductive element is cured to form a first connecting line segment. An uncured portion of the conductive element is removed. A laser trimming process is performed on the first connecting line segment, wherein the first conductive line segment is electrically connected to the second conductive line segment through the first connecting line segment.

Abstract: An electronic device and an operation mode switching method thereof are provided. The electronic device includes a microphone group and a processor. The microphone group includes a plurality of microphones respectively configured at different positions for multi-directional sound collection. The processor receives a plurality of external sound signals through the microphone group, and obtains a plurality of target sound signals from the plurality of external sound signals. The processor defines decibel values of the plurality of target sound signals to analyze the decibel values of the plurality of target sound signals to obtain a current environment sound decibel value. The processor switches between a plurality of operating modes with different corresponding system performances according to the environment sound decibel value.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.

Abstract: The present application relates to a TGF-? inhibitor compound and its use. Specifically, the present application discloses a compound represented by formula (I) or formula (II), an isotopically labeled compound thereof, an optical isomer thereof, a geometric isomer thereof, a tautomer thereof or an isomer mixture thereof, a pharmaceutically acceptable salt thereof, or a prodrug thereof, or a metabolite thereof. The present application also relates to an application of the above compound in medicine.

Abstract: In a method of fabricating an image sensor, a photosensor wafer is formed, comprising an array of photosensors. A signal processing wafer is formed, comprising signal processing circuitry configured to receive and process photocharge collected by the photosensors of the photosensor wafer. A storage wafer is formed, comprising metal-insulator-metal (MIM) storage elements. The photosensor wafer is secured to a first side of the storage wafer, thereby electrically connecting the photosensors of the photosensor wafer and MIM storage elements of the storage wafer. The signal processing wafer is secured to a second side of the storage wafer, thereby electrically connecting the MIM storage elements of the storage wafer with the signal processing circuitry of the signal processing wafer.

Abstract: The present application relates to TGF-?inhibitor compounds and its use. Specifically, the present application discloses a compound represented by formula (I), an isotopically labeled compound thereof, an optical isomer thereof, a geometric isomer thereof, a tautomer thereof or an isomer mixture thereof, a pharmaceutically acceptable salt thereof, or a prodrug thereof, or a metabolite thereof. The present application also relates to an application of the above compound in medicine.

Abstract: An electronic device is provided and includes a chip and a connector electrically connected to the chip, in which the connector includes a conductive layer, a first insulating layer, and a second insulating layer, the conductive layer is disposed between the first insulating layer and the second insulating layer, the first insulating layer has a first transmittance for a light, the second insulating layer has a second transmittance for the light, and the first transmittance is different from the second transmittance.

Abstract: A semiconductor device and methods of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure with a fin top surface disposed on the substrate, a source/drain (S/D) region disposed on the fin structure, a gate structure disposed on the fin top surface, and a gate spacer with first and second spacer portions disposed between the gate structure and the S/D region. The first spacer portion extends above the fin top surface and is disposed along a sidewall of the gate structure. The second spacer portion extends below the fin top surface and is disposed along a sidewall of the S/D region.

Abstract: A method for improving service continuity is provided. The method is implemented by a reduced capability (RedCap) user equipment (UE) and includes generating a not-allowed cell list of new radio (NR) standalone (SA) cells. The method includes avoiding performing a mobility decision on the NR SA cells recorded in the not-allowed cell list during a mobility procedure or a measurement reporting procedure.

Abstract: A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure.

Abstract: A self-drilling expanding anchor bolt, including a drill bit for drilling, an anchor rod connected to the drill bit, and an expanding sleeve surrounding the anchor rod, the anchor rod having an expansion cone at a first end adjoining the drill bit, having a neck region behind and contiguous with the expansion cone, and having a threaded segment at a second end of the neck region remote from the drill bit, wherein the expansion cone expands the expanding sleeve in a radial direction when the expansion cone is pulled into the expanding sleeve; a transition part is provided between the drill bit and the expansion cone of the anchor rod, the maximum diameter of the transition part being smaller than the hole diameter of a drilled hole formed by the drill bit.

Abstract: The present disclosure relates to an integrated chip processing tool. The integrated chip processing tool includes a gas distribution ring configured to extend along a perimeter of a process chamber. The gas distribution ring includes a lower ring extending around the process chamber. The lower ring has a plurality of gas inlets arranged along a bottom surface of the lower ring and a plurality of gas conveyance channels arranged along an upper surface of the lower ring directly over the plurality of gas inlets. The gas distribution ring further includes an upper ring disposed on the upper surface of the lower ring and covering the plurality of gas conveyance channels. A plurality of gas outlets are arranged along opposing ends of the plurality of gas conveyance channels. A plurality of gas conveyance paths extending between the plurality of gas inlets and the plurality of gas outlets have approximately equal lengths.

Abstract: An electronic device includes a conductive layer, a first dielectric layer, and a second dielectric layer, in which the second dielectric layer is disposed on the first dielectric layer, the conductive layer is disposed between the first dielectric layer and the second dielectric layer, the first dielectric layer has a first transmittance for a light, the second dielectric layer has a second transmittance for the light, and the first transmittance is different from the second transmittance.

Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.

Abstract: A compound and the method for treating bacterial infections thereof are provided, wherein the compound is derived from AS101 and having a general formula (I) or a general formula (II), and wherein the method includes administering an effective amount of compound having the general formula (I) or a compound having the general formula (I) and its pharmaceutically acceptable salt thereof.

Abstract: An electronic device including at least one light emitting chip, a circuit chip, and a base is provided. The base having a first surface, a second surface opposite to the first surface and at least one conductive via extending from the first surface to the second surface, the base is disposed between the at least one light emitting chip and the circuit chip, and the base is greater than one of the at least one light emitting chip in thickness. The circuit chip is electrically connected to the at least one light emitting chip through the at least one conductive via and configured to control the at least one light emitting chip.

Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.

Abstract: A semiconductor device and methods of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure with a fin top surface disposed on the substrate, a source/drain (S/D) region disposed on the fin structure, a gate structure disposed on the fin top surface, and a gate spacer with first and second spacer portions disposed between the gate structure and the S/D region. The first spacer portion extends above the fin top surface and is disposed along a sidewall of the gate structure. The second spacer portion extends below the fin top surface and is disposed along a sidewall of the S/D region.

Abstract: A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure.

Abstract: In some embodiments, the present disclosure relates to a method that includes forming a dielectric layer over a conductive structure on a substrate. A removal process is performed to remove a portion of the dielectric layer to expose a portion of the conductive structure. The substrate is transported into a cleaning chamber having a wafer chuck below a bell jar structure. A cleaning process is performed to clean the exposed portion of the conductive structure by turning on a noble gas source to introduce a noble gas within the cleaning chamber, turning on an oxygen gas source to introduce oxygen within the cleaning chamber, applying a first bias to a plasma coil to form a plasma gas, and applying a second bias to the wafer chuck. The substrate is removed from the cleaning chamber. A conductive layer is formed over the dielectric layer and coupled to the conductive structure.