Abstract: The present disclosure provides a semiconductor device with a plurality of semiconductor channel layers. The semiconductor channel layers include a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer. A strain in the second semiconductor layer is different from a strain in the first semiconductor layer. A gate is disposed over the plurality of semiconductor channel layers.

Abstract: The present invention relates to novel fungicidal compositions, to their use in agriculture or horticulture for controlling diseases caused by phytopathogens, especially phytopathogenic fungi, and to methods of controlling diseases on useful plants.

Abstract: The present disclosure provides novel crystalline forms of a compound that acts as a CDK9 modulator, processes for preparing the novel crystalline forms of a compound that acts as a CDK9 modulator, and uses thereof.

Abstract: Representative embodiments disclose machine learning classifiers used in scenarios such as speech recognition, image captioning, machine translation, or other sequence-to-sequence embodiments. The machine learning classifiers have a plurality of time layers, each layer having a time processing block and a depth processing block. The time processing block is a recurrent neural network such as a Long Short Term Memory (LSTM) network. The depth processing blocks can be an LSTM network, a gated Deep Neural Network (DNN) or a maxout DNN. The depth processing blocks account for the hidden states of each time layer and uses summarized layer information for final input signal feature classification. An attention layer can also be used between the top depth processing block and the output layer.

Abstract: The present disclosure relates to a class of JAK inhibitor compounds and uses thereof. Specifically, the present disclosure discloses a compound represented by formula (G), isotopically labeled compound thereof, or optical isomer thereof, geometric isomer thereof, a tautomer thereof or a mixture of various isomers, or a pharmaceutically acceptable salt thereof, or a prodrug thereof, or a metabolite thereof. The present disclosure also relates to the application of the compounds in medicine.

Abstract: A setting device for a self-drilling anchor bolt of the present invention includes: a drive shaft, one end thereof having a shank for connecting to an impact tool, and another end being a setting part for pushing the self-drilling anchor bolt axially; a coupling, partially surrounding the drive shaft along an axis, and being supported on the drive shaft in such a way as to be incapable of relative rotation while being axially moveable at least locally; and a releasable locking component, disposed between the drive shaft and the coupling; in a locked position, the locking component is coupled to an extremity of an anchor rod such that the anchor rod is fed axially with rotational striking into a receiving material, and in a released position, the drive shaft strikes a sleeve to advance axially along the anchor rod and expand at an expansion part.

Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.

Abstract: Some implementations described herein include a complementary metal oxide semiconductor image sensor device and techniques to form the complementary metal oxide semiconductor image sensor device. The complementary metal oxide semiconductor image sensor device includes a includes a first array of photodiodes stacked over a second array of photodiodes. A polarization structure is between the first array of photodiodes and the second array of photodiodes. Signaling generated by the first array of photodiodes (e.g., signaling corresponding to unpolarized light waves) may be multiplexed with signaling generated by the second array of photodiodes (e.g., signaling corresponding to polarized light waves). The complementary metal oxide semiconductor image sensor device further includes a filter structure that filters visible light waves and near infrared light waves amongst the first array of photodiodes and the second array of photodiodes.

Abstract: An electronic device is provided. The electronic device includes a substrate, a material layer, a first metal layer, and a second metal layer. The material layer is disposed on the substrate, wherein a material of the material layer includes polysilicon, amorphous silicon, or indium gallium zinc oxide. The first metal layer is disposed on the material layer, wherein a first edge of the first metal layer includes a first curved portion. The second metal layer is disposed on the material layer, wherein a second edge of the second metal layer includes a second curved portion, and the second edge surrounds the first edge.

Abstract: A semiconductor device includes a first layer that includes a first semiconductor material disposed on a semiconductor substrate, and a second layer of a second semiconductor material disposed on the first layer. The semiconductor substrate includes Si. The first semiconductor material and the second semiconductor material are different. The second semiconductor material is formed of an alloy including a first element and Sn. A surface region of an end portion of the second layer at both ends of the second layer has a higher concentration of Sn than an internal region of the end portion of the second layer. The surface region surrounds the internal region.

Abstract: An electronic device including a plurality of light-emitting units, a driving circuit, and a controlling circuit is provided. The driving circuit is configured to drive at least one of the light-emitting units. The controlling circuit is configured to control the driving circuit. The plurality of light-emitting units, the driving circuit, and the controlling circuit are respectively disposed on different substrate.

Abstract: The present disclosure relates to an integrated chip processing tool. The integrated chip processing tool includes a gas distribution ring configured to extend along a perimeter of a process chamber. The gas distribution ring includes a lower ring extending around the process chamber. The lower ring has a plurality of gas inlets arranged along a bottom surface of the lower ring and a plurality of gas conveyance channels arranged along an upper surface of the lower ring directly over the plurality of gas inlets. The gas distribution ring further includes an upper ring disposed on the upper surface of the lower ring and covering the plurality of gas conveyance channels. A plurality of gas outlets are arranged along opposing ends of the plurality of gas conveyance channels. A plurality of gas conveyance paths extending between the plurality of gas inlets and the plurality of gas outlets have approximately equal lengths.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first wafer including a first metal structure within a body of the first wafer. The semiconductor structure also includes a second wafer including a second metal structure within a body of the second wafer, where the first wafer is coupled to the second wafer at an interface. The semiconductor structure further includes a metal bonding structure coupled to the first metal structure and the second metal structure and extending through the interface.

Abstract: In some embodiments, the present disclosure relates to a process tool that includes a chamber housing defining a processing chamber. Within the processing chamber is a wafer chuck configured to hold a substrate. Further, a bell jar structure is arranged over the wafer chuck such that an opening of the bell jar structure faces the wafer chuck. A plasma coil is arranged over the bell jar structure. An oxygen source coupled to the processing chamber and configured to input oxygen gas into the processing chamber.

Abstract: A CMOS image sensor includes a unit pixel array including a photodiode array, a color filter array, a micro-lens array, and a grid isolation structure laterally separating adjacent color filters. The grid isolation structure includes a first low-n grid, a second low-n grid underlying the first low-n grid, and a metal grid within the second low-n grid, the first low-n grid being narrower than the second low-n grid. The color filter array includes color filter matrixes, all color filter matrixes have the same arrangement pattern. Sizes of color filters in each color filter matrix vary depending on locations of the color filters in the color filter matrix. In an edge portion, a distance between a center of a color filter matrix and a center of a corresponding unit pixel matrix in plan view varies depending on a location of the unit pixel matrix in the CMOS image sensor.

Abstract: A method for extracting pullulan polysaccharide from high-viscosity fermentation broth includes following steps: (1) removing cells from the fermentation broth; (2) removing proteins; (3) decolorizing by macroporous resin adsorption; (4) removing ions by ultrafiltration; and (5) drying, crushing and packaging. In the extraction method of the present application, by using natural polymer bioflocculant chitosan, the high-viscosity fermentation broth can be processed without dilution and addition of filter aids and organic solvents for alcohol precipitation, which reduces the pressure of subsequent decolorization, properly recycles the cell proteins, and avoids the potential hazard of the organic solvents. The method can obtain high-purity pullulan polysaccharide, improving the product yield and quality, reducing solid waste, reducing the production cost, and achieving a safe, efficient, continuous and automated production process.

Abstract: A semiconductor device and methods of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure with a fin top surface disposed on the substrate, a source/drain (S/D) region disposed on the fin structure, a gate structure disposed on the fin top surface, and a gate spacer with first and second spacer portions disposed between the gate structure and the S/D region. The first spacer portion extends above the fin top surface and is disposed along a sidewall of the gate structure. The second spacer portion extends below the fin top surface and is disposed along a sidewall of the S/D region.

Abstract: A method includes steps of: based on training sets of gastrointestinal images, using a predetermined machine learning algorithm to obtain a preliminary model; feeding preliminary validation sets of gastrointestinal images into the preliminary model to obtain estimation results; based on the estimation results, selecting, from the preliminary validation sets of gastrointestinal images, a series of successive images as a selected validation set of gastrointestinal images; based on the selected validation set of gastrointestinal images, tuning parameters of the preliminary model to result in a speed-determining model for determining a moving speed of an endoscope camera.

Abstract: The present disclosure provides bifunctional compounds comprising a target protein binding moiety and a E3 ubiquitin ligase binding moiety, and associated methods of use.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first wafer including a first metal structure within a body of the first wafer. The semiconductor structure also includes a second wafer including a second metal structure within a body of the second wafer, where the first wafer is coupled to the second wafer at an interface. The semiconductor structure further includes a metal bonding structure coupled to the first metal structure and the second metal structure and extending through the interface.