Abstract: A method includes forming first nanostructures over a first region of a substrate; forming second nanostructures over a second region of the substrate; forming first gate structures around the first nanostructures; replacing the second nanostructures with isolation regions; and forming a seal ring over the substrate, wherein the seal ring is between the first region and the second region.

Abstract: An embodiment is a device including a first die and a substrate including a first surface and a second surface opposite the first surface. The device also includes an active device on the first surface of the substrate. The device also includes a first interconnect structure on the first surface of the substrate. The device also includes a through substrate via extending through the first interconnect structure and the substrate to the second surface of the substrate, the through substrate via being electrically coupled to metallization patterns in the first interconnect structure. The device also includes one or more material-filled trench structures extending from the second surface of the substrate into the substrate, the one or more material-filled trench structures being electrically isolated from the through substrate via.

Abstract: An optical detection system integrating tonometer and autorefractor includes first and second optical modules. The first optical module includes a light source, first and second lens sets, a reflector, a first light-splitter and a sensor. The first lens set and reflector are disposed corresponding to light source. The first light-splitter is disposed corresponding to the reflector, second lens set and sensor. The second optical module includes a second light-splitter and first to third optical elements. The incident light emitted by the light source passes through the first lens, reflected by the reflector, passes through the first light-splitter, reflected by the second light-splitter, passes through the first to third optical elements and emitted to an eye. A sensing light from the eye passes through the third to first optical elements, reflected by the second light-splitter and first light-splitter, passes through the second lens set and emitted to the sensor.

Abstract: An optical biometer includes a light-source module, a light-splitting module, a reference-arm, a sensing-arm and a sensing module. The light-source module emits incident-light. The light-splitting module, disposed corresponding to light-source module, divides the incident-light into reference light and sensing light. The reference-arm, disposed corresponding to light-splitting module, generates a first reflected-light according to the reference light. The sensing-arm, disposed corresponding to the light-splitting module, emits the sensing light to the eye and receives a second reflected-light from the eye. The sensing module generates a sensing result according to the first reflected-light and second reflected-light. In a first mode, the sensing light is emitted to a first position of the eye. In a second mode, the sensing light is emitted to a second position of the eye.

Abstract: An integrated plugging and perforating operation system is provided, including an operation truck, a wellhead equipment pry, and a centralized control room. A mechanical mechanism and a power mechanism are arranged on a chassis of the operation truck. The mechanical mechanism includes a turntable assembly, where a telescopic arm assembly is installed on the turntable assembly, a mechanical arm assembly for logging operation is installed at an operating end of the telescopic arm assembly, and a logging winch assembly and a follow-up winch assembly are arranged at a counterweight end of the telescopic arm assembly to form a counter weight of the telescopic arm assembly. The power mechanism is configured for providing power output to the mechanical mechanism.

Abstract: The present application provides methods for producing circular RNAs (circRNAs) from a DNA construct encoding a linear RNA precursor, wherein the linear RNA precursor comprises from the 5?-end to the 3? end: a 3? catalytic Group I intron fragment, a 3? exon sequence, an effector RNA sequence, a 5? exon sequence, and a 5? catalytic Group I intron fragment, wherein the method comprises an in vitro single-pot reaction. In some embodiments, the single-pot reaction does not comprise supplementing the reagent composition with GTP, a divalent metal ion such as Mg2+, or DNase I prior to circularization of a linear RNA precursor.

Abstract: A wellhead automatic positioning method and a system of a plugging and perforating operation machine are provided. The method includes: determining a wellhead position, and acquiring standard positioning parameters of a boom according to the wellhead position and a tool string length, where the positioning parameters include a standard extension length L of the boom, a standard lifting length J, and an included angle ? between a projection of the boom and a wellhead; acquiring actual positioning parameters of the boom, where the actual positioning parameters include an actual length L? of the boom, an actual lifting length J?, and an initial angle ?? between the projection of the boom and the wellhead; and according to the standard positioning parameters and the actual positioning parameters of the boom, making the boom to extend and retract, lift and lower, and rotate to complete automatic positioning of the wellhead.

Abstract: A layout pattern of static random-access memory (SRAM) includes a substrate, a plurality of diffusion regions and a plurality of gate structures are located on the substrate, each diffusion region includes a first diffusion region, a second diffusion region, a third diffusion region, a fourth diffusion region, a fifth diffusion region, a sixth diffusion region, a seventh diffusion region and an eighth diffusion region, and each gate structure spans the plurality of diffusion regions. The plurality of gate structures include a first gate structure, the first gate structure includes a first L-shaped portion, which spans the first diffusion region and the fifth diffusion region and forms a first pull-down transistor (PD1), the first diffusion region is adjacent to and in direct contact with the fifth diffusion region.

Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.

Abstract: The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.

Abstract: A method includes forming a device die including forming integrated circuits on a semiconductor substrate; and forming a thermally conductive pillar extending into the semiconductor substrate. A cooling medium is attached over and contacting the semiconductor substrate to form a package, wherein the cooling medium is thermally coupled to the thermally conductive pillar.

Abstract: An electronic device including at least one light emitting chip, a circuit chip, and a base is provided. The base having a first surface, a second surface opposite to the first surface and at least one conductive via extending from the first surface to the second surface, the base is disposed between the at least one light emitting chip and the circuit chip, and the base is greater than one of the at least one light emitting chip in thickness. The circuit chip is electrically connected to the at least one light emitting chip through the at least one conductive via and configured to control the at least one light emitting chip.

Abstract: A method includes receiving a workpiece including a device layer disposed on a frontside of the workpiece, forming a frontside interconnect structure over the device layer, attaching a carrier substrate over the frontside interconnect structure, and etching from a backside of the workpiece to form first trenches and second trenches. The first trenches extend partially into the carrier substrate for a distance less than the second trenches. The method also includes forming a plurality of first conductive features in the first trenches and a plurality of second conductive features in the second trenches, forming a backside interconnect structure covering the first conductive features and the second conductive features, and thinning the carrier substrate from the frontside of the workpiece to expose the second conductive features. The first conductive features remain partially embedded in the carrier substrate.

Abstract: Interconnect structures for front-to-front stacked chips/dies and methods of fabrication thereof are disclosed herein. An exemplary system on integrated circuit (SoIC) includes a first die that is front-to-front bonded with a second die, for example, by bonding a first topmost metallization layer of a first frontside multilayer interconnect of the first die to a second topmost metallization layer of a second frontside multilayer interconnect of the second die. A through via extends partially through the first frontside multilayer interconnect of the first die, through a device layer of the first die, through a backside power rail of the first die, and through a carrier substrate. The backside power rail is between the carrier substrate and the device layer, and the backside power rail may be a portion of a backside multilayer interconnect of the first die. The through via may be connected to a redistribution layer (RDL) structure.

Abstract: The present disclosure discloses a digital-to-analog conversion apparatus having a signal calibration mechanism. A conversion circuit performs digital-to-analog conversion on a digital signal to generate an output analog signal. An echo transmission circuit performs down-sampling on an echo path that the output analog signal passes through to generate an echo signal. Selected data and non-selected data included in N input parts of the input digital signal are treated as a pseudo-noise input and a signal input by N calibration circuits in an echo calibration circuit so as to be mapped by codeword offset tables and processed by groups of response coefficients to generate N calibration parts of a calibration signal. A calibration parameter calculation circuit generates offsets according to the echo signal, converges the response coefficients according to an error signal and pseudo noise transmission path information and updates the codeword offset tables accordingly.

Abstract: This application relates to communicating information between communication devices. A channel coding method is disclosed. A communication device obtains an input sequence of K bits. The communication device encodes the input sequence using a low density parity check (LDPC) matrix H, to obtain an encoded sequence. The LDPC matrix H is determined according to a base matrix and a lifting factor Z. The base matrix includes m rows and n columns, m is greater than or equal to 5, and n is greater than or equal to 27. The lifting factor Z satisfies a relationship of 22*Z?K. According to the encoding method provided in the embodiments, information bit sequences of a plurality of lengths can be encoded for transmission between the communication devices.

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.

Abstract: A liquid storage tank may include a body with an inner cavity, wherein a first liquid storage area and a second liquid storage area are provided in the body, and a partition is provided between the first liquid storage area and the second liquid storage area. A heater for heating solution is provided in the first liquid storage area. A liquid outlet is provided in the second liquid storage area.

Abstract: A semiconductor device includes a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor on a substrate. The second MOS transistor is electrically connected to the first MOS transistor. The first MOS transistor includes a first gate dielectric layer and a first gate electrode on the first gate dielectric layer. The second MOS transistor includes a second gate dielectric layer and a second gate electrode on the second gate dielectric layer. The second gate electrode includes a first portion of a first conductivity type and second portions of a second conductivity type on opposite sides of the first portion. The width of the first portion is less than half of the total width of the second gate electrode.