Abstract: An electronic system sharing power of doorbell includes a switch circuit and an electronic device. The first and second connection terminals of the switch circuit are respectively coupled to two doorbell contacts. The second and third connection terminals of the switch circuit are respectively coupled to two ends of a doorbell. Two power terminals of the electronic device are respectively coupled to two switch contacts. A function circuit of the electronic device is coupled between the two power terminals. In a normal mode, the first connection terminal is conducted to the second connection terminal inside the switch circuit, and the two power terminals are disconnected to each other by a doorbell actuating unit of the electronic device. In a ringing mode, the doorbell actuating unit short-circuits the two power terminals, and the first connection terminal is conducted to the third connection terminal inside the switch circuit.

Abstract: A polyester sheet includes at least one modified layer made from a polyester composition including a polyester, a polyester-polyether copolymer, a slip agent which has a solubility parameter ranging from 17 MPa1/2 to 22 MPa1/2, and an anti-blocking agent. Based on 100 parts by weight of the polyester, the polyester-polyether copolymer is present in an amount ranging from 0.5 part by weight to 5 parts by weight, the slip agent is present in an amount ranging from 0.02 part by weight to 0.5 part by weight, and the anti-blocking agent is present in an amount ranging from 0.05 part by weight to 0.6 part by weight.

Abstract: A mechanical multi-rod disc brake contains: a braking unit including an engagement structure having two bases, two swing arms, two wear-resistant sleeves, and two fixing pistons between which an accommodation space is defined so as to accommodate a stop disc. A respective one wear-resistant sleeve has a respective one fixing piston. A drive unit includes a multi-rod structure, and a respective one rotary shaft is rotatably connected with a respective one driven bolt rotatably connected with a respective one driving member via a respective one connection portion. A respective one joining element has a receiving hole rotatably connected with of a first extension of a first connection stein or a second extension of a second connection stein. Each of the first extension and the second extension has a resilient element, and the first and second extensions are connected with a brake cable via the first and second apertures.

Abstract: A semiconductor device includes a first metal-oxide semiconductor (MOS) transistor on a first substrate, a first interlayer dielectric (ILD) layer on the first MOS transistor, a second substrate on the first ILD layer, and a second MOS transistor on a second substrate. Preferably, the semiconductor device includes a static random access memory (SRAM) and the SRAM includes a first pull-up device, a second pull-up device, a first pull-down device, a second pull-down device, a first pass-gate device, a second pass-gate device, a read port pull-down device, and a read port pass-gate device, in which the read port pull-down device includes the first MOS transistor and the read port pass-gate device includes the second MOS transistor.

Abstract: A heat dissipation device adapted to dissipate heat of a heat source in an electronic system. The heat dissipation device includes a thermally conductive plastic shell and a fluid. The thermally conductive plastic shell has at least one sealed accommodation space. The fluid completely fills the at least one sealed accommodation space of the thermally conductive plastic shell.

Abstract: This paper presents a practical method for measuring the impact of multiple marketing events on sales, including marketing events that are not traditionally trackable. The technique infers which of several competing media events are likely to have caused a given conversion. The method is tested using hold-out sets, and also a live media experiment for determining whether the method can accurately predict television-generated web conversions.

Abstract: A memory apparatus and compensation method for a computation result thereof are provided. The memory apparatus includes a memory sub-block, a reference memory sub-block and a control circuit. During a computation phase, the memory sub-block receives an input signal, and generates a computation result by a multiply-accumulate operation according to the input signal. The reference memory sub-block includes a plurality of memory cells pre-programmed with a reference weight value. The reference memory sub-block receives a reference input signal during a calibration phase, and generates a reference computation value by a multiply-accumulate operation according to the reference input signal and the reference weight value. The control circuit generates an adjustment value according to the reference computation value and a standard computation value, and during the computation phase, adjusts the computation result according to the adjustment value to generate an adjusted computation result.

Abstract: A receiver includes an equalizer circuit, a radio frequency interference cancellation circuitry, and a channel estimation circuitry. The equalizer circuit is configured to process a first data signal according to a control signal, in order to generate a second data signal. The radio frequency interference cancellation circuitry is configured to detect a radio interference signal according to the second data signal to generate radio interference information, and to output a correction signal according to the radio interference information, in order to correct the second data signal. The channel estimation circuitry configured to analyze a plurality of sets of signal components in the second data signal, and to utilize a power ratio of one of the plurality of sets of signal components to generate the control signal.

Abstract: A receiver includes a first data slicer circuit and a radio interference detector circuitry. The first data slicer circuit is configured to generate a second data signal according to a first data signal. The radio interference detector circuitry is configured to generate first estimated information according to the first data signal, to generate second estimated information according to the second data signal, to generate third estimated information according to the first data signal and the second data signal, and to detect a radio interference signal according to the first estimated information, the second estimated information, and the third estimated information.

Abstract: A receiver includes a first data slicer circuit and a radio interference detector circuitry. The first data slicer circuit is configured to generate a second data signal according to a first data signal. The radio interference detector circuitry is configured to generate first estimated information according to the first data signal, to generate second estimated information according to the second data signal, to generate third estimated information according to the first data signal and the second data signal, and to detect a radio interference signal according to the first estimated information, the second estimated information, and the third estimated information.

Abstract: This paper presents a practical method for measuring the impact of multiple marketing events on sales, including marketing events that are not traditionally trackable. The technique infers which of several competing media events are likely to have caused a given conversion. The method is tested using hold-out sets, and also a live media experiment for determining whether the method can accurately predict television-generated web conversions.

Abstract: A memory storage system is provided according to an exemplary embodiment of the disclosure. The memory storage system includes a host system and a memory storage device. In a first handshake operation, the memory storage device transmits first encrypted information corresponding to first authentication information to the host system, and the host system transmits second encrypted information corresponding to the first authentication information to the memory storage device. In a second handshake operation, the memory storage device transmits third encrypted information corresponding to second authentication information to the host system, and the host system transmits fourth encrypted information corresponding to third authentication information to the memory storage device based on the third encrypted information. The third authentication information is configured to encrypt data transmitted between the host system and the memory storage device in a developer command transmission stage.

Abstract: An artificial intelligence accelerator receives a binary input data set and a selected layer of layers of overall weight pattern. The artificial intelligence accelerator includes processing tiles and a summation output circuit. Each processing tile receives one of input data subsets of the input data set and performs a convolution operation on weight blocks of each sub weight pattern of the overall weight pattern to obtain weight operation values and then obtains a weight output value expected from a direct convolution operation on the input data subset with the sub weight pattern through performing a multistage shifting and adding operation on the weight operation values. The summation output circuit sums up the plurality of weight output values through a multistage shifting and adding operation, so as to obtain a sum value expected from a direct convolution operation performed on the input data set with the overall weight pattern.

Abstract: A video transmission method and a system thereof are provided. The video transmission method includes: obtaining a first display timing setting parameter of one or more display devices. A total transmission bandwidth of the display device is calculated according to the first display timing setting parameter, and when the total transmission bandwidth is greater than a maximum transmission bandwidth between a video source and a conversion device, a second display timing setting parameter with a lower bandwidth is generated corresponding to the first display timing setting parameter. The video source transmits a video signal conforming to the second display timing setting parameter to the conversion device. The conversion device converts the second display timing setting parameter of the video signal back to the first display timing setting parameter. The video signal conforming to the first display timing setting parameter is transmitted to the corresponding display device.

Abstract: A Radio Frequency Interference (RFI) estimation device for generating an estimated RFI signal includes a combiner, a first multiplier and a second multiplier. The combiner is configured to combine a first digital signal and a second signal to generate the estimated RFI signal. The first multiplier is configured to generate the first digital signal according to an in-phase signal and a first cosine signal. The second multiplier is configured to generate the second digital signal according to a quadrature-phase signal and a first sine signal. The first cosine signal and the first sine signal are generated based on a frequency and the in-phase signal and the quadrature-phase signal are generated based on the frequency and one or more harmonics of the frequency.

Abstract: A signal processing device includes a decision feedback equalizer and a coefficient adjusting circuit. The decision feedback equalizer includes a first equalizer configured to perform filtering on a first signal according to a set of first coefficients to generate a first filtered signal. The set of first coefficients includes multiple first coefficients. The coefficient adjusting circuit is configured to adaptively adjust one or more of the first coefficients according to an error signal. A limit operation of the first coefficients is selectively performed. When the limit operation of the first coefficients is performed, at least one of the first coefficients is set to a first predetermined value to generate a set of limited first coefficients.

Abstract: The present invention provides a transceiver. The transistor is coupled to a transmission line. The transceiver includes a variable resistor set, a transmitter module, a receiver module, and a digital signal processor. The transmitter module has an output terminal coupled to the variable resistor set and the transmission line. The transmitter module includes a first digital-to-analog converter configured to output an emission current. The receiver module has an input terminal coupled to the transmitter module and the transmission line. When the emission current is fed into the transmission line, a far-end echo is fed into the receiver module. An amplitude of the far-end echo is associated with a resistance value of the transmission line. The digital signal processor adjusts a current value of the emission current from a first default current value to a second default current value based on the amplitude of the far-end echo.

Abstract: An analog to digital converter device includes a capacitor array, a digital logic circuit, and a comparator circuit. The capacitor array includes first capacitors, a capacitor to be calibrated, and compensation capacitors. The digital logic circuit performs a calibration on the capacitor to be calibrated, in order to calibrate a weighed value of the capacitor to be calibrated according to a decision signal, and converts an input signal to bits via the capacitor array after the calibration is performed. The comparator circuit compares a testing signal with a predetermined voltage to generate the decision signal. The testing signal is generated by the first capacitors and the capacitor to be calibrated in response to the calibration. The digital logic circuit further selects at least one of the compensation capacitors, in order to adjust a digital code corresponding to a calibrated weighed value to be an integer expressed by the bits.

Abstract: A communication device capable of echo cancellation includes a digital circuit, a transmitter circuit, a hybrid circuit, an adjustable capacitor circuit, and a receiver circuit. The digital circuit transmits a digital transmission signal and receives a digital reception signal. The transmitter circuit outputs an analog transmission differential signal according to the digital transmission signal. The hybrid circuit outputs a transmission signal to an external circuit via an adjustable capacitor circuit according to the analog transmission differential signal, and outputs an analog reception differential signal to a receiver circuit according to at least one of the analog transmission differential signal and a reception signal from the external circuit. The adjustable capacitor circuit controls a delay difference between positive-end and negative-end signals of the transmission signal according to an echo cancellation control signal.

Abstract: A method and device for processing data and a storage medium are provided. The method is applied to a control device, and includes that an operation instruction for a state parameter of a controlled device is monitored and a present state parameter of the controlled device is determined responsive to monitoring an operation instruction representing saving of the state parameter. The determined present state parameter is saved as a state parameter in a preset mode.