Patents by Inventor Liang Yu

Liang Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210334020
    Abstract: A set of memory management operations is executed on multiple memory dies of a memory sub-system. Voltage parameter levels corresponding to the set of memory management operations are determined. Information representing a voltage parameter level and a corresponding portion of the set of memory management operations is determined based on the set of voltage parameter levels. A request is received from a host system to execute a target portion of a memory management operation. First information corresponding to the target portion of the memory management operation is identified. Based on the first voltage parameter level, power management action is performed.
    Type: Application
    Filed: April 22, 2020
    Publication date: October 28, 2021
    Inventors: Liang Yu, William C. Filipiak
  • Publication number: 20210294407
    Abstract: A workload level in an incoming request queue is determined based on one or more operations requested by a host system for execution by a memory sub-system. Based on the workload level in the incoming request queue, a set of memory dies of the memory sub-system to be activated for execution of the one or more operations is identified. Based on a power budget level, a power mode configuration for a memory die of the set of memory dies is determined. One or more parameters of the memory die are configured to establish the power mode configuration.
    Type: Application
    Filed: March 17, 2020
    Publication date: September 23, 2021
    Inventors: Liang Yu, Jonathan Parry
  • Patent number: 11119844
    Abstract: Embodiments provide a recovery method for a terminal device startup failure and a terminal device. The method includes: determining that a failure indication event occurs in a startup process, where the failure indication event is used to indicate a startup failure; determining at least one recovery policy based on a type of the failure indication event and/or a cause of the failure indication event; and performing startup recovery based on the at least one recovery policy.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: September 14, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Liang Zhang, Dechun Qi, Xiaoyan Zhou, Zhiqiang Li, Liang Yu, Dengzhou Xia, Chunhua Hu, Zhongsheng Yan
  • Publication number: 20210273119
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a varactor comprising a reduced surface field (RESURF) region. The method includes forming a drift region having a first doping type within a substrate. A RESURF region having a second doping type is formed within the substrate such that the RESURF region is below the drift region. A gate structure is formed on the substrate. A pair of contact regions is formed within the substrate on opposing sides of the gate structure. The contact regions respectively abut the drift region and have the first doping type, and wherein the first doping type is opposite the second doping type.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Inventors: Liang-Yu Su, Chih-Wen Yao, Hsiao-Chin Tuan, Ming-Ta Lei
  • Publication number: 20210249404
    Abstract: The present disclosure provides a electrostatic discharge (ESD) protection circuit, coupled between a first reference terminal and a second reference terminal; the ESD protection circuit includes a first voltage divider, a second voltage divider, a first trigger circuit and a second trigger circuit. The first trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the first reference terminal, and the second terminal is coupled to the second reference terminal via the first voltage divider. The second trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the second reference terminal, the second terminal is coupled to the first reference terminal via the second voltage divider, and the second trigger circuit and the first trigger circuit are in parallel connection.
    Type: Application
    Filed: March 31, 2021
    Publication date: August 12, 2021
    Inventors: MING-FANG LAI, LIANG-YU SU, HANG FAN
  • Publication number: 20210217906
    Abstract: A method for forming semiconductor devices includes providing a substrate with a conductive pad formed thereon; forming a transparent structure over the substrate, wherein the transparent structure includes a plurality of collimating pillars adjacent to the conductive pad; forming a light-shielding structure over the plurality of collimating pillars and the conductive pad; performing a cutting process to remove one or more materials directly above the conductive pad, while leaving remaining material to cover the conductive pad, wherein the material includes a portion of the light-shielding structure; and performing an etching process to remove the remaining material to expose the conductive pad.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 15, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Chih-Hsien CHEN
  • Patent number: 11027734
    Abstract: A braking control method for a braking system of a vehicle is provided according to an exemplary embodiment of the disclosure. The braking control method comprises: obtaining a total braking distance and a first speed of the vehicle; obtaining braking delay information related to the braking system, wherein the braking delay information includes first time information and second time information, the first time information reflects a delay time of a braking signal, and the second time information reflects a preparation time for performing a braking operation according to the braking signal by the braking system; obtaining deceleration information according to the total braking distance, the first speed and the braking delay information; generating the braking signal according to the deceleration information; and performing the braking operation according to the braking signal.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: June 8, 2021
    Assignee: Acer Incorporated
    Inventors: Liang-Yu Ke, Yu-Min Cheng
  • Patent number: 11018266
    Abstract: Various embodiments of the present disclosure are directed towards a varactor comprising a reduced surface field (RESURF) region. In some embodiments, the varactor includes a drift region, a gate structure, a pair of contact regions, and a RESURF region. The drift region is within a substrate and has a first doping type. The gate structure overlies the drift region. The contact regions are within the substrate and overlie the drift region. Further, the contact regions have the first doping type. The gate structure is laterally sandwiched between the contact regions. The RESURF region is in the substrate, below the drift region, and has a second doping type. The second doping type is opposite the first doping type. The RESURF region aids in depleting the drift region under the gate structure, which decreases the minimum capacitance of the varactor and increases the tuning range of the varactor.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: May 25, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Liang-Yu Su, Chih-Wen Yao, Hsiao-Chin Tuan, Ming-Ta Lei
  • Patent number: 11001637
    Abstract: The present invention provides high affinity anti-CD40 monoclonal antibodies and related compositions, which may be used in any of a variety of therapeutic methods for the treatment of cancer and other diseases.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: May 11, 2021
    Assignee: Apexigen, Inc.
    Inventors: Yongke Zhang, Guo-Liang Yu, Weimin Zhu
  • Patent number: 11005512
    Abstract: Various embodiments are described herein that improve the signal reception and transmission capabilities of an access point by coupling an active antenna assembly to the access point. An active antenna assembly includes an antenna and at least one active component, such as a low-noise amplifier or a power amplifier. The active component can be connected to an antenna circuit board rather than the main circuit board of the access point, which is typically retained within an access point housing. By positioning the active component near the antenna, the active antenna assembly prevents degradation of signals received by the antenna. One or more coaxial cables can be used to connect the active component of the active antenna assembly to the main circuit board of the access point.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: May 11, 2021
    Assignee: NETGEAR, INC.
    Inventors: Joseph Amalan Arul Emmanuel, Shun-Liang Yu, Mark G. Merrill, Peiman Amini
  • Publication number: 20210106716
    Abstract: The present disclosure provides a biofragmentable sponge, comprising a three-dimensional porous scaffold formed by freeze-drying a mixture of about 5% to about 20% (w/w) of silk protein, about 5% to about 85% (w/w) of a water soluble synthetic polymer or a mixture of water soluble synthetic polymers, and about 10% to about 90% (w/w) of a polysaccharide.
    Type: Application
    Filed: October 9, 2019
    Publication date: April 15, 2021
    Inventors: Jen-Chang YANG, Liang-Yu CHANG, Shih-Han HUNG, Hsin-Jen CHANG, Nai-Chia TENG
  • Patent number: 10978445
    Abstract: The present disclosure provides a electrostatic discharge (ESD) protection circuit, coupled between a first reference terminal and a second reference terminal; the ESD protection circuit includes a first voltage divider, a second voltage divider, a first trigger circuit and a second trigger circuit. The first trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the first reference terminal, and the second terminal is coupled to the second reference terminal via the first voltage divider. The second trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the second reference terminal, the second terminal is coupled to the first reference terminal via the second voltage divider, and the second trigger circuit and the first trigger circuit are in parallel connection.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: April 13, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Fang Lai, Liang-Yu Su, Hang Fan
  • Publication number: 20210066483
    Abstract: In some embodiments, the present disclosure relates to a high voltage device that includes a substrate comprising a first semiconductor material. A channel layer that comprises a second semiconductor material is arranged over the substrate. An active layer that comprises a third semiconductor material is arranged over the channel layer. Over the active layer is a source contact spaced apart from a drain contact. A gate structure is arranged laterally between the source and drain contacts and over the active layer to define a high electron mobility transistor (HEMT) device. Between the gate structure and the source contact is a cap structure, which is coupled to the source contact and laterally spaced from the gate structure. The cap structure and a gate electrode of the gate structure comprise a same material.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 4, 2021
    Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
  • Patent number: 10935168
    Abstract: A reinforced thermoplastic pipe having a polymeric barrier layer formed about a longitudinal axis; at least one first non-metallic reinforcement layer configured to carry an internal pressure load surrounding the polymeric barrier layer; at least one second non-metallic reinforcement layer configured to carry an axial load surrounding the at least one first reinforcement layer; and a polymeric cover layer surrounding the at least one second reinforcement layer. At least one of the first or second reinforcement layers is braided. In some embodiments, the lay angles of the first and second reinforcement layers are selected to reduce the axial compression force in the pipe in a constrained application. In another embodiment, an interior helical metallic layer around which the polymeric barrier layer is formed, the interior layer being an interlocked metallic carcass, a flat helically wound strip or a helically wound wire.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: March 2, 2021
    Assignee: Polyflow LLC
    Inventors: Liang Yu, Jing Liu
  • Patent number: 10935805
    Abstract: An optical sensor includes a plurality of pixels disposed in a substrate and a light collimating layer. The light collimating layer is disposed on the substrate. The light collimating layer includes a light-shielding layer, a plurality of transparent pillars, and a plurality of first dummy transparent pillars. The light-shielding layer is disposed on the substrate. The plurality of transparent pillars pass through the light-shielding layer and are disposed correspondingly on the plurality of pixels. The plurality of first dummy transparent pillars that pass through the light-shielding layer are disposed on a first peripheral region of the light collimating layer, wherein the plurality of first dummy transparent pillars surround the plurality of transparent pillars from a top view.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: March 2, 2021
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Publication number: 20210055776
    Abstract: A technique to provide power management for multiple dice. The technique provides for determining for each respective die of the multiple dice, power consumption for operating each respective die; and generating a respective signal from each respective die that corresponds to the power consumption of each respective die. The technique further provides for converting each respective signal to a respective analog voltage to drive a common node; and utilizing a charge storage device coupled to the common node to accumulate the respective analog voltages from the dice, where the accumulated voltage indicates total power consumption of the dice.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Inventors: Jonathan S. Parry, Stephen L. Miller, Liang Yu
  • Publication number: 20210055779
    Abstract: A power control device for a computer system includes a detecting module, configured to detect an open/close state of a display device to generate an open/close signal; and a controller, coupled to the detecting module and coupled to a power supply device through a system management bus, configured to generate an enabling signal to conduct or block a power source of the computer system provided by the power supply device, and to wake up the power supply device, which is in a power saving mode, according to the open/close signal.
    Type: Application
    Filed: October 29, 2019
    Publication date: February 25, 2021
    Inventors: Liang-Yu Lai, Meng-Che Lian, Yun-Lin Tsai, Chun-Lung Hsiao
  • Publication number: 20210057279
    Abstract: A technique to provide power management for multiple dice. The technique provides for determining for each respective die of the multiple dice, power consumption for operating each respective die; and generating a respective signal from each respective die that corresponds to the power consumption of each respective die. The technique further provides, for each respective signal, driving a respective open-drain transistor to conduct, in which an output of each open-drain transistor connects to the common node and the common node connects to a reference voltage, to change a voltage of a common node corresponding to the respective signal; and utilizing the voltage of the common node to indicate total power consumption of the dice.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Inventors: Jonathan S. Parry, Stephen L. Miller, Liang Yu
  • Publication number: 20210039712
    Abstract: A vehicle control method and a vehicle control system are provided. A lateral distance between a vehicle and a tunnel wall of a tunnel is obtained through a lidar sensor when the vehicle is moving in a lane in the tunnel. A lateral offset parameter between the vehicle and a lane centerline is obtained based on the lateral distance. A moving direction of the vehicle is controlled according to the lateral offset parameter.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 11, 2021
    Applicant: Acer Incorporated
    Inventor: Liang-Yu Ke
  • Publication number: 20210009144
    Abstract: A vehicle and a vehicle controlling method are provided. The vehicle includes a computing system; a vehicle controlling module coupled to the computing system; and a positioning module coupled to the computing system and the vehicle controlling module. The vehicle controlling module receives a safe stop path and a fusion coordinate from the computing system. When the vehicle controlling module determines that an abnormality occurs in the computing system, the vehicle controlling module receives a positioning coordinate from the positioning module and calculates an offset corresponding to the positioning coordinate and the fusion coordinate. The vehicle controlling module transmits a vehicle controlling command to the vehicle according to the offset and the safe stop path.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 14, 2021
    Applicant: Acer Incorporated
    Inventor: Liang-Yu Ke