Patents by Inventor Liang Yu

Liang Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220199192
    Abstract: A memory device includes a first memory die of a plurality of memory dies, the first memory die comprising a first memory array and a first power management component, wherein the first power management component is configured to send a first test value to one or more other power management components on one or more other memory dies of the plurality of memory dies during a first power management cycle of a first power management token loop.
    Type: Application
    Filed: March 1, 2021
    Publication date: June 23, 2022
    Inventors: Jeremy Binfet, Liang Yu
  • Patent number: 11366918
    Abstract: In some embodiments, an apparatus includes a memory and a processor. The processor is configured to receive an index file that associates a characteristic in a set of documents with a set of information associated with the characteristic in the set of documents. The processor is further configured to generate an index identifier associated with the index file and calculate a set of pseudorandom logical block identifiers associated with a set of storage locations of a database based on the index identifier. The processor is then configured to parse the index file into a set of index data portions and send a signal to the database to write each index data portion from the set of index data portions at a different storage location within the database as indicated by a different identifier from the set of pseudorandom logical block identifiers.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: June 21, 2022
    Assignee: SIMBA Chain, Inc.
    Inventor: Edward Liang Yu
  • Publication number: 20220186923
    Abstract: A fan assembly including a base, a fan, a light-emitting unit, and a lighting effect component is provided. The fan is rotatably disposed above the base, and includes a central part and multiple blades extending outwards from the central part, and each of the blades has a top surface away from the base. The light-emitting unit is disposed on the base and located between the base and the central part of the fan. The lighting effect component is disposed on the base and surrounds the light-emitting unit. A projection of the lighting effect component projected onto the base is greater than a projection of the fan projected onto the base. A height of the lighting effect component protruding from the base is less than a distance between the top surface of one of the blades and the base. The lighting effect component includes an inclined inner surface.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 16, 2022
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Shun-Chih Huang, Ching-Yu Lu, Kai-Yan Huang, Liang Yu Wu, Jeffrey Lee
  • Patent number: 11362547
    Abstract: A wireless power supply apparatus including a signal transmitting terminal and a signal receiving terminal is provided. The signal transmitting terminal encodes a digital data into a control signal and transmits a power supply signal in a manner of wireless communication according to the control signal. The signal receiving terminal receives the power supply signal from the signal transmitting terminal in the manner of wireless communication. The signal receiving terminal converts the power supply signal into a power source signal and a data signal and decodes the data signal into the digital data.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: June 14, 2022
    Assignee: E Ink Holdings Inc.
    Inventors: Chuen-Jen Liu, Yi-Jhou Shen, Liang-Yu Yan
  • Publication number: 20220179260
    Abstract: A color filter array includes a first color resist, a second color resist, and a third color resist. The first color resist has a first color, the second color resist has a second color, and the third color resist has a third color. A transparency of the third color resist is greater than transparencies of the first color resist and the second color resist. The first color resist has a first edge and a second edge arranged along a first direction. The second color resist has a first edge and a second edge arranged along a first direction. The first color resist and the second color resist are arranged along a second direction. The first edge of the first color resist, the second edge of the second color resist, and the second edge of the first color resist are arranged sequentially along the first direction.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 9, 2022
    Inventors: Ian FRENCH, Xian-Teng CHUNG, Liang-Yu LIN, Jau-Min DING, Po-Yuan LO
  • Publication number: 20220179453
    Abstract: A supporter is provided, and includes a base, a holder, and a linkage assembly. The base has a surface and a groove that is formed on the surface. The holder is disposed on the surface of the base. The linkage assembly is disposed in the base. The linkage assembly is rotatable relative to the base. The linkage assembly includes a first shaft, a second shaft, and a linkage member. The first shaft is at least partially disposed in the groove. The second shaft is connected to the holder. The linkage member is connected to the first shaft and the second shaft. The linkage member is configured to link the first shaft to the second shaft.
    Type: Application
    Filed: January 22, 2021
    Publication date: June 9, 2022
    Inventors: Hsin Ting HO, Liang YU
  • Publication number: 20220172767
    Abstract: A variety of applications can include multiple memory die packages configured to engage in peak power management (PPM) across the multiple packages of memory dies. A communication line coupled to each memory die in the multiple memory die packages can be used to facilitate the PPM. A global management die can start a communication sequence among the multiple memory die packages to share a current budget across the multiple memory die packages by driving a signal on the communication line. Local management dies can use the received signal having clock pulses driven by the global management die on the communication line to engage in the PPM. To engage in global PPM, each memory die can be structured, to be selected as the global management die or a local management die, with one or more controllers to interface with the multiple memory die packages and to handle current budget limits.
    Type: Application
    Filed: December 2, 2020
    Publication date: June 2, 2022
    Inventors: Liang Yu, Jeremy Wayne Butterfield, Jeremy Binfet
  • Publication number: 20220171546
    Abstract: A variety of applications can include a memory device having a memory die designed to control a power budget for a cache and a memory array of the memory die. A first flag received from a data path identifies a start of a cache operation on the data and a second flag from the data path identifies an end of the cache operation. A controller for peak power management can be implemented to control the power budget based on determination of usage of current associated with the cache from the first and second flags. In various embodiments, the controller can be operable to feedback a signal to a memory controller external to the memory die to adjust an operating speed of an interface from the memory controller to the memory die. Additional devices, systems, and methods are discussed.
    Type: Application
    Filed: December 2, 2020
    Publication date: June 2, 2022
    Inventors: Liang Yu, Jonathan Scott Parry, Luigi Pilolli
  • Patent number: 11334259
    Abstract: A set of memory management operations is executed on multiple memory dies of a memory sub-system. Voltage parameter levels corresponding to the set of memory management operations are determined. Information representing a voltage parameter level and a corresponding portion of the set of memory management operations is determined based on the set of voltage parameter levels. A request is received from a host system to execute a target portion of a memory management operation. First information corresponding to the target portion of the memory management operation is identified. Based on the first voltage parameter level, power management action is performed.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: May 17, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Liang Yu, William C. Filipiak
  • Publication number: 20220137694
    Abstract: A technique to provide power management for multiple dice. The technique provides for determining for each respective die of the multiple dice, power consumption for operating each respective die; and generating a respective signal from each respective die that corresponds to the power consumption of each respective die. The technique further provides for converting each respective signal to a respective analog voltage to drive a common node; and utilizing a charge storage device coupled to the common node to accumulate the respective analog voltages from the dice, where the accumulated voltage indicates total power consumption of the dice.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 5, 2022
    Inventors: Jonathan S. Parry, Stephen L. Miller, Liang Yu
  • Patent number: 11315964
    Abstract: An optical sensor includes pixels disposed in a substrate. A light collimating layer is disposed on the substrate and includes a transparent layer, a light-shielding layer, and transparent pillars. The transparent layer blanketly disposed on the substrate covers the pixels and the region between the pixels. The light-shielding layer is disposed on the transparent layer and between the transparent pillars. The transparent pillars penetrating through the light-shielding layer are correspondingly disposed on the pixels.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: April 26, 2022
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Patent number: 11314388
    Abstract: A method for viewing an application program, graphical user interface, and a terminal, where the method includes receiving a first input, where the first input viewing a plurality of running application programs stacked for displaying, obtaining an input position corresponding to the first input and non-position information corresponding to the first input in the input position, determining, according to the input position and the non-position information, an application program reachable by the first input in the input position, and displaying the application program reachable by the first input in the input position. Hence, the method for viewing the application program, the graphical user interface, and the terminal simplify a user's operation of viewing a blocked application program in the stacked application programs.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: April 26, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Liang Yu
  • Publication number: 20220121399
    Abstract: A portion of a memory management operation associated with a first current level that satisfies a condition pertaining to a threshold current level and a second current level that satisfies the condition pertaining to the threshold current level is identified. Mask data associated with the portion of the memory management operation is identified. Based on the mask data, a current management action is performed during execution of a requested memory management operation received from a host system.
    Type: Application
    Filed: December 27, 2021
    Publication date: April 21, 2022
    Inventors: Liang Yu, John Paul Aglubat, Fulvio Rori
  • Publication number: 20220100431
    Abstract: A system to send a first command to execute an initialization process on a first memory die of a plurality of memory dies of a memory sub-system. The system reads a bit value indicating that the first memory die is executing a low peak current draw phase of the initialization process. In response to reading the bit value, sending a second command to a second memory die of the plurality of memory dies of the memory sub-system, the second command to execute the initialization process on the second memory die.
    Type: Application
    Filed: December 13, 2021
    Publication date: March 31, 2022
    Inventors: Liang Yu, Jonathan Parry
  • Publication number: 20220101481
    Abstract: A VGA card assembly includes a VGA card with a circuit board for generating a status signal and a monitoring device. The monitoring device has a microprocessor for receiving the status signal, a status display and a non-volatile memory with at least one first storage block and at least one second storage block. Before completely writing a second file into the second storage block, the microprocessor obtains a first file stored in the first storage block, and enables the status display to output an image according to at least one of the status signal and the first file. After completely writing the second file into the second storage block, the microprocessor obtains the second file stored in the second storage block, and enables the status display to output an image according to at least one of the status signal and the second file.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 31, 2022
    Applicant: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Shun-Chih HUANG, Ching-Yu LU, Liang Yu WU, Jeffrey LEE, Yen-Lin LI, Chieh-Hsi YANG, HANCHAO LIN
  • Publication number: 20220093781
    Abstract: In some embodiments, the present disclosure relates to a semiconductor device. The semiconductor device includes a channel layer disposed over a base substrate, and an active layer disposed on the channel layer. A source contact and a drain contact are over the active layer and are laterally spaced apart from one another along a first direction. A gate electrode is arranged on the active layer between the source contact and the drain contact. A passivation layer is arranged on the active layer and laterally surrounds the source contact, the drain contact, and the gate electrode. A conductive structure is electrically coupled to the source contact and is disposed laterally between the gate electrode and the source contact. The conductive structure extends along an upper surface and a sidewall of the passivation layer.
    Type: Application
    Filed: December 1, 2021
    Publication date: March 24, 2022
    Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
  • Publication number: 20220082188
    Abstract: A pipe coupling assembly for joining two sections of polymer pipe, the pipe coupling assembly comprising: an insert configured for positioning within an end region of a first section of polymer pipe and an end region of a second section of polymer pipe, such that an annular gap is formed between the insert and the end regions of polymer pipe; an adhesive configured for sealing the annular gap between the insert and the end regions; and an external coupler for positioning over the end regions and joining the first and second sections of polymer pipe.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 17, 2022
    Inventors: Liang Yu, James Fenwick Mason
  • Publication number: 20220078932
    Abstract: Provided are a latch mechanism and an electronic device case. The latch mechanism includes a base assembly, a pressing assembly and a first elastic member. The base assembly has an accommodating cavity, and a wall surface of the base assembly has a first through hole and a second through hole which are respectively communicated with the accommodating cavity. The pressing assembly includes a main body part, a button part and a bolt part, the main body part is disposed in the accommodating cavity, and the button part and the bolt part are respectively disposed on the main body part. The first elastic member is located in the accommodating cavity, one end of the first elastic member abuts against an inner wall of the accommodating cavity and the other end abuts against the main body part.
    Type: Application
    Filed: April 13, 2021
    Publication date: March 10, 2022
    Applicant: LUXSHARE PRECISION INDUSTRY CO., LTD.
    Inventors: Zhongyuan LAI, Liang YU
  • Publication number: 20220068386
    Abstract: A TCAM comprises a plurality of first search lines, a plurality of second search lines, a plurality of memory cell strings and one or more current sensing units. The memory cell strings comprise a plurality of memory cells. Each of the memory cells is coupled to one of the first search lines and one of the second search lines. The current sensing units, coupled to the memory cell strings. In a search operation, a determination that whether any of the data stored in the memory cell strings matches a data string to be searched is made according to whether the one or more current sensing units detect current from the memory cell strings, or according to the magnitude of the current flowing out from the memory cell strings detected by the one or more current sensing units.
    Type: Application
    Filed: May 28, 2021
    Publication date: March 3, 2022
    Inventors: Po-Hao TSENG, Feng-Min LEE, Ming-Hsiu LEE, Liang-Yu CHEN, Yun-Yuan WANG
  • Publication number: 20220071038
    Abstract: The present disclosure provides an adaptor, comprising an adapting bracket, an adapting member, and at least one locking component. The adapting bracket comprises a chute comprising two opposite sidewalls and a bottom wall. The bottom wall is disposed between the two sidewalls. The adapting member is disposed on the adapting bracket. The adapting member comprises an adapting interface and is in communicating with the chute. The at least one locking component is disposed in the adapting bracket. Each of the locking components comprises a locking member movably extending into the chute. When an electronic component is inserted in the chute, a mating interface of the electronic component is connected to the adapting interface, and the locking member is inserted into an engaging groove of the electronic component. By protecting the electronic component with the adapting bracket, it is possible to avoid damage to the electronic component from impacts.
    Type: Application
    Filed: April 28, 2021
    Publication date: March 3, 2022
    Applicant: LUXSHARE PRECISION INDUSTRY COMPANY LIMITED
    Inventors: Liang YU, ZhongYuan LAI