Abstract: A Reed-Solomon error-correction coding (ECC) scheme selectively supports two different-length codes to optimize the trade-off between error performance and the amount of disk space required to store protection symbols. The encoder contains two sets of alpha multipliers; part of one set is multiplexed with the other depending on which code is being used. Also, a shift register within the encoder is selectively lengthened or shortened depending on the code. The code pair is selected so that the generator polynomial of the shorter code is a complete divisor of the generator polynomial of the longer code. Thus, one code is a sub-code of the other. Accordingly, the ECC system is able to use the same syndrome calculator for each code. The error-correction decoder uses those syndromes that correspond to the roots of the generator polynomial of the code being used.

Abstract: A system for determining a cubic root of an element .alpha..sup.3k of a Galois Field GF(2.sup.2m) raises the element .alpha..sup.3k to the 2.sup.m +1 power if m is even or to the 2.sup.m -1 power if m is odd. Next the system uses a small look-up table to determine the cube root of .alpha..sup.3k(2.spsp.m.sup..+-.1). The system then multiplies this cube root .alpha..sup.k(2.spsp.m.sup..+-.1) by .alpha..sup.3k raised to the ##EQU1## power, to produce ..alpha..sup.k(2.spsp.m.sup.+1)..alpha..sup.k(2.spsp.m.sup.-1) =.alpha..sup.k(2.spsp.m+1.sup.). The system then raises the result to the ##EQU2## power, to produce the cube root .alpha..sup.k. Since not all elements of GF(2.sup.2m) have cube roots within the field, the system tests the result by multiplying it by itself twice, to determine if the product is .alpha..sup.3k.

Abstract: A system determines the error locations of four errors in GF(2.sup.2m) by transforming a degree-four error locator polynomial ultimately into two quadratic equations, finding the solutions of these equations, and from these solutions determining the roots of an error locator polynomial. The system first manipulates the error locator polynomial, which is of the form:.sigma.(x)=.sigma..sub.4 x.sup.4 +.sigma..sub.3 x.sup.3 .sigma..sub.2 x.sup.2 +.sigma..sub.1 x+.sigma..sub.0 ?1!into the form:.theta.(y)=y.sup.4 +.theta..sub.2 y.sup.2 +.theta..sub.1 y+.theta..sub.0 ?2 !where the .theta..sub.i 's are combinations of the coefficients of the terms of the error locator polynomial. The system has thus produced an equation in which the coefficient of the y.sup.3 term is 0. The system then factors .theta.(y), to produce.theta.(y)=(y.sup.2 +t*y+u)*(y.sup.2 +v*y+w), ?3!where "*" represents multiplication. It then determines the values of t, u, v and w by equating the coefficients of the two expressions for .theta.

Abstract: A burst error counting system determines for each sector-long error pattern a unique, minimum number of burst errors by (i) specifying, based on the statistical operation of the system, a maximum burst length, L; (ii) determining the location in the error pattern of a first erroneous bit, b.sub.FIRST ; (iii) associating the next L-1 bits with b.sub.FIRST ; (iv) incrementing a burst counter; (v) searching for a next b.sub.FIRST in the remaining bits of the error pattern; and (vi) repeating iii-v. The system may also store the position, that is, bit count, of these b.sub.FIRST 's. Each time the burst error count is incremented, the system compares the count to a predetermined burst error threshold, which is equal to or less than the maximum number of burst errors that can be expected in a sector that is not corrupted to a point at which error correction may produce an incorrect result.

Abstract: An encoding system uses a modified 8/9 rate modulation code to encode 8-bit data symbols into 9-bit cells in a conventional manner in accordance with the modified code and 9-bit ECC symbols into 10-bit cells by (i) encoding 8 bits of the symbol into a 9-bit cell in accordance with the modified code, and (ii) inserting into the 9-bit cell the remaining, that is, the non-encoded, bit of the ECC symbol. The system reproduces the 8-bit data symbols by decoding the 9-bit cells in a conventional manner in accordance with the modified code, and the 9-bit ECC symbols by (i) removing from the associated 10-bit cell the bit inserted during encoding, (ii) decoding the remaining 9 bits to reproduce 8 bits of the symbol, and (iii) inserting into the 8 bits the bit that was earlier removed. In an exemplary embodiment, the 8 least significant bits of the ECC symbol are encoded using the modified 8/9 rate code. The 9 bits produced by the code are used essentially as the first "c" bits and last "10-c" bits of a 10-bit cell.

Abstract: An encoder in a data processing system generates, from a single m-bit coset leader constant, or symbol, a coset leader, which is a series of k m-bit symbols that resembles a random sequence of km bits. The encoder encodes the m-bit initial coset leader constant in a linear feedback shift register that is characterized by a maximum length polynomial over GF(2). The constants are produced by the register at the same times as the error correction symbols are produced by the encoder. The corresponding constants and symbols are then XOR'd together before the symbols are concatenated with the data symbols to form a code word for recording. A decoder similarly generates the coset leader from the initial constant. The decoder XOR's these constants with the error correction symbols in a retrieved code word as part of a demodulation operation.

Abstract: A method of uniquely identifying data blocks or groups of data blocks wherein a unique characteristic of the group or block is encoded according to an application of the Chinese Remainder Theorem. According to a particular application, physical addresses of sectors on a hard disk are encoded by applying the Chinese Remainder Theorem, thereby providing a highly robust and fault tolerant means for locating the sectors.

Abstract: A simplified architecture is provided for a partial response read channel. One digital equalizer is used in conjunction with a simple shaping circuit to minimize power consumption while concurrently optimizing both the data recovery and timing extraction functions.

Abstract: A method and system for verifying the integrity of data written to a mass memory medium. A local memory is directed by local memory control logic to store a data block that is received from a host microprocessor and that is to be written to the mass memory medium. The data block comprises a sequence of data symbols. An ECC encoder encodes the stored data block with error correction data. The error correction data comprises a sequence of error correction symbols that are appended to the data symbols. The data and error correction symbols are stored in the mass memory and immediately retrieved. An ECC decoder receives the retrieved data and error correction symbols from the mass memory and the data and error correction symbols of the encoded data block from the encoder. In response, the decoder generates an error status signal when more than a predetermined threshold number of the retrieved data and error correction symbols are improperly stored in the mass memory.

Abstract: A single Reed-Solomon code is employed with modifications to allow information systems the freedom of selecting redundancy from 1 to R symbols, where R is the number of redundant symbols that the unmodified Reed-Solomon code employs. If P is the number of discarded redundancy symbols, then R-P redundancy symbols are retained, and the minimum distance of the modified code is 1+R-P. The system uses one of several alternative decoding schemes. One general scheme employs error-and-erasure decoding, and treats the P deleted symbols as erasures. Another general scheme operates directly on the shortened, modified code-word and modifies both the error syndromes and the error information derived from the syndromes to compensate for the deleted symbols.

Abstract: A method and apparatus for identifying and synchronizing to two different fields in a disk drive employs different synchronization or "sync" patterns to reduce the chances of mis-identifying and false-identifying a field. Two very distinct synchronization patterns have been found that satisfy the d=1, k=7 run-length constraints of a data code used in the disk drive. During operation, one sync pattern is searched for to identify and synchronize to its associated field, then the field itself is read. This procedure is then repeated for the other sync pattern and its associated field. Also, the phase of a preamble preceding each sync character is established, so that the number of comparisons needed to find either sync character is reduced. A sync detector operates on cell pairs, and has a selector that selects which sync pattern to search for. The sync detector also has special features that enable it to find preamble and DC Erase fields in the disk cell stream.

Abstract: An encoding system encodes up to 64 kilobytes of data using a binary Bose-Chaudhuri-Hocquenghem (BCH) error detection code. The code has as a generator polynomial g(x):g(x)=(x.sup.20 +x.sup.17 +1)*(x+1)*(x.sup.20 +x.sup.3 +1)*(x.sup.20 +x.sup.3 +x.sup.2 +X+1)which in octal representation is:g(x)=4400001*3*4000011*4000017where * and + represent Galois Field multiplication and addition, respectively. The associated primitive polynomial is x.sup.20 +x.sup.17 +1. The encoder encodes the data using a code based on a polynomial f(x), which is g(x) multiplied by a factor, b(x)=x.sup.3 +x+1, or:f(x)=(x.sup.3 +x+1)*(x.sup.20 +x.sup.17 +1)*(x+1)*(x.sup.20 +x.sup.3 +1)*(x.sup.20 +x.sup.3 +x.sup.2 +X+1)which in octal representation is:f(x)=13*4400001*3*4000011*4000017The inclusion of the factor in the code enhances the code's burst detecting capabilities. The code is capable of detecting 7 random errors, and a single burst error of up to 64 bits or double burst errors of up to 24 bits each.

Abstract: A method of data recovery in systems employing error-correction coding techniques is described. The technique may be used, for example, in conjunction with a data storage device or a data communications network. Several trials of accessing or transmitting the ECC-protected data are performed. The data from each trial is decoded, and is also saved. If none of the trials results in the successful decoding of the data, then a reconstruction function is employed to create a reconstructed version of the data from the sequence of data created by the trials. One method of reconstruction involves majority voting on a symbol-by-symbol basis. The reconstructed data created that way is then decoded in the same fashion as for each trial. A more powerful reconstruction function employs a threshold to determine whether each voted-on symbol is sufficiently "reliable". If not, it is marked as an erasure.

Abstract: A data storage system including k data drives and n-k redundant drives performs a write operation to a designated sector on a data drive by (i) retrieving from each of the other data drives the data stored in a corresponding sector, (ii) encoding the symbols stored in corresponding storage locations using an (n,k) distance D Reed-Solomon code to generate, for each set of k symbols, n-k redundancy symbols, and (iii) recording the generated symbols in the corresponding storage locations on each of the redundant drives. When the system next performs a write operation directed to the designated sector or one of the corresponding sectors on the other data drives, the system records the data on the appropriate sector and simultaneously records the same data in a corresponding sector on one of the redundant drives.

Abstract: A method for determining whether particular information was used in encoding a codeword; the codeword is formed by encoding information as a first preliminary code sequence using a first code and then combining the first preliminary code sequence with a second preliminary code sequence generated using a second code; the particular information is encoded as a desired first preliminary code sequence in accordance with said first code; the desired first preliminary code sequence is then stripped from the codeword to derive a test sequence; the test sequence is decoded in accordance with the second code, and a determination is made, based on the decoding, whether the particular information was used in encoding the codeword.

Abstract: A system separates data into "i" interleaved section of "k" symbols each and encodes each and encodes each section using a relatively weak (n,k) ECC. The system thus generates for each k symbols an n symbol code word containing "n-k", or "r" redundancy symbols, or a total of "ri" redundancy symbols. The system segments the ri redundancy symbols into "m" multi-symbol sections, namely, R(1), R(2), . . . , R(m), which contain corresponding symbols from each of the i code words. The system then encodes each of these sections using various ECC's and generates Q(2), . . . , Q(m) redundancy symbols, respectively. The system then records just the data, the section R(1) redundancy symbols and the Q(2), . . . , Q(m) redundancy symbols. When the system later retrieves the data, the system decodes the data code word-by-code word using the (n,k) ECC and reproduces the R(2), . . ., R(m) redundancy symbols in each code word. The system also corrects, if possible, any errors in the data.

Abstract: A data encoding system encodes data using the following d=7, k=2 code:______________________________________ DATA BITS CODE WORDS ______________________________________ 00 000X 01 0100 10 100X 011 10000X 111 100100 0000 1000000X ______________________________________where X is a ONE if the last two bits of the preceding code word are both ZEROS and a ZERO otherwise, and the right-most bits are the first in time. The system encodes the data by encoding the first four bits of data to an eight-bit code word if the bits are all ZEROS and the last two bits of the previous code word are in a predetermined pattern. If the first four bits are not ZEROS and the system encodes the first three data bits to form a six-bit code word if the first two bits are both ONES. Otherwise, the system encodes the first two data bits to form a four-bit code word. The system selects the code word which preserves the code limited run length.

Abstract: The invention is an error detection and correction system which encodes data twice, once for error detection by using a cyclic redundancy check (CRC) code with a generator polynomial, g(x) [in octal form]:g(x)=2413607036565172433223and a second time for error correction by using a Reed-Solomon error correction code. The system then uses the CRC code to check the data for errors. If errors are found the system uses the error location information supplied by the CRC code and the Reed-Solomon code to correct the errors.

Abstract: A pipelined error correction circuit iteratively determines syndromes, error locator and evaluator equations, and error locations and associated error values for received Reed-Solomon code words. The circuit includes a plurality of Galois Field multiplying circuits which use a minimum number of circiut elements to generate first and second products. Each Galois Field multiplying circuit includes a first GF multiplier which multiplies one of two input signals in each of two time intervals by a first value to produce a first product. The circuit includes a second GF multiplier which further multiplies one of the first products by a second value to generate a second product. The first and second products are then applied to the first GF multiplier as next input signals. The multiplying circuit minimizes the elements required to generate two products by using a first, relatively complex multiplier for both the first and second products and then a second relatively simple multiplier to generate the second product.

Abstract: Addresses corresponding to magnetic disk sectors are encoded using an error correction code (ECC), such that addresses which are in a neighborhood, that is, addresses which are mathematically or numerically close, are mapped to addresses which differ in at least D-1 bits where the ECC is a distance D code. An original n-bit sector address is separated into two segments. One segment is a "k"-bit neighborhood address segment containing the k lower order address bits identifying the location of the selected sector within a neighborhood. The second segment is an "n-k" bit higher order address segment identifying the neighborhood containing the selected sector. The k-bit neighborhood address segment is then encoded with an (n,k) distance D linear code to form an n-bit preliminary code word containing n-k redundancy (ECC) bits appended, as the most significant bits, to the k neighborhood address bits. The (n-k)-bit higher order address segment is encoded by representing the segment in Gray code.