Patents by Inventor Lih-Jyh Weng

Lih-Jyh Weng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5107506
    Abstract: An error correction system generates a residue for data symbols encoded in accordance with an (n,k) code which has a distance "d" and a generator polynomial g(x). If the residue contains fewer than "T" non-zero symbols, where T<d/2, the data symbols are assumed to be error free. If there are T or more non-zero symbols, the data symbols are assumed to contain errors and the residue symbols are manipulated to correct the errors, if possible. The residue symbols are thus encoded using an encoder constructed in accordance with the generator polynomial g(x) by loading the residue symbols and shifting the encoder "m" times, where m is a factor of k. The number of non-zero symbols are then counted. If there are fewer than T non-zero symbols in the encoded residue, the encoded symbols are combined with the corresponding symbols in the code word. Thus the first encoded residue symbol is combined with the m.sup.th code word symbol, the second residue symbol is combined with the m+1.sup.
    Type: Grant
    Filed: January 25, 1990
    Date of Patent: April 21, 1992
    Assignee: Digital Equipment Corporation
    Inventors: Lih-Jyh Weng, Bruce A. Leshay
  • Patent number: 5036408
    Abstract: A disk drive system provides all required synchronization, positioning, validation, and data functions within each disk sector. All of these functions are provided within two zones, a header section and a data section. The header section includes a preamble, a synchronization character and an address field, as well as servo information for track following. The data section of each sector includes a data preamble, a data synchronization character, a bad sector bit map, the data and data redundancy information. The header section of at least one sector in a track includes a short DC-erase field, a transitionless segment which is used in synchronization. To synchronize a read/write head to the disk, the system first detects the DC-erase field. The system next searches for the header premable and synchronization character. If it finds them within predetermined times, it then looks for a valid sector address to complete the synchronization.
    Type: Grant
    Filed: May 12, 1988
    Date of Patent: July 30, 1991
    Assignee: Digital Equipment Corporation
    Inventors: Michael D. Leis, Bruce Leshay, Michael Muchnik, Satish Rege, Charles M. Riggle, Lih-Jyh Weng
  • Patent number: 5001715
    Abstract: The invention is an error correcting system which calculates the error locations, that is, finds the roots of the error locator equation:1+.delta..sub.1 *x+.delta..sub.2 *x.sup.2 +.delta..sub.3 x.sup.3 + . . . +.delta..sub.v-1 *x.sup.v-1 +.delta..sub.v *x.sup.v =0 (1)where "+" and "*" represent Galois Field addition and Galois Field multiplication, respectively, and "v" is the number of errors in the data by substituting the error location equation coefficients into a succession of v error location formulas along with successive values of x to determine if the various x's are roots of equation (1). When the first root is found, extraction of the root corresponds to reducing the degree of equation (1) by one, to (v-1), and also to reducing the number of error location formulas by one to (v-1). Thus substitution in the error location formulas of further values of x to find the next root requires one fewer addition operation and one fewer multiplication operation.
    Type: Grant
    Filed: July 9, 1990
    Date of Patent: March 19, 1991
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4989211
    Abstract: A data encoder is set to an initial condition by encoding preliminary symbols. The encoder is then used to encode the data to generate ECC symbols. The data and the generated ECC symbols are then recorded on a disk as code words. Thereafter, when a data code word is read it is again encoded in the initialized encoder to generate new ECC symbols. If the data read from the disk is one or more symbols out of synchronization, errors due to the initial condition will be found. The locations of the errors due to missynchronization will be in symbols corresponding to the initial condition, that is, in the preliminary symbols and beyond the boundary of the code word data, indicating the synchronization error. Alternatively, the locations of errors due to defects in the disk or misinterpretation of the data signal are within the code word data. Thus a missynchronization ofoneof more full symbols can be readily detected.
    Type: Grant
    Filed: May 12, 1988
    Date of Patent: January 29, 1991
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4975867
    Abstract: The invention is an apparatus and/or method which enables one to divide two elements, A and B, of GF(2.sup.2M), that is, perform the operation B/A, by finding the multiplicative inverse of the divisor A, and then multiplying the inverse by the numerator, B. The multiplicative inverse, A.sup.-1, of A is found by computing a conversion factor, D, and then multiplying A by D to convert it to an element C, where C is also an element of a smaller Galois Field, GF(2.sup.M), which is a subfield of GF(2.sup.2M). Specifically, C is equal to A.sup.2.spsp.M.sbsp.+1), or A.sup.2.spsp.M *A, in the field GF(2.sup.2M). Next, the multiplicative inverse, C.sup.-1, of C in GF(2.sup.M) is found by appropriately entering a stored look-up table containing the 2.sup.M elements of GF(2.sup.M).The multiplicative inverse, C.sup.-1, of C is thereafter converted, by multiplying it by the conversion factor D calculated above, to the element of GF(2.sup.2M) which is the multiplicative inverse, A.sup.-1, of the original divisor, A.
    Type: Grant
    Filed: June 26, 1987
    Date of Patent: December 4, 1990
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4968985
    Abstract: A data demodulator assigns a binary value to the signal recorded in a transition cell based on the amplitude of the signal in the transition cell, the amplitudes of the signal in adjacent transition cells and system experience in categorizing how recording non-linearities and system noise effect the signals. The demodulator samples a selected number of times the recorded signal in the transition cell for which a binary value is to be determined and the recorded signal in a selected number of transition cells adjacent to that cell. It then converts the amplitude of each of the signal samples to a digital symbol. Next, it concatenates portions of the digital symbols to form an interpretation word. It uses this word to enter a stored lookup table which contains binary values, and assigns to the transition cell signal the binary value associated with the word.
    Type: Grant
    Filed: June 6, 1988
    Date of Patent: November 6, 1990
    Assignee: Digital Equipment Corporation
    Inventors: Charles M. Riggle, Lih-Jyh Weng
  • Patent number: 4949200
    Abstract: Addresses corresponding to magnetic disk sectors are encoded using an error correction code (ECC), such that addresses which are in a neighborhood, that is, addresses which are mathematically or numerically close, are mapped to addresses which differ in at least D-1 bits where the ECC is a distance D code. An original n-bit sector address is separated into two segments. One segment is a "k"-bit neighborhood address segment containing the k lower order address bits identifying the location of the selected sector within a neighborhood. The second segment is an "n-k" bit higher order address segment identifying the neighborhood containing the selected sector. The k-bit neighborhood address segment is then encoded with an (n,k) distance D linear code to form an n-bit preliminary code word containing n-k redundancy (ECC) bits appended, as the most significant bits, to the k neighborhood address bits. The (n-k)-bit higher order address segment is encoded by representing the segment in Gray code.
    Type: Grant
    Filed: March 31, 1988
    Date of Patent: August 14, 1990
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4914535
    Abstract: The location of the sequence of data bits stored on a storage medium is identified by generating a predetermined synchronization bit sequence; storing on the storage medium a bit sequence corresponding to the predetermined synchronization sequence to indicate the location of the data bit sequence; deriving from the stored corresponding bit sequence on the storage medium a trial sequence; and determining whether the trial sequence corresponds to the predetermined synchronization sequence by determining the number of symbols in which the trial sequence differs from the predetermined synchronization sequence, each symbol comprising a plurality of bits, whereby the effect of clustered bit errors is reduced.
    Type: Grant
    Filed: January 6, 1988
    Date of Patent: April 3, 1990
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4881075
    Abstract: Data compression/decompression apparatus and methods are provided which exhibit significant data compression improvement over prior art methods and apparatus. This is achieved by providing an adaptive characteristic in which a pair of data compression/decompression translation tables are constructed based on the data which is to be compressed or decompressed. One table is used to compress or decompress while the other is being rebuilt, thus reflecting the characteristics of the most recent input data.
    Type: Grant
    Filed: October 15, 1987
    Date of Patent: November 14, 1989
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4866716
    Abstract: The invention simultaneously calculates error locations and associated error values by solving the error locator polynomial equation re-written as:1=.delta..sub.even (x)+.delta..sub.odd (x)where .delta..sub.even (x) and .delta..sub.odd (x) are the even- and odd-power terms of the error locator polynomial. A first value of x, x.sub.a1, is simultaneously inserted into the expression .delta..sub.even (x) and .delta..sub.odd (x) and also into an error value polynomial .PHI.(x). Next, while the error locator equation is evaluated at the calculated values of .delta..sub.even (x.sub.a1) and .delta..sub.odd (x.sub.a1) to determine if x.sub.a1 is a solution, the now known values of the error evaluator polynomial .PHI.(x.sub.a1) and .delta..sub.odd (x.sub.a1) are substituted into an error value formula: ##EQU1## Thus as soon as an error location is found, the error value, v.sub.a1, associated with that location is also known. The error can then be quickly corrected.
    Type: Grant
    Filed: January 22, 1988
    Date of Patent: September 12, 1989
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4856003
    Abstract: An encoder encodes a sector of data to produce ECC symbols using a GF(2.sup.10) code by first appending one or more pseudo data bytes to the sector data bytes. The data string of sector data bytes and pseudo data bytes are then encoded to produce a desired number of 10-bit ECC symbols. Two selected bits from each ECC symbol are compared to a known bit pattern. If the selected bits match the pattern, the bits are truncated and the remaining 8-bit symbols are concatenated with the data string to form a codeword. The codeword bytes can later be decoded, and any error correction performed, by appending the bit pattern as necessary. If the selected bits do not match the pattern, the pseudo data bytes are modified such that encoding the data bytes and the modified pseudo data bytes produce 10-bit ECC symbols with the selected bits matching the bit pattern. The selected bits are then truncated and the remaining 8-bit symbols are concatenated with the data string to form the code-word.
    Type: Grant
    Filed: May 7, 1987
    Date of Patent: August 8, 1989
    Assignee: Digital Equipment Corporation
    Inventor: Lih-Jyh Weng
  • Patent number: 4847705
    Abstract: The invention encodes magnetic disk sector addresses using a large distance, "d", Reed-Solomon code to produce code words which vary by at least "d" symbols for any two different encoded addresss. The result of the encoding is a set of redundancy symbols, which are usually associated with error correction. These symbols are appended to the address symbols to produce address code words. An address code word read from a disk can contain up to (d-1)/2 errors and still be identified as the correct sector address. To protect the encoded sector address from synchronization errors the address code words are further encoded by adding them to a coset leader to produce header code words. The header code words are then recorded in the address portions of the sectors. When a header code word is read from a sector, the coset leader is subtracted from the header code word to produce an address code word. The address code word is then compared with the address code word for the specified address.
    Type: Grant
    Filed: July 7, 1987
    Date of Patent: July 11, 1989
    Assignee: Digital Equipment Corporation
    Inventors: Lih-Jyh Weng, Bernardo Rub
  • Patent number: 4413339
    Abstract: An error detecting and correcting system implementing the Reed-Solomon (1023, 1006) code having code words whose symbols are elements in the Galois field GF(2.sup.10) generated by either the primitive polynomial x.sup.10 +x.sup.3 +1 or x.sup.10 +x.sup.7 +1. An original data word is encoded to produce a code word w(x) including a first set of checksum symbols appended thereto. Upon retrieval, the data symbols of the receive code word y(x) are encoded by the same encoder that encodes the original data word to produce a second set of checksum symbols. Both sets of checksum symbols are modulo-two summed to produce a residue R(x) from which error syndromes S.sub.i can be computed and thus enable rapid correction of errors in the received code word y(x). The system also monitors the number of non-zero symbols in the residue R(x) in order to avoid unnecessary computation of error syndromes S.sub.
    Type: Grant
    Filed: June 24, 1981
    Date of Patent: November 1, 1983
    Assignee: Digital Equipment Corporation
    Inventors: Charles M. Riggle, Lih-Jyh Weng, Norman A. Field