Patents by Inventor Lin Chen

Lin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250122367
    Abstract: A polymer composite for preparing a low dielectric resin composition having a dielectric loss tangent (Df) that is less than or equal to 0.00200 is provided. The polymer composite includes a first styrene-based copolymer having a weight average molecular weight that is lower than 20,000 g/mol and a second styrene-based copolymer having a weight average molecular weight that is higher than 20,000 g/mol, wherein the weight ratio of the first styrene-based copolymer to the second styrene-based copolymer is from 5/95 to 95/5.
    Type: Application
    Filed: October 10, 2024
    Publication date: April 17, 2025
    Inventors: Chi-Jui HSIEH, Tz-Jie JU, Yi-Hsuan TANG, Chiung Chi LIN, Hung Lin CHEN, Chi Yi LIU, Hsiao-Chu LIN, Ka Chun AU-YEUNG, Wei-Liang LEE, Yu-Chen HSU, Ming-Hung LIAO, Chien-Han CHEN, Yu-Tien CHEN, Yu-Pin LIN, Gang-Lun FAN
  • Publication number: 20250126839
    Abstract: A method for forming a semiconductor structure is provided. The method includes forming a first active region in which first semiconductor layers and second semiconductor layers are alternatingly stacked over a first lower fin element. In a plan view, the active region includes a first portion and a second portion narrower than the first portion. The method also includes removing the first semiconductor layers of the first active region. The second semiconductor layers of the first portion of the first active region form first nanostructures, and the second semiconductor layers of the second portion of the first active region form second nanostructures. The method also includes forming a first gate stack to surround the first nanostructures, and forming a second gate stack to surround the second nanostructures.
    Type: Application
    Filed: January 5, 2024
    Publication date: April 17, 2025
    Inventors: Feng-Ming Chang, Jui-Lin Chen, Ping-Wei Wang, Choh Fei Yeap, Yu-Bey Wu
  • Patent number: 12279066
    Abstract: Devices and methods for selecting and stitching image frames are provided. A method includes obtaining a plurality of image frames. The method also includes identifying one or more regions of interest within one or more image frames in the plurality of image frames. The method further includes selecting, based on a respective quality measure associated with each image frame of the plurality of image frames, a set of base frames, where each identified region of interest of the one or more identified regions of interest is fully contained within at least one base frame in the selected set of base frames. The method additionally includes stitching together the selected set of base frames to create a composite image.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: April 15, 2025
    Assignee: Google LLC
    Inventors: Lin Chen, Wei (Alex) Hong
  • Publication number: 20250120158
    Abstract: Bipolar junction transistor (BJT) structures are provided. A BJT structure includes a semiconductor substrate, a collector region formed in the semiconductor substrate, a plurality of base regions formed over the collector region, a plurality of emitter regions formed over the collector region, a ring-shaped shallow trench isolation (STI) region formed in the collector region, a plurality of base conductive layers formed over the collector region and on opposite sides of the base regions, a plurality of sidewall dielectric layers formed on top surfaces of the base conductive layers and disposed vertically between the base conductive layers and upper portions of the emitter regions, and a plurality of base contacts formed on the base conductive layers. The base contacts are divided into a first group of base contacts disposed between the base regions and a second group of base contacts disposed between the base regions and the STI region.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Jung CHEN, Chun-Ming LIN, Tsung-Lin LEE, Shiuan-Jeng LIN, Hung-Lin CHEN
  • Publication number: 20250119935
    Abstract: Provided are a data transmission method and device and a storage medium. The method includes: in response to a user equipment (UE) determining that the UE is incapable of simultaneously transmitting uplink (UL) traffic and sidelink (SL) traffic and that a logical channel priority of the SL channel is higher than a logical channel priority of the UL channel, transmitting, by the UE, the SL traffic; where the logical channel priority of the SL channel being higher than the logical channel priority of the UL channel comprises that: a value of the logical channel priority of the UL channel being greater than a second threshold and a value of the logical channel priority of the SL channel being less than a first threshold; where the value of the logical channel priority of the SL channel is a highest value among values of priorities of all logical channels.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Wei LUO, Lin CHEN, Mengzhen WANG, Boyuan ZHANG
  • Publication number: 20250120115
    Abstract: A semiconductor structure includes a stack of semiconductor layers disposed over a substrate, a metal gate structure disposed over and interleaved with the stack of semiconductor layers, the metal gate structure including a gate electrode disposed over a gate dielectric layer, a first isolation structure disposed adjacent to a first sidewall of the stack of semiconductor layers, where the gate dielectric layer fills space between the first isolation structure and the first sidewall of the stack of semiconductor layers, and a second isolation structure disposed adjacent to a second sidewall of the stack of semiconductor layers, where the gate electrode fills the space between the second isolation structure and the second sidewall of the stack of semiconductor layers.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Inventors: Shi Ning Ju, Kuo-Cheng Chiang, Guan-Lin Chen, Chih-Hao Wang, Kuan-Lun Cheng
  • Publication number: 20250120059
    Abstract: A semiconductor structure according to the present disclosure includes a first memory array in a first cache and a second memory array in a second cache. The first memory array includes a plurality of first memory cells arranged in M1 rows and N1 columns. The second memory array includes a plurality of second memory cells arranged in M2 rows and N2 columns. The semiconductor structure also includes a first bit line coupled to a number of N1 first memory cells in one of the M1 rows, and a second bit line coupled to a number of N2 second memory cells in one of the M2 rows. N1 is smaller than N2, and a width of the first bit line is smaller than a width of the second bit line.
    Type: Application
    Filed: January 31, 2024
    Publication date: April 10, 2025
    Inventors: Feng-Ming Chang, Jui-Lin Chen, Ping-Wei Wang, Jui-Wen Chang, Lien-Jung Hung
  • Publication number: 20250118638
    Abstract: A semiconductor package comprises a first device and a second device. The structure of the first semiconductor device is similar to that of the second semiconductor device. The first semiconductor device comprises a lead frame strip, a first plurality of field effect transistors (FETs), a first plurality of clips, a second plurality of FETs, a second plurality of clips, and a first molding encapsulation. A method is applied to fabricate a plurality of semiconductor packages. The method comprises the steps of providing a lead frame strip, attaching a first plurality of FETs, attaching a first plurality of clips, attaching a second plurality of FETs, attaching a second plurality of clips, and forming a molding encapsulation.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 10, 2025
    Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Yan Xun Xue, Madhur Bobde, Long-Ching Wang, Jian Yin, Lin Chen, Ziwei Yu, Xiaobin Wang, Zhiqiang Niu, Kuan-Hung Li
  • Publication number: 20250119723
    Abstract: A wireless communication method for use in a first wireless terminal is disclosed. The method comprises transmitting, to a second wireless terminal, a message associated with a discovery of a relay terminal, wherein the message comprises information associated with at least one network slice supported by the relay terminal.
    Type: Application
    Filed: December 18, 2024
    Publication date: April 10, 2025
    Applicant: ZTE CORPORATION
    Inventors: Wanfu XU, Mengzhen WANG, Lin CHEN, Tao QI
  • Publication number: 20250115939
    Abstract: The present disclosure relates to a neural repair protein composition. The preparation thereof includes the following steps: adding 20 U/mL-35 U/mL of any one of or a combination of nuclease or omnipotent nuclease to a cell protein extract, performing enzymatic hydrolysis at 37° C.±1° C. for 15-40 minutes, and separating and purifying the prepared enzymatic hydrolysate. The neural repair protein composition of the present disclosure has the effects of cell repair and nerve damage repair, and can be used to repair nerve damage caused by diseases such as central nervous system damage, neurodegenerative diseases, stroke, brain damage, ataxia, cerebral hemorrhage, Alzheimer's disease, Parkinson's disease, senile dementia or complications thereof. It has the advantages of good stability, high bioavailability, safety and effectiveness, and is easy to produce and store.
    Type: Application
    Filed: January 28, 2023
    Publication date: April 10, 2025
    Inventors: Yu WANG, Wenyong GAO, Lin CHEN, Jianjun LI
  • Patent number: 12269777
    Abstract: The present disclosure provides a high-entropy rare earth-toughened tantalate ceramic. The ceramic is prepared by sintering Ta2O5 powder and x types of different RE2O3 powder, 4?x?9, and the molar ratio of the RE2O3 powders is 1. RE2O3 powder and Ta2O5 powder having the molar ratio of RE to Ta being 1:1 are weighed, a solvent is added for mixing, and ball milling is performed by a ball mill to obtain mixed powder M; the powder M is dried at a temperature of 650-850° C. for 1.5-2 h to obtain dried powder; the powder is sieved to obtain powder N, the powder N is placed in a mold for first pressing to obtain a rough blank, and the rough blank is then pressed for the second time to obtain a compact blank; the compact blank is sintered to obtain the high-entropy rare earth-toughened tantalate ceramic.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: April 8, 2025
    Assignee: Kunming University of Science and Technology
    Inventors: Jing Feng, Yunxuan Zhou, Xiaoyu Chong, Peng Wu, Lin Chen, Jun Wang
  • Patent number: 12273859
    Abstract: Provided are a user equipment (UE) information reporting method and apparatus, an internet of vehicles resource configuration method and apparatus, and a storage medium. The reporting method includes the following steps: a first UE acquires identification information of a second UE; and the first UE sends identification information of the second UE before an adjustment and identification information of the second UE after the adjustment to a network element device on a network side to report UE information.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: April 8, 2025
    Assignee: ZTE Corporation
    Inventors: Wei Luo, Lin Chen, Mengzhen Wang, Boyuan Zhang
  • Patent number: 12273871
    Abstract: Provided are a sidelink relay communication method and apparatus, a device, and a medium. The sidelink relay communication method is applied to user equipment (UE)-to-Network relay communication. The method includes the following processes. The relay UE receives a data packet from a source communication device through a first bearer between the source communication device and the relay UE, where the data packet is mapped to the first bearer by the source communication device. The relay UE maps the data packet to a second bearer between the relay UE and a target communication device and transmits the data packet to the target communication device, where either the source communication device comprises a remote UE and the target communication device comprises a base station or the source communication device comprises a base station and the target communication device comprises a remote UE.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 8, 2025
    Assignee: ZTE Corporation
    Inventors: Mengzhen Wang, Lin Chen, Weiqiang Du
  • Patent number: 12270408
    Abstract: A ceiling fan includes an outer shield, a middle ring, a blade bracket, and a fan blade. The middle ring is pivotally connected to the outer shield and rotates relative to the outer shield. The blade bracket protrudes from the middle ring and has two guiding surfaces located on opposite sides of the blade bracket. The fan blade is combined with the middle ring by the blade bracket. The fan blade has an opening on an end close to the blade bracket. The fan blade further includes a housing, one or more supporting ribs, and two guiding limiting parts.
    Type: Grant
    Filed: September 23, 2023
    Date of Patent: April 8, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sheng-Hsiang Huang, Chan-Yuan Tsao, Lung-Sheng Pan, Yen-Lin Chen
  • Publication number: 20250113539
    Abstract: A method includes forming semiconductive sheets over a substrate and arranged in a vertical direction; forming source/drain regions on either side of each of the semiconductive sheets; forming first air gap inner spacers interleaving with the semiconductive sheets; forming a gate around each of the semiconductive sheets, wherein the first air gap inner spacers are laterally between the gate and a first one of the source/drain regions.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 3, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Yi CHOU, Guan-Lin CHEN, Shi Ning JU, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20250113478
    Abstract: A semiconductor device according to the present disclosure includes a memory array having a plurality of memory cells arranged in a row, and an interconnect structure disposed over the memory cells and having a bit line coupled to each of the memory cells arranged in the row. The bit line has a first segment coupled to a first portion of the memory cells and a second segment coupled to a second portion of the memory cells. The first segment has a first width and the second segment has a second width that is smaller than the first width.
    Type: Application
    Filed: February 6, 2024
    Publication date: April 3, 2025
    Inventors: Ping-Wei Wang, Jui-Lin Chen
  • Publication number: 20250113263
    Abstract: Presented are systems, methods, apparatuses, or computer-readable media for migrating integrated access and backhaul (IAB) nodes. A first network node may receive a first message comprising assistance information. The assistance information is associated with a migration of an integrated access and backhaul (IAB) entity.
    Type: Application
    Filed: January 26, 2022
    Publication date: April 3, 2025
    Inventors: Ying HUANG, Lin CHEN
  • Patent number: 12264276
    Abstract: The present invention relates to an LC medium comprising two or more polymerizable compounds, at least one of which contains a substituent comprising a tertiary OH group, to its use for optical, electro-optical and electronic purposes, in particular in LC displays, especially in LC displays of the PSA (polymer sustained alignment) or SA (self-aligning) mode, to an LC display of the PSA or SA mode comprising the LC medium, and to a process of manufacturing the LC display using the LC medium, especially an energy-saving LC display and energy-saving LC display production process.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: April 1, 2025
    Assignee: MERCK PATENT GMBH
    Inventors: Min Tzu Chuang, I-Wen Chen, Cheng-Jui Lin, Jer-Lin Chen, Kuang-Ting Chou
  • Patent number: 12266704
    Abstract: Semiconductor devices and their manufacturing methods are disclosed herein, and more particularly to semiconductor devices including a transistor having gate all around (GAA) transistor structures and manufacturing methods thereof. The methods described herein allow for complex shapes (e.g., “L-shaped”) to be etched into a multi-layered stack to form fins used in the formation of active regions of the GAA nanostructure transistor structures. In some embodiments, the active regions may be formed with a first channel width and a first source/drain region having a first width and a second channel width and a second source/drain region having a second width that is less than the first width.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shi Ning Ju, Guan-Lin Chen, Kuo-Cheng Chiang, Chih-Hao Wang
  • Publication number: 20250106931
    Abstract: Methods and systems for techniques for enabling wireless devices to receive multicast services in a radio resource control inactive (RRC_INCTIVE) state are disclosed. In an implementation, a method of wireless communication includes receiving, by a first network node, from a second network node, a session management signaling that include an alternative quality of service profile, and transmitting, by the first network node, to a wireless device, multicast session data based on the alternative quality of service profile during a radio resource control inactive period.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Inventors: Tao QI, Yang LI, Lin CHEN