Patents by Inventor Lin Chen

Lin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10868353
    Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a chip package, an antenna pattern, and an insulating layer. The chip package includes a semiconductor die and an insulating encapsulation enclosing the semiconductor die. The antenna pattern is electrically coupled to the chip package, where a material of the antenna pattern comprises a conductive powder having fused metal particles. The insulating layer disposed between the chip package and the antenna pattern, where the antenna pattern includes a first surface in contact with the insulating layer, and a second surface opposite to the first surface, and a surface roughness of the second surface is greater than a surface roughness of the first surface.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Lin Lu, Hsiu-Jen Lin, Hsuan-Ting Kuo, Kai-Chiang Wu, Ming-Che Ho, Wei-Yu Chen, Yu-Peng Tsai, Chia-Lun Chang, Chia-Shen Cheng, Chih-Chiang Tsao, Tzu-Chun Tang, Ching-Hua Hsieh, Tuan-Yu Hung, Cheng-Shiuan Wong
  • Patent number: 10867835
    Abstract: A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Shih-Yen Lin
  • Patent number: 10867803
    Abstract: A method of manufacturing a semiconductor device includes exposing a material to a semi-aqueous etching solution. The semi-aqueous etching solution comprises a solvent which chelates with the material and acts as a catalyst between the etching driving force and the material. As such, the etching driving force may be used to remove the material.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Wen Hsu, Jian-Jou Lian, Neng-Jye Yang, Chia-Wei Wu, Kuan-Lin Chen, Kuo Bin Huang, Li-Min Chen
  • Patent number: 10867913
    Abstract: A first layer is located over a substrate. The first layer includes a first dielectric component and a first conductive component. A first etching stop layer is located over the first dielectric component. A metal capping layer is located over the first conductive component. A second etching stop layer is located over the first etching stop layer and over the metal capping layer. A second layer is located over the second etching stop layer. The second layer includes a second dielectric component and a second conductive component. A third conductive component electrically interconnects the second conductive component to the first conductive component.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Hsu Wu, Hai-Ching Chen, Jung-Hsun Tsai, Shau-Lin Shue, Tien-I Bao
  • Patent number: 10867850
    Abstract: A method for forming a semiconductor structure is provided. A substrate including a metal portion and a low-k dielectric portion formed thereon is provided. The metal portion adjoins the low-k dielectric portion. A SAM solution is prepared. The SAM solution includes at least one blocking compound and a multi-solvent system. The multi-solvent system includes an alcohol and an ester. The SAM solution is applied over surfaces of the metal portion and the low-k dielectric portion. The substrate is heated to remove the multi-solvent system of the SAM solution to form a blocking layer on one of the metal portion and the low-k dielectric portion. A material layer is selectively deposited on the other one of the metal portion and the low-k dielectric portion using the blocking layer as a stencil. The blocking layer is removed from the substrate.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Chin Lee, Shao-Kuan Lee, Hsin-Yen Huang, Hai-Ching Chen, Shau-Lin Shue
  • Patent number: 10869031
    Abstract: A method of IntraBC coding using restricted reference area is disclosed. A reference block is selected from an available ladder-shaped reference area comprising previously processed blocks before the current working block in the current CTU row and previously processed blocks in one or more previous CTU rows. A location of a last previously processed block of a second previous CTU row that is one CTU row farther away from the current CTU row than a first previous CTU row is always in a same vertical location or after a same vertical position of a last previously processed block of the first previous CTU row. The current picture may be partitioned into multiple CTU rows for applying wavefront parallel processing (WPP) on the multiple CTU rows, where the current working block corresponds to a current working block. Similar restrictions may also be applied to slice/tile-based parallel processing.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: December 15, 2020
    Assignee: HFI Innovation Inc.
    Inventors: Shan Liu, Wang-Lin Lai, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Chih-Wei Hsu, Xiaozhong Xu
  • Patent number: 10867990
    Abstract: Some embodiments relate to a method. In the method, a semiconductor substrate is provided. Dopant impurities of a first dopant conductivity are implanted into the semiconductor substrate to form a body region. A gate dielectric and a field oxide region are formed over the semiconductor substrate. A polysilicon layer is formed over the gate dielectric and field oxide region. The polysilicon layer is patterned to concurrently form a conductive gate electrode over the gate dielectric and a resistor structure over the field oxide region. The resistor structure is perimeterally bounded by an inner edge of the conductive gate electrode. Dopant impurities of a second dopant conductivity, which is opposite the first dopant conductivity, are implanted into the semiconductor substrate to form a source region and a drain region. The drain region is perimeterally bounded by the inner edge of the conductive gate electrode.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
  • Patent number: 10868106
    Abstract: A method of manufacturing a semiconductor device and the semiconductor device are provided in which a plurality of layers with cobalt-zirconium-tantalum are formed over a semiconductor substrate, the plurality of layers are patterned, and multiple dielectric layers and conductive materials are deposited over the CZT material. Another layer of CZT material encapsulates the conductive material.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Li Huang, Chi-Cheng Chen, Hon-Lin Huang, Chien-Chih Chou, Chin-Yu Ku, Chen-Shien Chen
  • Patent number: 10868127
    Abstract: Present disclosure provides gate-all-around structure including a first transistor. The first transistor includes a semiconductor substrate having a top surface, a first nanowire over the top surface of the semiconductor substrate and between a first source and a first drain, a first gate structure around the first nanowire, an inner spacer between the first gate structure and the first source and first drain, and an isolation layer between the top surface of the semiconductor substrate and the first source and the first drain. Present disclosure also provides a method for manufacturing the gate-all-around structure described herein.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Ching Cheng, Yu-Lin Yang, I-Sheng Chen, Tzu-Chiang Chen
  • Publication number: 20200387247
    Abstract: A touch system includes a processor and a touch array. The touch array includes touch units. Each of the touch units includes a driving electrode, a first sensing electrode, and a second sensing electrode. A first capacitor is formed between the first sensing electrode and the driving electrode. A second capacitor is formed between the second sensing electrode and the driving electrode. The processor is configured to: determine whether the touch array operates in an underwater mode according to the first original capacitance value and the second original capacitance value; determine whether a conductor touch event occurs according to a first threshold value and a voltage across the first capacitor when the touch array operates in the underwater mode; and determine whether a non-conductor touch event occurs according to a second threshold value and a voltage across the second capacitor when the touch array operates in the underwater mode.
    Type: Application
    Filed: July 17, 2019
    Publication date: December 10, 2020
    Inventors: Hsien-Ying CHOU, Chun-Ta CHEN, Chih-Lin LIAO, Fu-Cheng WEI, Fu-Chiang CHUANG, Pi-Tsang CHANG
  • Publication number: 20200385080
    Abstract: An electric bicycle having an improved effect of heat dissipation has a body, a driving device, and a battery. The body has a frame, a rear wheel, and a front wheel, wherein the rear wheel and the front wheel are mounted to the frame. The driving device is mounted to the body and has a motor and a shell. The motor is connected with the frame and has a front end near the front wheel and a rear end near the rear wheel. The shell covers the motor and has multiple inlets and multiple outlets disposed therethrough. The multiple inlets are located near the front end of the motor. The multiple outlets are located near the rear end of the motor. The battery is electrically connected to the motor. The front wheel, the battery, the motor, and the rear wheel are serially aligned.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 10, 2020
    Inventors: Hong-Fang CHEN, Wei-Ting CHEN, WEI-LIN HSU, Ju-Sheng CHENG, TENG-MAO HONG
  • Publication number: 20200385531
    Abstract: A silsesquioxane polymer, composition, method, and article including such polymer, wherein the polymer includes a three-dimensional network of Formula (I): wherein: each R1 and R2 is independently a (C1-C4)alkyl; each L1 and L2 is independently in a single bond, an alkylene, or an alkylene bonded to a group selected from oxy, thio, carbonyl, —NH—, and combinations thereof; each R3 is independently a linear (C14-C100)alkyl; each R4 is independently a (C1-C30)alkyl, (C2-C30)heteroalkyl having at least one oxygen, sulfur, or —NH— group, or a (C1-C30)alkyl substituted with a fluoro, thiol, isocyanato, cyanato, hydroxyl, glycidoxy, or epoxy group; with the proviso that L1, L2, and R4 are selected such that each Si atom is directly bonded to an alkylene or an alkyl; m is an integer of at least 2; n is an integer of 0 or above; m+n is an integer of at least 3; each oxygen atom at an asterisk (*) is bonded to another Si atom within the three-dimensional network; and the silsesquioxane polymer is a solid at 25° C.
    Type: Application
    Filed: September 13, 2018
    Publication date: December 10, 2020
    Inventors: Jitendra S. Rathore, Chetan P. Jariwala, Lin Chen, Ramesh C. Kumar
  • Publication number: 20200385396
    Abstract: A compound for treatment or prevention of obesity or diseases related to obesity, and an application thereof. Specifically, provided are a compound as represented by formula I, or a pharmaceutically-acceptable salt thereof, and a pharmaceutical composition containing the compound. The compound has multiple functions and can be used for treatment or prevention of obesity or diseases related to obesity.
    Type: Application
    Filed: September 21, 2018
    Publication date: December 10, 2020
    Inventors: Yunfu ZHOU, Lin LI, Xiaojiang HAO, Duozhi CHEN
  • Publication number: 20200389082
    Abstract: A driving circuit for driving a synchronous rectifier device. The driving circuit may include a controllable clamping circuit having a first terminal coupled to a sensing terminal of the driving circuit, a second terminal coupled to a reference ground terminal of the driving circuit, a third terminal coupled to a driving terminal of the driving circuit, and a control terminal configured to receive a supply indication signal indicative of a voltage potential at a supply terminal of the driving circuit. The third terminal of the controllable clamping circuit may be connected to the second terminal of the controllable clamping circuit when the supply indication signal indicates that the voltage potential at the supply terminal has not been established to maintain the synchronous rectifier device off.
    Type: Application
    Filed: April 16, 2020
    Publication date: December 10, 2020
    Inventors: Lin Feng, Yuedong Chen
  • Patent number: 10861108
    Abstract: A resource sharing method is performed at a mobile terminal, the method including: configuring a to-be-shared resource by using a processor, to obtain data needed for obtaining a resource; obtaining a user identifier of a currently logged-in social networking application; obtaining a resource sharing message image template, a user-defined visible element, and configuration information of the visible element that are associated with the user identifier; drawing a resource sharing message image according to the resource sharing message image template, the visible element, and the configuration information, and displaying the resource sharing message image on a social network propagation page of the social networking application; and transferring, by using a social network, a resource sharing message corresponding to the resource sharing message image, the resource sharing message including the data needed for obtaining a resource.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: December 8, 2020
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Wenhui Lai, Danni Lin, Pengfei Zhong, Feng Xiong, Lin Liu, Wei Zhai, Richeng Xiao, Lingfeng Xu, Zengkang Liao, Cong Tang, Ming Huang, Moubang Li, Jianwei Kuang, Junchao Wang, Song Wang, Zurong Wu, Qiang Tu, Shan Chen, Jianli Li, Chang He, Wei Shi, Yanxue Chong, Yehui Huang, Qianqian Lin, Yi Chen, Yumiao Zhang, Yifan Yang, Chuanqing Li, Zhenquan Wu, Xingxing Dai
  • Patent number: 10860150
    Abstract: A touch system includes a processor and a touch array. The touch array includes touch units. Each of the touch units includes a driving electrode, a first sensing electrode, and a second sensing electrode. A first capacitor is formed between the first sensing electrode and the driving electrode. A second capacitor is formed between the second sensing electrode and the driving electrode. The processor is configured to: determine whether the touch array operates in an underwater mode according to the first original capacitance value and the second original capacitance value; determine whether a conductor touch event occurs according to a first threshold value and a voltage across the first capacitor when the touch array operates in the underwater mode; and determine whether a non-conductor touch event occurs according to a second threshold value and a voltage across the second capacitor when the touch array operates in the underwater mode.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: December 8, 2020
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Hsien-Ying Chou, Chun-Ta Chen, Chih-Lin Liao, Fu-Cheng Wei, Fu-Chiang Chuang, Pi-Tsang Chang
  • Patent number: 10861969
    Abstract: The present disclosure provides one embodiment of a method making semiconductor structure. The method includes forming a composite stress layer on a semiconductor substrate, wherein the forming of the composite stress layer includes forming a first stress layer of a dielectric material with a first compressive stress and forming a second stress layer of the dielectric material with a second compressive stress on the first stress layer, the second compressive stress being greater than the first compressive stress; and patterning the semiconductor substrate to form fin active regions using the composite stress layer as an etch mask.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: December 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Jen Lai, Yen-Ming Chen, Tsung-Lin Lee
  • Patent number: 10861884
    Abstract: A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 8, 2020
    Assignee: ARTILUX, INC.
    Inventors: Szu-Lin Cheng, Shu-Lu Chen
  • Patent number: 10861974
    Abstract: A semiconductor structure includes at least one stacked fin structure, a gate and a source/drain. At least one stacked fin structure is located on a substrate, wherein the stacked fin structure includes a first fin layer and a second fin layer, and a fin dielectric layer is sandwiched by the first fin layer and the second fin layer. The gate is disposed over the stacked fin structure. The source/drain is disposed directly on the substrate and directly on sidewalls of the whole stacked fin structure. The present invention provides a semiconductor process formed said semiconductor structure.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: December 8, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Zhi-Cheng Lee, Wei-Jen Chen, Kai-Lin Lee
  • Patent number: RE48355
    Abstract: A control structure for a window covering includes a base, a revolving wheel having an axial post, a restriction means including a bushing fitting around the axial post, a transmission member provided on a side of the bushing, and at least one pawl connected to the axial post. The revolving wheel is connected to the base. The restriction means has at least one cutting groove. The transmission member has at least one abutting portion on an inner wall thereof. The pawl is pivotable within a width of the cutting groove. When the revolving wheel is rotated forward, an end of the pawl passes through the cutting groove to mesh with the abutting portion. When the revolving wheel is rotated backward, the pawl disengages from the abutting portion, and the transmission member is rotatable relative to the revolving wheel. Whereby, it could prevent generating noise while operating the window covering.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: December 15, 2020
    Assignee: Nien Made Enterprise Co., Ltd.
    Inventors: Lin Chen, Keng-Hao Nien