Abstract: A data transmission method includes receiving, by first UE, bearer configuration information sent by a serving node; and performing, by the first UE, bearer configuration. A data transmission method, includes: sending, by a first base station, a sidelink (SL) data forwarding request to a second base station; and receiving, by the first base station, an SL data forwarding response sent by the second base station.

Abstract: A cordless window covering includes a first rail, a second rail, a covering body, two pulling cords, and a cord-retracting device including a first casing and an adjusting member movably disposed on the first casing. When relative motion of the first rail and the second rail occurs, the covering body is extended or retracted, and the two pulling cords apply a first force and a second force in opposite directions to the adjusting member respectively. When the first force does not equal to the second force, the user can exert slight force on the second rail to move the adjusting member towards a side with greater force, making one of the pulling cords applying greater force to the adjusting member have its length between the first rail and the second rail elongate as the adjusting member moves, such that the non-horizontal state of the second rail can be easily corrected.

Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.

Abstract: A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.

Abstract: The present disclosure relates to a fabricated concrete connection structure and a construction method, the structure including shear wall members. Tops of the shear wall members are fixedly connected to a plurality of connection female heads, and the plurality of connection female heads are arranged at equal intervals along length directions of the shear wall members. Reinforcing cage pre-formed holes penetrate through the tops and bottoms of the shear wall members. A plurality of connection male heads are arranged at equal intervals along the length directions of the shear wall members, and the plurality of connection male heads are in one-to-one correspondence with the plurality of connection female heads. One sides of the bottoms of the shear wall members are fixedly connected to folding plates. The present disclosure can achieve the purpose of connecting the shear wall members conveniently and quickly, improving the efficiency and quality of construction.

Abstract: A physical vapor deposition (PVD) system is disclosed. The PVD system includes a pedestal configured to hold a semiconductor wafer, a cover plate configured to hold a target, and a collimator between the pedestal and the cover plate. The collimator includes a plurality of passages configured to pass source material travelling from the cover plate toward the pedestal at an angle less than a threshold angle with respect to a line perpendicular to a surface of the pedestal facing the cover plate, where the collimator is configured to block source material travelling from the cover plate toward the pedestal at an angle greater than the threshold angle, where a first passage of the plurality of passages has a first passage length, where a second passage of the plurality of passages has a second passage length, and where the first passage length is less than the second passage length.

Abstract: A semiconductor device includes a substrate, a buffer layer disposed on the substrate, a channel layer disposed on the buffer layer, a barrier layer disposed on the buffer layer, and a passivation layer disposed on the barrier layer. The semiconductor device further includes a device isolation region that extends through the passivation layer, the barrier layer, and at least a portion of the channel layer, and encloses a first device region of the semiconductor device. A damage concentration of the device isolation region varies along a depth direction, and is highest near a junction between the barrier layer and the channel layer.

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

Abstract: A micro light-emitting element including an epitaxial structure, an insulating layer, an electrode structure and a sacrificial layer is provided. The epitaxial structure includes a top surface and a side surface. The insulating layer is disposed on the top surface and the side surface of the epitaxial structure, and the insulating layer includes an opening. The electrode structure is disposed on the top surface of the epitaxial structure and extends through the opening of the insulating layer to be electrically connected to the epitaxial structure. The sacrificial layer is sandwiched between a surface of the insulating layer and the corresponding electrode structure. A micro light-emitting element display device is further provided.

Abstract: Disclosed herein is a method for identifying and treating an early-stage hepatocellular carcinoma (HCC) in a subject. The method mainly includes determining the level of serum amyloid A (SAA) protein, and providing anti-cancer treatment based on the determined level of SAA protein. According to some embodiments of the present disclosure, the anti-cancer treatment is provided when the determined level of SAA protein is lower than that of a first control sample, or when the determined level of SAA protein is higher than that of a second control sample. In some embodiments, the first control sample is derived from a subject having a late stage HCC, and the second control sample is derived from a subject having a liver disease that is any of hepatitis, liver cirrhosis, or a combination thereof.

Abstract: An interface of a memory circuit includes a chip enable terminal, at least one data terminal, and a data strobe terminal. The chip enable terminal receives a chip enable signal that varies between a first high voltage and a low voltage. The at least one data terminal receives a first data signal that varies between a second high voltage and the low voltage during a command phase, and transmits or receives a second data signal during a data phase. The data strobe terminal receives a first data strobe signal that periodically varies between the second high voltage and the low voltage during the command phase, and transmits or receives a second data strobe signal that swings periodically during the data phase. During a transition interval between the command phase and the data phase, the data strobe terminal stops receiving or transmitting data strobe signals that swing periodically.

Abstract: A method of manufacturing a semiconductor device includes the following steps. A photoresist layer is formed over a material layer on a substrate. The photoresist layer has a composition including a solvent and a first photo-active compound dissolved in the solvent. The first photo-active compound is represented by the following formula (A1) or formula (A2): Zr12O8(OH)14(RCO2)18 ??Formula (A1); or Hf6O4(OH)6(RCO2)10 ??Formula (A2). R in the formula (A1) and R in the formula (A2) each include one of the following formulae (1) to (6): The photoresist layer is patterned. The material layer is etched using the photoresist layer as an etch mask.

Abstract: The present invention discloses a extra thick hot rolled H section steel and a production method therefor. The extra thick hot rolled H section steel contains, by mass, the following chemical components: 0.04-0.11% of C, 0.10-0.40% of Si, 0.40-1.00% of Mn, 0.40-1.00% of Cr, 0.10-0.40% of Cu, 0.020-0.060% of Nb, 0.040-0.100% of V, 0.010-0.025% of Ti, 0.010-0.030% of Al, 0.0060-0.0120% of N, not more than 0.015% of P, not more than 0.005% of S, not more than 0.0060% of O, and the balance Fe and trace residual elements, wherein 0.090%?Nb+V+Ti?0.170%, 6.5?(V+Ti)/N?10.5, and 0.30%?CEV?0.48%. The extra thick hot rolled H section steel has a flange thickness of 90 mm-150 mm, has excellent comprehensive mechanical properties, and can well meet the needs for heavy supporting structural parts of high-rise buildings, large squares, bridge structures, etc.

Abstract: A method for data radio bearer management, the method including: transmitting a data radio bearer (DRB) setup request message to a wireless communication node; receiving a DRB setup response message from the wireless communication node, determining at least one DRB and at least one Quality of Service (QoS) flow mapped to the at least one DRB supported by the wireless communication node; and configuring the wireless communication node to support the at least one DRB and the at least one QoS flow.

Abstract: Integrated circuit devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a semiconductor substrate, a first ILD layer over the semiconductor substrate, and a first metal feature in the first ILD layer; depositing a second metal feature over the workpiece such that the second metal feature is electrically coupled to the first metal feature; patterning the second metal feature to form a first trench adjacent to the first metal feature; depositing a blocking layer over the workpiece, wherein the blocking layer selectively attaches to the first ILD layer; depositing a barrier layer over the workpiece, wherein the barrier layer selectively forms over the second metal feature relative to the first ILD layer; and depositing a second ILD layer over the workpiece.

Abstract: A backlight module and a display device are provided, and the backlight module includes a light guide plate, a plurality of light-emitting components, and a frame. The light guide plate includes a first side, a second side, and two third sides. The light-emitting components are disposed on the first side, and light generated from the light-emitting components enters the light guide plate from the first side. The frame covers the second side and the third sides and includes an opening and at least one buffer portion. The light-emitting components are disposed in the opening, and the buffer portion is disposed on a side of the opening and contacts the light guide plate.

Abstract: The present disclosure provides an isolated recombinant oncolytic adenovirus, a pharmaceutical composition, and uses thereof for drugs for treatment of tumors and/or cancers. The recombinant oncolytic adenovirus is a selectively replicating oncolytic adenovirus, and the genome of the recombinant oncolytic adenovirus is integrated with a coding sequence of exogenous shRNA capable of inhibiting PDL1 expression in tumor cells. The replication capability of the virus in normal primary cells is much lower than the replication capability of the virus in tumor cells. Moreover, the expressed shPDL1 can significantly reduce the level of PDL1 protein highly expressed in tumor cells. Thus, the oncolytic killing effect of the oncolytic virus and the anti-tumor immunostimulatory effect of immune cells produce a synergistic effect.

Abstract: A high anti-interference microsystem based on System In Package (SIP) for a power grid is provided. The high anti-interference microsystem comprises a ceramic cavity, a ceramic substrate, a magnetic cover plate, a digital signal processing circuit, an analog signal conditioning circuit and a shield, wherein the ceramic cavity supports the ceramic substrate, the magnetic cover plate is in sealed contact with the ceramic cavity, and the ceramic substrate is arranged in a cavity formed by the ceramic cavity and the magnetic cover plate; a sealed shell of the microsystem based on SIP is composed of the magnetic cover plate and the ceramic cavity; the digital signal processing circuit and the analog signal conditioning circuit are arranged on the ceramic substrate and respectively process received signals to be processed; the shield covers an outer side of the sealed shell and is used for shielding external magnetic field interference.

Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed on and/or in a silicon substrate. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.