Patents by Inventor Lin (Colin) Chen

Lin (Colin) Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250145206
    Abstract: In an aspect, a carriage for guided autonomous locomotion may including a computing device configured to receive sensor inputs from a plurality of sensors attached to the carriage; determine a real-time orientation and environmental surroundings of the carriage based on the sensor inputs; initiate a corrective action based on the orientation and environmental surroundings of the carriage structure, wherein initiating the corrective action includes initiating and adjusting a rocking mode of the carriage based on the real-time orientation and environmental surroundings of the carriage based on the sensor inputs; engaging power-assisted braking to control deceleration of the carriage based on the sensor inputs; and generating and transmitting an alert regarding at least the rocking mode of the carriage.
    Type: Application
    Filed: December 20, 2024
    Publication date: May 8, 2025
    Applicant: GlüxKind Technologies Inc.
    Inventors: Anne Hunger, Zi Wen Huang, Check Hay Janson Chan, Anderson Jia Lin Kwan
  • Publication number: 20250146045
    Abstract: An apparatus and method for detecting the type, presence or amount of bacteria in a sample. The apparatus and method involve staining a liquid sample with a fluorescent stain corresponding to bacteria and imaging one or more portions of the sample at a selected set of sample Z-axis heights, X-Y coordinates, or both, within the sample after a predetermined time to allow for non-bacterial components in the sample to settle out of solution. A calibration method for correlating the concentration or amount of bacteria in biological samples by different analysis methods including glass slide methods, agar plate colony culture methods and high precision methods.
    Type: Application
    Filed: November 8, 2024
    Publication date: May 8, 2025
    Inventors: Jeremy Hammond, JuiMing Lin, Julia Chase, Seana Gray, Sarah Roger
  • Publication number: 20250145672
    Abstract: The present invention relates to chimeric papilloma virus L1 proteins and polynucleotides encoding thereof, and also to HPV virus-like particles and the preparation methods thereof. Said chimeric papilloma virus L1 protein comprises an N-terminal fragment derived from L1 protein of the first papilloma virus type, said N-terminal fragment maintains the immunogenicity of the L1 protein of the corresponding type of HPV; and a C-terminal fragment derived from L1 protein of the second papilloma virus type, said L1 protein of the second papilloma virus type has a better expression level and a better solubility compared to the L1 proteins of other HPV types; wherein said chimeric papilloma virus L1 proteins have the immunogenicity of the L1 proteins of the corresponding HPV types. Said chimeric papilloma virus L proteins have better expression amount and solubility for mass production of vaccines.
    Type: Application
    Filed: October 2, 2024
    Publication date: May 8, 2025
    Inventors: Liangzhi Xie, Chunxia Luo, Wei Zhang, Xiaoyan Suo, Lin Pang, Ping Hu
  • Publication number: 20250151263
    Abstract: A memory device includes a substrate, a word line buried in the substrate and extending in a first direction, a word line cap layer over the word line, a landing pad over and in contact with the substrate and the word line cap layer, a cell contact over and in contact with the landing pad, and a bit line over the word line and extending in a second direction perpendicular to the first direction.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 8, 2025
    Inventor: Chung-Lin HUANG
  • Publication number: 20250145198
    Abstract: Disclosed are a coordinated control method for urban rail transit passenger flow, an electronic device, and a storage medium. The method includes: predicting passenger flow in peak hours of urban rail lines using a simulation deduction function in a rail simulation system, including station entry ID, station exit ID, station entry time period, and passenger number data; obtaining passenger flow of passengers arriving at stations s and preparing to board during time periods t by dividing according to the different time periods t and the stations s; counting passenger flow in each direction of historical passenger flow, and calculating a proportion of the passenger flow in each direction of the historical passenger flow; constructing a mixed integer programming model of multi-station passenger flow coordinated control; and obtaining an optimal station entry passenger flow scheme by solving the mixed integer programming model of multi-station passenger flow coordinated control.
    Type: Application
    Filed: November 18, 2024
    Publication date: May 8, 2025
    Inventors: XIAOCHUN ZHANG, TAO LIN, YUXING YANG, ZHENWU CHEN, XING LIU, QIAN KAN, YONG ZHOU
  • Publication number: 20250147358
    Abstract: A display screen and an electronic device are provided. The display screen includes a frame, a cover plate, and a display module. The cover plate and the display module are stacked on the frame. The display module includes a light-emitting unit. A surface of the cover plate is provided with an anti-glare layer formed by etching for scattering light emitted by the light-emitting unit and/or the display module includes a light-homogenizing structure for scattering the light emitted by the light-emitting unit.
    Type: Application
    Filed: January 4, 2023
    Publication date: May 8, 2025
    Applicant: HUIZHOU TCL MOBILE COMMUNICATION CO., LTD.
    Inventors: Panwei XIONG, Jitao MA, Zhuwei QIU, Ke LIN
  • Publication number: 20250148967
    Abstract: A display driving device includes an emission circuit and a positive feedback circuit. The emission circuit is coupled to a first node. The emission circuit emits light according to a forward signal, a reverse signal, and a voltage level of the first node. The forward signal and the reverse signal are inversed phase of each other. The positive feedback circuit discharges the first node according to sweep signal.
    Type: Application
    Filed: October 29, 2024
    Publication date: May 8, 2025
    Inventors: Chih-Lung LIN, Cheng-Han KE, Jui-Hung CHANG, Ming-Yang DENG, Chia-Tien PENG
  • Publication number: 20250145343
    Abstract: Disclosed is a lid structure. An upper lid of the lid structure is buckled to a main lid, the upper lid is provided with an opening for a straw to extend out, a locking assembly is disposed between the main lid and the upper lid, and when the straw is bent, the locking assembly can move along a radial direction of the main lid to be inserted and locked in an inner hole in an end portion of the straw, so that water leakage can be avoided when the straw is bent. Due to the fact that when the straw is bent, the locking assembly can move along the radial direction of the main lid to be inserted and locked in the inner hole in the end portion of the straw, the straw is prevented from getting upright due to the bouncing force thereof to result in water leakage.
    Type: Application
    Filed: April 24, 2024
    Publication date: May 8, 2025
    Inventor: Yitong Lin
  • Publication number: 20250148273
    Abstract: In an aspect of the disclosure, a method for detecting outlier integrated circuits on a wafer is provided. The method comprises: operating multiple test items for each IC on the wafer to generate measured values of the multiple test items for each IC; selecting a target IC and neighboring ICs on the wafer repeatedly. each time after selecting the target IC executes the following steps: selecting a measured value of the target IC as a target measured value and selecting measured values of the target IC and the neighboring ICs as feature values of the target IC and the neighboring ICs; executing a transformer deep learning model to generate a predicted value of the target measured value; and identifying outlier ICs according to the predicted values of all the target ICs and the corresponding target measured values of all the target ICs.
    Type: Application
    Filed: October 25, 2024
    Publication date: May 8, 2025
    Inventors: Khim Jun Koh, Chi-Ming Lee, Yi-Ju Ting, Chung-Kai Chang, Po-Chao Tsao, Chin-Wei Lin, Yu-Lin Yang, Tung-Hsing Lee, Chin-Tang Lai
  • Publication number: 20250149079
    Abstract: A memory system includes a memory device and a processing device coupled to the memory device. The processing device receives a plurality of codewords; selects a first read voltage associated with the one or more codewords, such that the first read voltage is based on a time elapsed since a last write operation with respect to a management unit comprising the one or more codewords; and applies the first read voltage to a set of memory cells storing the one or more codewords.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Inventors: Yi-Min Lin, Fangfang Zhu, Chih-Kuo Kao
  • Publication number: 20250151320
    Abstract: A FinFET LDMOS device includes a semiconductor substrate; juxtaposed first well and second well in the semiconductor substrate; semiconductor fins extending on the semiconductor substrate along a first direction, the semiconductor fins including a first fin portion in the first well and a second fin portion in the second well; an extra semiconductor body adjoining the first fin portion and the second fin portion and extending along a second direction; a source region on the first fin portion; a drain region on the second fin portion; a gate covering the semiconductor fin and extending along the second direction, wherein the gate partially overlaps the first fin portion and partially overlaps the second fin portion, and the extra semiconductor body is covered by the gate; and a single-diffusion break structure embedded in the second fin portion and between the gate and drain region.
    Type: Application
    Filed: December 6, 2023
    Publication date: May 8, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi Chuen Eng, Tzu-Feng Chang, Teng-Chuan Hu, Yi-Wen Chen, Yu-Hsiang Lin
  • Publication number: 20250151329
    Abstract: A semiconductor device includes first channel members, a first gate structure wrapping around each of the first channel members, a first epitaxial feature abutting the first channel members, second channel members, a second gate structure wrapping around each of the second channel members, a second epitaxial feature abutting the second channel members, and an isolation feature has a first portion laterally stacked between the first and second gate structures and a second portion laterally stacked between the first and second epitaxial features. A width of the first portion of the isolation feature is larger than a width of the second portion of the isolation feature.
    Type: Application
    Filed: December 30, 2024
    Publication date: May 8, 2025
    Inventors: Jung-Chien Cheng, Chia-Hao Chang, Chih-Hao Wang, Guan-Lin Chen, Shi Ning Ju, Jia-Chuan You, Kuo-Cheng Chiang, Kuan-Lun Cheng
  • Publication number: 20250144077
    Abstract: The present disclosure relates to a dosage regimen for a thrombopoietin receptor agonist. In particular, the present disclosure relates to a method of administering hetrombopag or a pharmaceutically acceptable salt thereof to a patient in need, the patient suffering from mild liver injury or moderate liver injury.
    Type: Application
    Filed: January 19, 2023
    Publication date: May 8, 2025
    Inventors: Hongda LIN, Kai SHEN, Yaqi SHEN, Yue HU, Yanhua DING
  • Publication number: 20250144054
    Abstract: Methods of using the small molecule STAT3 inhibitor LLL 12B in the treatment of cancer, such as triple-negative breast cancer (TNBC) and pancreatic cancer, either alone or in combination with additional therapeutic agents, such as PARP inhibitors and CDK inhibitors, are provided.
    Type: Application
    Filed: February 15, 2023
    Publication date: May 8, 2025
    Applicants: UNIVERSITY OF MARYLAND, BALTIMORE, UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Jiayuh LIN, Li PAN, Chenglong LI
  • Publication number: 20250149477
    Abstract: A photonic assembly includes: an electronic integrated circuits (EIC) die including a semiconductor substrate, semiconductor devices located on a horizontal surface of the semiconductor substrate, first dielectric material layers embedding first metal interconnect structures, a dielectric pillar structure vertically extending through each layer selected from the first dielectric material layers, a first bonding-level dielectric layer embedding first metal bonding pads, wherein a first subset of the first metal bonding pads has an areal overlap with the dielectric pillar structure in a plan view; and a photonic integrated circuits (PIC) die including waveguides, photonic devices, second dielectric material layers embedding second metal interconnect structures, a second bonding-level dielectric layer embedding second metal bonding pads, wherein the second metal bonding pads are bonded to the first metal bonding pads.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 8, 2025
    Inventors: Yu-Hung Lin, Chih-Hao Yu, Wei-Ming Wang, Chen Chen, Chia-Hui Lin, Ren-Fen Tsui, Chen-Hua Yu
  • Publication number: 20250151377
    Abstract: A semiconductor device includes an insulated-gate bipolar transistor (IGBT) structure and a metal-oxide-semiconductor (MOS) transistor structure integrated in a wafer. The MOS transistor structure is connected in parallel with the IGBT structure. A thickness of a trench insulating layer in the MOS transistor structure is less than a thickness of a trench insulating layer in the IGBT structure.
    Type: Application
    Filed: November 4, 2024
    Publication date: May 8, 2025
    Applicants: Nexperia Technology (Shanghai) Ltd., NEXPERIA B.V.
    Inventors: Jinshan Shi, Lin Jie Huang, Chunlin Zhu, Ke Jiang
  • Publication number: 20250151387
    Abstract: A method includes forming a first semiconductor channel region and a second semiconductor channel region, wherein the second semiconductor channel region overlaps the first semiconductor channel region, forming a first gate dielectric on the first semiconductor channel region, and forming a second gate dielectric on the second semiconductor channel region. A first dipole film and a second dipole film are formed on the first gate dielectric and the second gate dielectric, respectively. The Dipole dopants in the first dipole film and the second dipole film are driven into the first gate dielectric and the second gate dielectric, respectively. The first dipole film and the second dipole film are then removed. A gate electrode is formed on both of the first gate dielectric and the second gate dielectric to form first transistor and a second transistor, respectively.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 8, 2025
    Inventors: Cheng-Ming Lin, Tsung-Kai Chiu, Wei-Yen Woon, Szuya Liao
  • Publication number: 20250146733
    Abstract: A refrigerator includes a refrigerator main-body and an air blowing member. A storage room is provided inside the refrigerator main-body, an avoiding part in communication with the storage room is provided at the inner wall surface of the refrigerator main-body, at least part of the air blowing member is provided inside the avoiding part, and the air blowing member is for blowing air toward the storage room.
    Type: Application
    Filed: March 7, 2023
    Publication date: May 8, 2025
    Inventors: Ziwen ZHANG, Peng QIU, Meisui LIN
  • Publication number: 20250147172
    Abstract: A multi-radar based detection device and detection method for a target object are provided. In the detection method, a first detection result corresponding to a first detection space and a second detection result corresponding to a second detection space are received. The first detection space entering a first status is determined in response to the first detection result indicating that the target object in the first detection space moves to an overlapping area between the first detection space and the second detection space. First information is output in response to determining that the first detection space enters the first status. The second detection space entering a second status is determined in response to the second detection result indicating that the target object not in the second detection space appears in the overlapping area. Second information is output in response to determining that the second detection space enters the second status.
    Type: Application
    Filed: December 25, 2023
    Publication date: May 8, 2025
    Applicant: Wistron Corporation
    Inventors: Hsiao Yi Lin, Kaijen Cheng, Kai-Chung Cheng, Yao-Tsung Chang, Yin-Yu Chen
  • Publication number: 20250147201
    Abstract: A quantitative simulation method for contributions of three origin of overpressure in sandstone is provided. Analytical testing data, well logging data, geological data, seismic data, and the like are collected and collated. A formation pressure characteristic of sandstone of a target horizon is analyzed and a burial history and a thermal history of the sandstone of the target horizon is reconstructed. An undercompacted pore pressure evolution history and an undercompacted hydrocarbon generation pressurized pore pressure evolution history, and a total pore pressure evolution history is quantitatively simulated. A quantitative analysis is performed on contributions of three origin of overpressure: quantitatively analyzing contributions of undercompaction, pressurization by hydrocarbon generation, and other origin to overpressure according to Ptotal=Punderc+Phydrog and Ptotal=Punderc+Phydrog+Ptotal to obtain overpressure evolution mechanisms of three origins.
    Type: Application
    Filed: October 10, 2024
    Publication date: May 8, 2025
    Inventors: Wenguang WANG, Chengyan LIN, Xiaofei FU, Min WANG, Yan ZHANG, Huiting HU, Haixue WANG, Chao LIU, Shansi TIAN, Jinfeng ZHANG, Likai CUI, Zhida LIU, Yerejiepu HABULASHENMU