Patents by Inventor Lin Huang

Lin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151263
    Abstract: A memory device includes a substrate, a word line buried in the substrate and extending in a first direction, a word line cap layer over the word line, a landing pad over and in contact with the substrate and the word line cap layer, a cell contact over and in contact with the landing pad, and a bit line over the word line and extending in a second direction perpendicular to the first direction.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 8, 2025
    Inventor: Chung-Lin HUANG
  • Publication number: 20250142943
    Abstract: A semiconductor device is provided. The semiconductor device includes a plurality of first nanostructures formed over a substrate, and a plurality of second nanostructures formed over the substrate. The semiconductor device includes a gate structure surrounding the first nanostructures and the second nanostructures, and the first hard mask layer and the second hard mask layer are surrounded by the gate dielectric layer. The semiconductor device includes an isolation structure extending upwardly above the substrate, and a bottom surface of the isolation structure is lower than a bottommost surface of the gate structure.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 1, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Cheng CHIANG, Chung-Wei HSU, Lung-Kun CHU, Jia-Ni YU, Chih-Hao WANG, Mao-Lin HUANG
  • Patent number: 12288937
    Abstract: An antenna system with switchable radiation gain includes a signal feeding element, a first antenna element, a second antenna element, a first diode, a first switch element, a second switch element, a first impedance transformer, and a second impedance transformer. The first antenna element is coupled to a first connection point. The second antenna element is coupled to a second connection point. The first diode has an anode coupled to the first connection point, and a cathode coupled to the second connection point. The first switch element and the second switch element are configured to select either the first impedance transformer or the second impedance transformer as a first target transformer, and the selected first target transformer is coupled between the first connection point and the signal feeding element.
    Type: Grant
    Filed: June 6, 2023
    Date of Patent: April 29, 2025
    Assignee: WISTRON NEWEB CORP.
    Inventor: Chun-Lin Huang
  • Patent number: 12288695
    Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a first channel region in a first region and over a second channel region in a second region; introducing a first dipole element into the first dielectric layer in the first region to form a first dipole-containing gate dielectric layer in the first region; forming a second dielectric layer over the first dipole-containing gate dielectric layer; introducing fluorine into the second dielectric layer to form a first fluorine-containing gate dielectric layer over the first dipole-containing gate dielectric layer; and forming a gate electrode over the first fluorine-containing gate dielectric layer.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: April 29, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu, Chih-Hao Wang
  • Patent number: 12277279
    Abstract: A multi-directional output device includes a printed circuit board on which first and second magnetic sensors are arranged, and a direction control unit arranged above the printed circuit board. The direction control unit includes: first and second rotating driving bodies; first and second sliding driving bodies respectively movably connected to the first and second rotating driving bodies; first and second magnets respectively fixed on the first and second sliding driving bodies; and a lower cover on which first and second slide grooves are provided, wherein the first and second sliding driving bodies are respectively slidably arranged in the first and second slide grooves, and the first magnetic sensor and the second magnetic sensor are arranged corresponding to the first slide groove and the second slide groove, respectively.
    Type: Grant
    Filed: March 7, 2024
    Date of Patent: April 15, 2025
    Assignee: FORWARD ELECTRONICS CO., LTD.
    Inventors: Ching-Hao Chung, Chun-Lin Huang, Hsiu-Chen Li
  • Publication number: 20250119603
    Abstract: The disclosure relates to a method and system for processing information in a content delivery network (CDN). The method includes: obtaining total bandwidth values at respective sampling time points within a management cycle, and arranging the total bandwidth values in chronological order; determining an interval between a first sampling time point and a second sampling time point as a management interval; determining usage ratios of respective bandwidth users according to a first bandwidth value used within the management interval by the bandwidth users sharing the CDN bandwidth, and a second bandwidth value in total used within the management interval by all of the bandwidth users sharing the CDN bandwidth; and managing, based on the usage ratios, bandwidth usage by the respective bandwidth users.
    Type: Application
    Filed: October 10, 2024
    Publication date: April 10, 2025
    Inventors: Zhanzhan Zhang, Shuang Bao, Fei Xie, Lin Huang, Yixing Sun, Jian Wang
  • Publication number: 20250120166
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Hou-Yu Chen, Ching-Wei Tsai, Chih-Hao Wang, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu
  • Publication number: 20250112784
    Abstract: Embodiments of this specification provide signature authentication methods and apparatuses. A service private key for signature authentication is embedded in a trusted execution environment (TEE) of a terminal device in which a client device is located. In an implementation, a method includes the following. The client device sends a signature authentication request to a server. The client device receives authentication data information sent from the server. The client device encrypts the authentication data information by using a key that is pre-synchronized with the TEE. The client device sends encrypted authentication data information to the TEE. The client device then receives the signature data sent from the TEE and sends the signature data to the server.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 3, 2025
    Applicant: Alipay (Hangzhou) Information Technology Co., Ltd.
    Inventors: Wanqiao Zhang, Lin Huang, Yujia Liu
  • Publication number: 20250112785
    Abstract: This specification provides methods, computer-readable media, and apparatuses for signature authentication. A server performs signature authentication on a terminal device. A service private key required for signature authentication is embedded in a trusted execution environment (TEE) of the terminal device. The TEE verifies a biological feature entered by a user, and after verification succeeds, the TEE completes a signature required by a signature authentication request.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 3, 2025
    Applicant: Alipay (Hangzhou) Information Technology Co., Ltd.
    Inventors: Wanqiao Zhang, Lin Huang, Yujia Liu
  • Patent number: 12264697
    Abstract: A fastener structure and an assembly method thereof are introduced. The fastener structure includes a body and a fastener. The body has a limiting structure and is for assembling at a first object. The fastener and the body are movably assembled. The fastener has a limiting portion, which coordinates with the limiting structure to limit a movement stroke of the fastener, so as to engage or disengage the fastener with or from a second object. Thus, the body can be assembled with the first object and the fastener can be engaged with or disengaged from the second object so as to complete quick coupling and separation of two objects, further achieving effects of repeated quick coupling and separation.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: April 1, 2025
    Assignee: FIVETECH TECHNOLOGY INC.
    Inventors: Ting-Jui Wang, Hsin-Lin Huang, Wei-Chen Huang
  • Patent number: 12265067
    Abstract: The disclosure describes embodiments of an apparatus including a first gas chromatograph including a fluid inlet, a fluid outlet, and a first temperature control. A controller is coupled to the first temperature control and includes logic to apply a first temperature profile to the first temperature control to heat, cool, or both heat and cool the first gas chromatograph. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: October 16, 2023
    Date of Patent: April 1, 2025
    Assignee: Tricorntech Corporation
    Inventors: Tsung-Kuan A. Chou, Shih-Chi Chu, Chia-Sheng Cheng, Li-Peng Wang, Chien-Lin Huang
  • Patent number: 12266654
    Abstract: Provided are FinFET devices and methods of forming the same. A FinFET device includes a substrate, a metal gate strip, gate spacers and a dielectric helmet. The substrate has fins. The metal gate strip is disposed across the fins and has a reversed T-shaped portion between two adjacent fins. The gate spacers are disposed on opposing sidewalls of the metal gate strip. A dielectric helmet is disposed over the metal gate strip.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Cheng Ching, Chih-Hao Wang, Huan-Chieh Su, Mao-Lin Huang, Zhi-Chang Lin
  • Patent number: 12265829
    Abstract: A method for re-triggering wakeup to handle time skew between a scalar operation and a vector operation is provided. The method includes: initiating, before a Load-Store (LST) pipeline completes an execution of a load operation corresponding to a vector micro-operation (uop) dispatched to a baler issue queue, a respective load operation in a Load (LD) pipeline corresponding to the vector uop; triggering a speculative wakeup from the LD pipeline during an execution of the respective load operation; triggering a second wakeup corresponding to the speculative wakeup from the LD pipeline; and waking up, based on the second wakeup, the vector micro-operation in the baler issue queue of the baler unit.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: April 1, 2025
    Assignee: SiFive, Inc.
    Inventor: Kuan Lin Huang
  • Publication number: 20250096077
    Abstract: A method of forming a semiconductor device is provided. The method includes mounting a semiconductor die on a die pad of a leadframe. The die pad includes a central opening configured to expose a central portion of the semiconductor die. A first end of a bond wire is attached to a bond pad of the semiconductor die and a second end of the bond wire is attached to a lead of the leadframe. An encapsulant encapsulates the semiconductor die and the leadframe. A portion of the lead and a portion of the die pad are exposed and protruded through the encapsulant.
    Type: Application
    Filed: September 18, 2023
    Publication date: March 20, 2025
    Inventors: Yen-Chih Lin, Yao Jung Chang, Kuan Lin Huang, Yi-Hsuan Tsai, Meng-huang Sie
  • Patent number: 12256646
    Abstract: A memory device includes a substrate, a spin-orbit torque (SOT) layer, a magnetic tunneling junction (MTJ) film stack, a connecting via and a shielding structure. The SOT layer is disposed on the substrate. The MTJ film stack is formed over SOT layer and on the substrate. The connecting via is disposed on and electrically connected to the MTJ film stack. The shielding structure is laterally surrounding the MTJ film stack and disposed on the SOT layer, wherein the shielding structure includes a first dielectric layer, a high magnetic permeability layer and a second dielectric layer, the first dielectric layer is in contact with the SOT layer and the MTJ film stack, and the high magnetic permeability layer is sandwiched between the first dielectric layer and the second dielectric layer.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Lin Huang, Ming-Yuan Song, Chien-Min Lee, Nuo Xu, Shy-Jay Lin
  • Patent number: 12253314
    Abstract: A heat pipe comprises a flat tube and a wick structure. The flat tube includes a hollow chamber and has a front and a rear sealed ends along an axial direction. The wick structure is disposed in the hollow chamber and extended along the axial direction of the flat tube. The wick structure is divided into a front, a middle and a rear sections sequentially along the axial direction. The front section is near the front sealed end, the rear section is near the rear sealed end. The front, middle and rear sections have a maximum length parallel to the width direction, respectively. The maximum length of the front section is greater than that of the middle section, and the maximum length of the middle section is greater than that of the rear section.
    Type: Grant
    Filed: September 20, 2023
    Date of Patent: March 18, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Lin Huang, Chiu-Kung Chen, Sheng-Hua Luo, Ti-Jun Wang
  • Patent number: D1071270
    Type: Grant
    Filed: September 11, 2023
    Date of Patent: April 15, 2025
    Assignee: Kuen Hwa Traffic Industrial Co., Ltd.
    Inventor: Hao-Lin Huang
  • Patent number: D1071271
    Type: Grant
    Filed: October 12, 2023
    Date of Patent: April 15, 2025
    Assignee: Kuen Hwa Traffic Industrial Co., Ltd.
    Inventor: Hao-Lin Huang
  • Patent number: D1072291
    Type: Grant
    Filed: October 6, 2023
    Date of Patent: April 22, 2025
    Assignee: Kuen Hwa Traffic Industrial Co., Ltd.
    Inventor: Hao-Lin Huang
  • Patent number: D1073342
    Type: Grant
    Filed: September 8, 2023
    Date of Patent: May 6, 2025
    Inventor: Lin Huang