Abstract: A backing up and recovering method of a file system is applied to a communication device. In the backing up and recovering method, a detecting step is performed to drive a first processing unit to detect whether the file system is damaged, and then generate a detection result. A transmitting step is performed to drive the first processing unit to transmit the detection result to a second processing unit. In response to the detection result being the file system is damaged, the second processing unit executes a system recovering step which recovers the file system according to a backup data that corresponds to the file system and is stored in a storage unit, and in response to the file system being not damaged, the second processing unit executes a backup confirming step which confirms whether the storage unit has the backup data.

Abstract: The present disclosure a bandwidth allocation method including steps of: (a) providing a base station and a user equipment, wherein the base station provides a plurality of bandwidth parts for the user equipment within a service area; (b) selecting a bandwidth part from the plurality of bandwidth parts as a reference bandwidth part and utilizing the base station to transmit a reference signal through the reference bandwidth part; (c) utilizing the user equipment to receive the reference bandwidth part and output a channel report according to a channel status of the reference bandwidth part, wherein the channel report includes a channel quality indication; (d) determining whether the channel quality indication is greater than a first critical value, performing a step (e) when the determination result is not satisfied; and (e) instructing the user equipment to switch to a bandwidth part with a smaller frequency band as the reference bandwidth part.

Abstract: A memory device is provided. The memory device includes a substrate, a spin-orbit torque layer and a magnetic tunneling junction (MTJ). The MTJ stacks with the spin-orbit torque layer over the substrate and includes a synthetic free layer, a barrier layer and a reference layer. The synthetic free layer includes a synthetic antiferromagnetic structure, a first spacer layer and a free layer, wherein the synthetic antiferromagnetic structure is disposed between the spin-orbit torque layer and the free layer. The barrier layer is disposed beside the synthetic free layer. The reference layer is disposed beside the barrier layer.

Abstract: A display device is provided. The display device includes a display panel set having a peripheral zone, a backlight module including a frame, an adhesive material disposed between the peripheral zone of the display panel set and the frame, and a plurality of support elements disposed on the frame and in contact with the adhesive material.

Abstract: A ball grid array (BGA) package for use in a touch panel controller includes a package substrate and a plurality of solder bumps. The plurality of solder bumps are disposed on the package substrate, arranged in a staggered pattern surrounding a hollow region on the package substrate, and coupled to electrodes of a touch panel via a multi-layer circuit board. The staggered pattern includes Ys1 top rows and Ys2 bottom rows, a minimum vertical distance between centers of two vertically adjacent solder bumps in the Ys1 top rows and the Ys2 bottom rows being referred to as an equivalent vertical pitch, and Ys1, Ys2 being integers exceeding 2. the hollow region has a minimum length defined by the minimum length=((Ys1?2)+(Ys2?2))*the equivalent vertical pitch.

Abstract: Semiconductor device includes pair of active devices, composite spin Hall electrode, and a magnetic tunnel junction. Composite spin Hall electrode is electrically connected to pair of active devices. Magnetic tunnel junction is disposed on opposite side of composite spin hall electrode with respect to pair of active devices. Spin Hall electrode includes pair of heavy metal layers, and spacer layer disposed in between pair of heavy metal layers. Pair of heavy metal layers is made of a heavy metal in a metastable state. Spacer layer comprises first material different from the pair of heavy metal layers.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes first and second dielectric features and a first semiconductor layer disposed between the first and second dielectric features. The structure further includes an isolation layer disposed between the first and second dielectric features, and the isolation layer is in contact with the first and second dielectric features. The first semiconductor layer is disposed over the isolation layer. The structure further includes a gate dielectric layer disposed over the isolation layer and a gate electrode layer disposed over the gate dielectric layer. The gate electrode layer has an end extending to a level between a first plane defined by a first surface of the first semiconductor layer and a second plane defined by a second surface opposite the first surface.

Abstract: A semiconductor device structure and method for manufacturing the same are provided. The semiconductor device structure includes a first word line, a second word line, a gate dielectric structure, a channel layer, and a bit line. The first word line and second word line extend along a first direction. The gate dielectric structure is disposed on a first sidewall of the first word line and on a second sidewall of the second word line. The channel layer is disposed on a first sidewall of the gate dielectric structure. The bit line is disposed on the channel layer and extends along a second direction substantially perpendicular to the first direction. A first roughness of a first sidewall of the channel is different from a second roughness of a second sidewall of the channel layer.

Abstract: A semiconductor device structure and method for manufacturing the same are provided. The method includes: providing a substrate; forming a first word line and a second word line extending along a first direction; forming a dielectric material conformally on a first sidewall of the first word line and on a second sidewall of the second word line, wherein the second sidewall of the second word line faces the first sidewall of the first word line; forming a semiconductor material on a sidewall of the dielectric material; and patterning the dielectric material and the semiconductor material to form a gate dielectric structure and a channel layer between the first word line and the second word line.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an adhesive element between the magnetic element and the substrate. The adhesive element extends exceeding opposite edges of the magnetic element. The semiconductor device structure further includes an isolation element extending exceeding the opposite edges of the magnetic element. The isolation element partially covers a top surface of the magnetic element. In addition, the semiconductor device structure includes a conductive line over the isolation element.

Abstract: In an embodiment, a device includes: a semiconductor fin extending from a semiconductor substrate; a nanostructure above the semiconductor fin; a source/drain region adjacent a channel region of the nanostructure; a bottom spacer between the source/drain region and the semiconductor fin; and a gap between the bottom spacer and the source/drain region.

Abstract: A semiconductor structure includes a semiconductor substrate; a spacer located in a trench of the semiconductor substrate, wherein the spacer includes two trench nitride layers and an empty gap sandwiched between the two trench nitride layers; a first nitride layer disposed to seal an exposed opening of the empty gap between the two trench nitride layers; a second nitride layer over the first nitride layer, wherein the second nitride layer has a higher density than the first nitride layer; and a third nitride layer having a first portion over the second nitride layer and a second portion disposed on sidewalls of the two trench nitride layers.

Abstract: A core detection device of a coring instrument includes a base body and a core switch mechanism provided on the base body. The base body is provided with a core channel communicated with a core barrel. The core switch mechanism includes a detection portion, a connecting rod assembly and a travel switch which are sequentially arranged and connected along a length direction of the coring instrument. The detection portion is rotatably installed on the base body and one end thereof is extended into the core channel, so that a core passing through the core channel pushes the detection portion to rotate. The connecting rod assembly can be pulled by the rotating detection portion to trigger the travel switch to operate. The core switch mechanism adopts a slider-connecting rod structure, and the kinematic pairs are mainly a sliding pair and a rotating pair.

Abstract: A method for forming a semiconductor arrangement comprises forming a first fin in a semiconductor layer. A first gate dielectric layer includes a first high-k material is formed over the first fin. A first sacrificial gate electrode is formed over the first fin. A dielectric layer is formed adjacent the first sacrificial gate electrode and over the first fin. The first sacrificial gate electrode is removed to define a first gate cavity in the dielectric layer. A second gate dielectric layer including a second dielectric material different than the first high-k material is formed over the first gate dielectric layer in the first gate cavity. A first gate electrode is formed in the first gate cavity over the second gate dielectric layer.

Abstract: A vapor chamber with a support structure and its manufacturing method are provided. The vapor chamber with the support structure includes a first plate, a second plate spaced apart from the first plate, and multiple support elements fixed between the first and second plates. On an outer surface of any of the first plate or the second plate, laser welding is performed on positions corresponding to the support elements so as to join the support elements to the first and second plates and to form weld ports on the outer surface of any of the plates. The invention solves the problem of fixing the support structure inside the thin vapor chamber, and therefore mass production can be realized.

Abstract: A knockdown water-cooling module latch device structure is assembled and connected with a water-cooling module. The knockdown water-cooling module latch device structure includes a latch device assembly having multiple latch members. The multiple latch members are correspondingly assembled and connected with each other around the water-cooling module to form the knockdown water-cooling module latch device structure, whereby the water-cooling module is framed in the latch device assembly. The knockdown water-cooling module latch device structure can be conveniently assembled and has high assembling freeness and better structural strength.

Abstract: An antenna system includes a first antenna element, a second antenna element, a dielectric substrate, a first reflective plate, and a second reflective plate. The first antenna element and the second antenna element are disposed on the dielectric substrate. The first reflective plate is adjacent to the dielectric substrate. The second reflective plate is coupled to the first reflective plate. A first angle is formed between the first reflective plate and the second reflective plate. The antenna system provides a relative large HPBW (Half-Power Beamwidth).

Abstract: Antibodies that include an antigen binding region that binds to CD137 are provided herein. Also provided herein are bispecific antibodies that include a first antigen binding region that binds to CD137 and a second antigen binding region that binds to an immune checkpoint molecule, an immune stimulatory molecule, or a tumor antigen. Pharmaceutical compositions that include the antibodies and methods of treating cancer are provided.

Abstract: A structure has stacks of semiconductor layers over a substrate and adjacent a dielectric feature. A gate dielectric is formed wrapping around each layer and the dielectric feature. A first layer of first gate electrode material is deposited over the gate dielectric and the dielectric feature. The first layer on the dielectric feature is recessed to a first height below a top surface of the dielectric feature. A second layer of the first gate electrode material is deposited over the first layer. The first gate electrode material in a first region of the substrate is removed to expose a portion of the gate dielectric in the first region, while the first gate electrode material in a second region of the substrate is preserved. A second gate electrode material is deposited over the exposed portion of the gate dielectric and over a remaining portion of the first gate electrode material.

Abstract: A method of manufacturing a panel assembly includes supporting the panel assembly in a free state using a holding fixture. The panel assembly has a skin panel, and sacrificial material coupled to a skin panel inner surface. The method includes acquiring a free state outer surface contour of the panel assembly by scanning a skin panel outer surface while the panel assembly is supported by the holding fixture. The method also includes developing a numerically controlled (NC) machining program having cutter paths configured for machining the interface locations to an inner surface contour that reflects nominal thicknesses of the panel assembly based off of the free state outer surface contour. In addition, the method includes machining the sacrificial material at the interface locations by moving a cutter along the cutter paths while the panel assembly is supported by the holding fixture.