Patents by Inventor Lin Huang

Lin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11805640
    Abstract: A semiconductor device includes a substrate, a passing word line in the substrate, and a dielectric structure surrounding the passing word line. The dielectric structure has an enlargement portion at a bottom of the dielectric structure, and a maximum width of the enlargement portion of the dielectric structure is wider than a width of a top of the dielectric structure.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: October 31, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chung-Lin Huang
  • Publication number: 20230345738
    Abstract: A device includes a substrate having a first side and a second side, a first transistor that includes a first gate over a first protrusion and a first source region and a first drain region interposing the first protrusion, a first buried contact disposed adjacent to the first protrusion and having at least a portion extending into the substrate, a first contact plug disposed over the first drain region, first conductive lines disposed over the first contact plug and electrically connecting to the first drain region by the first contact plug, first via penetrating through the substrate and connecting the first buried contact; and second conductive lines disposed over the second side of the substrate and electrically connecting to the first via. The first buried contact is electrically connecting to the first source region or the first gate.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 26, 2023
    Inventors: Shy-Jay Lin, Chien-Min Lee, Hiroki Noguchi, MingYuan Song, Yen-Lin Huang, William Joseph Gallagher
  • Publication number: 20230343819
    Abstract: Provided is an epitaxial structure and a method for forming such a structure. The method includes forming a fin structure on a substrate, wherein the fin structure includes a semiconductor material having substantially a {110} crystallographic orientation. The method includes etching a portion of the fin structure to expose a sidewall portion of the semiconductor material. Further, the method includes growing an epitaxial structure on the sidewall of the semiconductor material, wherein the epitaxial structure propagates with facets having a {110} crystallographic orientation.
    Type: Application
    Filed: April 26, 2022
    Publication date: October 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Min Liu, Tsz-Mei Kwok, Yung-Chun Yang, Cheng-Yen Wen, Li-Li Su, Chii-Horng Li, Yee-Chia Yeo, Hui-Lin Huang
  • Publication number: 20230339053
    Abstract: A vapor chamber with a support structure is provided. The vapor chamber with the support structure includes a first plate, a second plate spaced apart from the first plate, and multiple support elements fixed between the first and second plates. On an outer surface of any of the first plate or the second plate, laser welding is performed on positions corresponding to the support elements so as to join the support elements to the first and second plates and to form weld ports on the outer surface of any of the plates. The invention solves the problem of fixing the support structure inside the thin vapor chamber, and therefore mass production can be realized.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Inventors: Shih-Lin HUANG, Sien WU, Baoxun HE, Ti-Jun WANG
  • Patent number: 11796259
    Abstract: A heat pipe comprises a flat tube and a wick structure. The flat tube includes a hollow chamber and has a front and a rear sealed ends along an axial direction. The wick structure is disposed in the hollow chamber and extended along the axial direction of the flat tube. The wick structure is divided into a front, a middle and a rear sections sequentially along the axial direction. The front section is near the front sealed end, the rear section is near the rear sealed end. The front, middle and rear sections have a maximum length parallel to the width direction, respectively, the maximum length of the middle section is greater than that of the front section and that of the rear section so as to be used as the evaporator of the heat pipe.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: October 24, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Lin Huang, Chiu-Kung Chen, Sheng-Hua Luo, Ti-Jun Wang
  • Patent number: 11796515
    Abstract: The disclosure describes embodiments of an apparatus including a first gas chromatograph including a fluid inlet, a fluid outlet, and a first temperature control. A controller is coupled to the first temperature control and includes logic to apply a first temperature profile to the first temperature control to heat, cool, or both heat and cool the first gas chromatograph. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: October 24, 2023
    Assignee: Tricorntech Corporation
    Inventors: Tsung-Kuan A. Chou, Shih-Chi Chu, Chia-Sheng Cheng, Li-Peng Wang, Chien-Lin Huang
  • Publication number: 20230330163
    Abstract: Provided is a method of reducing a behavioral abnormality associated with a neurodevelopmental disorder in a subject, including administering to the subject an effective amount of Lactobacillus plantarum subsp. plantarum PS128. Also provided is a composition for preventing or treating a behavioral abnormality associated with a neurodevelopmental disorder in a subject in need thereof.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 19, 2023
    Applicant: BENED BIOMEDICAL CO., LTD.
    Inventors: Ying-Chieh TSAI, Chin-Lin HUANG, Chien-Chen WU, Chih-Chieh HSU
  • Patent number: 11791218
    Abstract: A method includes providing a structure having a substrate, first and second channel layers over the substrate, and first and second gate dielectric layers over the first and the second channel layers respectively. The method further includes forming a first dipole pattern over the first gate dielectric layer, the first dipole pattern having a first dipole material that is of a first conductivity type; forming a second dipole pattern over the second gate dielectric layer, the second dipole pattern having a second dipole material that is of a second conductivity type opposite to the first conductivity type; and annealing the structure such that elements of the first dipole pattern are driven into the first gate dielectric layer and elements of the second dipole pattern are driven into the second gate dielectric layer.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: October 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Chih-Hao Wang
  • Patent number: 11791771
    Abstract: A method for calibrating a first clock signal output by an oscillation module to obtain a calibrated second clock signal includes obtaining a first count value by counting a third clock signal of an external device. A second count value is obtained by counting a scan signal of the oscillation module, and a first cycle ratio is obtained based on the first count value and the second count value. It is determined whether the first clock signal has a frequency deviation by comparing the first cycle ratio with a reference cycle ratio. A frequency division coefficient of the oscillation module is adjusted when the first clock signal has the frequency deviation, so that the oscillation module divides a frequency of the first clock signal according to the adjusted frequency division coefficient, thereby obtaining the calibrated second clock signal.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: October 17, 2023
    Assignee: FocalTech Electronics (Shenzhen) Co., Ltd.
    Inventors: Bei Xiao, Xiao-Lin Huang, Zhi-Qiang Luo
  • Patent number: 11789238
    Abstract: Provided is an electronic imaging apparatus including a first and a second image-picking apparatus located on the same side of the electronic imaging apparatus. The first image-picking apparatus includes a first lens system which sequentially includes a first to a seventh lens along its optical axis, the first lens thereof has a positive refractive power, the second lens thereof has a negative refractive power. The second image-picking apparatus includes a second lens system which sequentially includes a first to a seventh lens along its optical axis, where the object-side surface of the first lens is concave and the image-side surface of the first lens is convex, the third lens has a positive refractive power, the fourth lens has negative refractive power, and the fifth lens has a positive refractive power. Half of a maximal field-of-view Semi-FOVT of the first and second lens system Semi-FOVT and Semi-FOVW satisfy 35°<Semi-FOVT<55° and 35°<Semi-FOVW<55°.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: October 17, 2023
    Inventors: Xiaoting Geng, Jia Lu, Lin Huang, Fujian Dai, Liefeng Zhao
  • Patent number: 11788405
    Abstract: A downhole oil level detection device includes a mounting housing (1) and a balance cylinder (2) installed on the mounting housing (1). The balance cylinder (2) includes a cylinder body (25) and a moving piston (21), a piston tension spring (22), a moving rod (23), a moving rod compression spring (24) and a displacement sensor (3) installed in the cylinder body (25). One end of the piston tension spring (22) is fixed to one end of the cylinder body (25), the other end thereof is connected to one side of the moving piston (21); one side of the moving piston (21) is also connected to one end of the moving rod compression spring (24), the other end of the moving rod compression spring (24) is connected to one end of the moving rod (23), the other end of the moving rod (23) is provided with the displacement sensor (3).
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: October 17, 2023
    Assignee: China Oilfield Services Limited
    Inventors: Zhibin Tian, Zanqing Wei, Lin Huang, Xiaoqiang Du, Yongren Feng, Bin Gao, Peng Sun, Yong Jiang, Minglue Fan, Shiwei Zong
  • Publication number: 20230322931
    Abstract: Provided are bispecific proteins that comprise a binding domain binding cell surface protein and a vascular endothelial growth factor (VEGF) inhibiting domain. Provided also is an antibody-drug conjugate that comprises a therapeutic agent and an antibody or an antigen-binding fragment binding PD-L1 and/or a VEGF inhibiting domain, wherein the therapeutic agent is covalently conjugated to the antibody or the antigen-binding fragment by a linker.
    Type: Application
    Filed: June 26, 2023
    Publication date: October 12, 2023
    Inventors: Jeng-Horng Her, Jhong-Jhe You, Ching-Hsuan Hsu, Po-Lin Huang
  • Publication number: 20230322939
    Abstract: Provided are monospecific and bispecific proteins that bind specifically to OX40 and/or PD-L1. Exemplary proteins release the inhibition through PD-L1 and stimulate T cell through OX40. Exemplary polyvalent proteins comprise at least one OX40 binding site and at least one PD-L1 binding site. In certain embodiments, the binding sites may be linked through an immunoglobulin constant region. Anti-OX40 and anti-PD-L1 antibodies are also provided.
    Type: Application
    Filed: March 9, 2023
    Publication date: October 12, 2023
    Inventors: Jhong-Jhe YOU, Ching-Hsuan HSU, Po-Lin HUANG, Hung-Tsai KAN, Ting-Yi CHANG, Hsin-Ta HSIEH, Jeng-Horng HER
  • Patent number: 11780922
    Abstract: Provided are bispecific proteins that comprise a binding domain binding cell surface protein and a vascular endothelial growth factor (VEGF) inhibiting domain. Provided also is an antibody-drug conjugate that comprises a therapeutic agent and an antibody or an antigen-binding fragment binding PD-L1 and/or a VEGF inhibiting domain, wherein the therapeutic agent is covalently conjugated to the antibody or the antigen-binding fragment by a linker.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: October 10, 2023
    Assignee: AP Biosciences, Inc.
    Inventors: Jeng-Horng Her, Jhong-Jhe You, Ching-Hsuan Hsu, Po-Lin Huang
  • Patent number: 11784091
    Abstract: A package structure and a formation method of a package structure are provided. The method includes forming a conductive structure over a carrier substrate and disposing a semiconductor die over the carrier substrate. The method also includes forming a protective layer to surround the conductive structure and the semiconductor die. The method further includes forming an insulating layer over the protective layer. The insulating layer has an opening exposing a portion of the conductive structure. In addition, the method includes forming a conductive layer over the insulating layer. The conductive layer fills the opening, and the conductive layer has a substantially planar top surface.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: October 10, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ling-Wei Li, Jung-Hua Chang, Cheng-Lin Huang
  • Patent number: 11782242
    Abstract: Disclosed herein is an optical imaging lens assembly, sequentially includes, from an object side to an image side along an optical axis, a first lens having refractive power; a second lens having an refractive power, the image-side surface thereof is concave; a third lens having refractive power; a fourth lens having refractive power; a fifth lens having refractive power; a sixth lens having refractive power; a seventh lens having a positive refractive power, the object-side surface thereof is a convex surface; and an eighth lens having a negative refractive power, the object-side surface thereof is a concave surface; where half of a diagonal length ImgH of an effective pixel area on an image plane of the optical imaging lens assembly satisfies: ImgH?6.0 mm, and the total effective focal length f of the optical imaging lens assembly and an entrance pupil diameter EPD of the optical imaging lens assembly satisfy: f/EPD<1.8.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: October 10, 2023
    Assignee: Zhejiang Sunny Optical Co., Ltd
    Inventors: Fujian Dai, Lin Huang, Yunbing Ji, Liefeng Zhao
  • Publication number: 20230307552
    Abstract: A semiconductor device according to the present disclosure includes a fin structure over a substrate, a vertical stack of silicon nanostructures disposed over the fin structure, an isolation structure disposed around the fin structure, a germanium-containing interfacial layer wrapping around each of the vertical stack of silicon nanostructures, a gate dielectric layer wrapping around the germanium-containing interfacial layer, and a gate electrode layer wrapping around the gate dielectric layer.
    Type: Application
    Filed: June 5, 2023
    Publication date: September 28, 2023
    Inventors: Mao-Lin Huang, Jia-Ni Yu, Lung-Kun Chu, Chung-Wei Hsu, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng
  • Publication number: 20230306900
    Abstract: The present disclosure relates to a driver for driving a light emitting unit array of a display device, the driver including: a plurality of driving units, each of the plurality of driving units includes: a driving circuit configured to provide a driving current to a corresponding column of light emitting units in the light emitting unit array according to a pulse width modulation signal, during a turn-on period of a channel switch; a charge path circuit configured to be connected in parallel with the driving circuit, and to be turned on during the turn-on period of the channel switch to form a charge path; and a discharge path circuit configured to be connected in parallel with the driving circuit, and to be turned-on after the channel switch is turned off, to form a discharge path.
    Type: Application
    Filed: June 2, 2023
    Publication date: September 28, 2023
    Inventors: Yu-Sheng Ma, Jhih-Siou Cheng, Chun-Fu Lin, Jin-Yi Lin, Ju-Lin Huang
  • Publication number: 20230307515
    Abstract: A semiconductor device includes a first interconnect structure and multiple channel layers stacked over the first interconnect structure. A bottommost one of the multiple channel layers is thinner than rest of the multiple channel layers. The semiconductor device further includes a gate stack wrapping around each of the channel layers except a bottommost one of the channel layers; a source/drain feature adjoining the channel layers; a first conductive via connecting the first interconnect structure to a bottom of the source/drain feature; and a dielectric feature under the bottommost one of the channel layers and directly contacting the first conductive via.
    Type: Application
    Filed: June 2, 2023
    Publication date: September 28, 2023
    Inventors: Chung-Wei Hsu, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11766847
    Abstract: A multilayer plate with composite material and a method thereof are described. The multilayer plate includes an aluminum-based thin sheet and a composite material layer. The aluminum-based thin sheet includes a first passivation layer, an aluminum-based metal layer, and a second passivation layer sequentially. The aluminum-based thin sheet includes a first surface and a second surface opposite to the first surface. The first and second surfaces are set with micro holes. A diameter of the micro holes in the second surface is ranging from 0.5 ?m to 10 ?m. The composite material layer includes a thermoplastic polymer and a fiber material. The composite material layer has a third surface and a fourth surface opposite each other. The second surface is adjacent to or connected to the third surface. At least one portion of the thermoplastic polymer fills into the micro holes in the second surface.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: September 26, 2023
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Yen-Lin Huang, Pei-Jung Tsai, Chi-Wah Keong