Patents by Inventor Lin Lu

Lin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210119115
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: December 27, 2020
    Publication date: April 22, 2021
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Publication number: 20210115521
    Abstract: Provided is a method of inhibiting tumor progression in a subject suffering from gastric cancer, including administering to said subject a pharmaceutical composition including an inhibitor of targeting PHF8-c-Jun-PKC?-Src-PTEN axis, or a pharmaceutically acceptable salt thereof. A method of determining a tumor progression state in a subject suffering from gastric cancer is also provided, which comprises providing a sample from the subject; detecting PHF8 expression level in the sample from the subject; and determining the tumor progression state of gastric cancer by the PHF8 expression level, wherein the PHF8 expression level is positively detected from moderate to strong expression indicating the subject suffering a late stage of gastric cancer.
    Type: Application
    Filed: October 20, 2020
    Publication date: April 22, 2021
    Applicant: National Tsing Hua University
    Inventors: Wen-Ching Wang, Lin-Lu Tseng, Ta-Sen Yeh, Hsin-Hung Cheng, Chiou-Hwa Yuh
  • Publication number: 20210112188
    Abstract: A method includes detecting, based on sensor data from a sensor on a mobile device, an environmental brightness measurement, where the mobile device comprises a display screen configured to adjust display brightness based on environmental brightness. The method further includes determining, based on image data from a camera on the mobile device, an extent to which the detected environmental brightness measurement is caused by reflected light from the display screen. The method additionally includes setting a rate of exposure change for the camera based on the determined extent to which the detected environmental brightness measurement is caused by reflected light from the display screen.
    Type: Application
    Filed: November 15, 2019
    Publication date: April 15, 2021
    Inventors: Jinglun Gao, Lin Lu, Gang Sun, Szepo Robert Hung, Ruben Manuel Velarde
  • Patent number: 10971463
    Abstract: A semiconductor device includes a first carrier including a first pad, a second carrier including a second pad disposed opposite to the first pad, a joint coupled with and standing on the first pad, a joint encapsulating the post and bonding the first pad with the second pad, a first entire contact interface between the first pad and the joint, a second entire contact interface between the first pad and the post, and a third entire contact interface between the joint and the second pad. The first entire contact interface, the second entire contact interface and the third entire contact interface are flat surfaces. A distance between the first entire contact interface and the third entire contact interface is equal to a distance between the second entire contact interface and the third entire contact interface. The second entire contact interface is a continuous surface.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 6, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Lin Lu, Kai-Chiang Wu, Ming-Kai Liu, Yen-Ping Wang, Shih-Wei Liang, Ching-Feng Yang, Chia-Chun Miao, Hao-Yi Tsai
  • Publication number: 20210091031
    Abstract: A semiconductor structure includes a semiconductor substrate; a first pad and a second pad on a first top surface of the semiconductor substrate; a circuit board including a second top surface, a recess indented from the second top surface into the circuit board, a polymeric pad disposed on the second top surface and corresponding to the first pad, and an active pad disposed within the recess and corresponding to the second pad; a first bump disposed between and contacting the polymeric pad and the first pad; and a second bump disposed between and contacting the active pad and the second pad, wherein a height of the first bump is substantially shorter than a height of the second bump.
    Type: Application
    Filed: December 8, 2020
    Publication date: March 25, 2021
    Inventors: CHUN-LIN LU, KAI-CHIANG WU
  • Patent number: 10950758
    Abstract: A light-emitting device comprises a semiconductor structure comprising a surface and a side wall inclined to the surface, wherein the semiconductor structure comprises a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, and the second semiconductor layer comprises a first edge and a first area; a reflective layer located on the second semiconductor layer and comprising an outer edge and a second area, wherein a distance between the first edge and the outer edge is greater than 0 ?m and is not greater than 10 ?m; and a first contact part comprising a metal formed on the reflective layer and the first semiconductor layer, wherein the first contact part comprises a first periphery comprising a first periphery length larger than a periphery length of the active layer from a top-view of the light-emitting device.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: March 16, 2021
    Assignee: Epistar Corporation
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Wen-Hung Chuang, Tzu-Yao Tseng, Cheng-Lin Lu
  • Patent number: 10925481
    Abstract: A system can include a non-transitory memory to store machine readable instructions and data, and a processor to access the non-transitory memory and execute the machine-readable instructions. The machine-readable instruction can include a global module that can be programmed to generate a visual field map (VFM) model that can include a set of visual function map parameters for an entire visual field for a subject. The global module can be programmed to update the set of visual function map parameters corresponding to updating a shape of the VFM based on subject response data generated during each administration of a vision test to a subject.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: February 23, 2021
    Assignees: Ohio State Innovation Foundation, Adaptive Sensory Technology, Inc.
    Inventors: Zhong-Lin Lu, Pengjing Xu, Luis Lesmes, Deyue Yu
  • Patent number: 10916694
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: February 9, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10913863
    Abstract: The present disclosure provides a cesium tungsten bronze-based self-cleaning nano heat-insulation coating material, and method of preparing the same. Cesium tungsten bronze nanoparticles are prepared by hydrothermal method using WCl6 and CsOH.5H2O as raw materials, PVP as a surfactant and acetic acid as an acid catalyst. TiO2 nanoparticles are prepared from TiCl4. Subsequently ball milling and dispersing of the cesium tungsten bronze nanoparticles, the TiO2 nanoparticles, and a silane coupling agent with water to obtain an aqueous slurry containing cesium tungsten bronze/TiO2 composite particles is performed. The concentration of the aqueous slurry containing cesium tungsten bronze/TiO2 composite particles is adjusted to obtain a self-cleaning nano heat-insulation coating material.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: February 9, 2021
    Assignee: The Hong Kong Polytechnic University
    Inventors: Lin Lu, Yuanhao Wang, Hong Zhong, Yan Hu
  • Publication number: 20210020560
    Abstract: A package structure includes a first RDL structure, a die, an encapsulant, a film, a TIV and a second RDL structure. The die is located over the first RDL structure. The encapsulant laterally encapsulates sidewalls of the die. The film is disposed between the die and the first RDL structure, and between the encapsulant and the first RDL structure. The TIV penetrates through the encapsulant and the film to connect to the first RDL structure. The second RDL structure is disposed on the die, the TIV and the encapsulant and electrically connected to die and the TIV.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chuei-Tang Wang, Chun-Lin Lu, Kai-Chiang Wu
  • Publication number: 20210007654
    Abstract: The present disclosure relates to systems and methods for characterizing a behavior change of a process. A behavior model that can include a set of behavior parameters can be generated based on behavior data characterizing a prior behavior change of a process. A stimulus parameter for a performance test can be determined based on the set of behavior parameters. An application of the performance test to the process can be controlled based on the stimulus parameter to provide a measure of behavior change of the process. Response data characterizing one or more responses associated with the process during the performance test can be received. The set of behavior parameters can be updated based on the response data to update the behavior model characterizing the behavior change of the process. In some examples, the behavior model can be evaluated to improve or affect a future behavior performance of the process.
    Type: Application
    Filed: March 12, 2018
    Publication date: January 14, 2021
    Inventors: ZHONG-LIN LU, YUKAI ZHAO, LUIS A. LESMES
  • Publication number: 20210013151
    Abstract: A package structure includes an insulating encapsulation, at least one semiconductor die, a redistribution circuit structure, and first reinforcement structures. The at least one semiconductor die is encapsulated in the insulating encapsulation. The redistribution circuit structure is located on the insulating encapsulation and electrically connected to the at least one semiconductor die. The first reinforcement structures are embedded in the redistribution circuit structure. A shape of the package structure includes a polygonal shape on a vertical projection along a stacking direction of the insulating encapsulation and the redistribution circuit structure, and the first reinforcement structures are located on and extended along diagonal lines of the package structure.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 14, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Lin Lu, Han-Ping Pu, Kai-Chiang Wu
  • Publication number: 20210000454
    Abstract: Collection devices with valves for liquid specimens are disclosed. In an embodiment, the disclosure provides a collection device including a reservoir having a sealed cavity, the sealed cavity being under a negative pressure; a delivery tube in communication with the sealed cavity of the reservoir and having a delivery inlet, a delivery outlet, and a valve disposed between the delivery inlet and the delivery outlet, the valve being configured to control the communication and blocking between the delivery inlet and the delivery outlet, and an angle being formed by an extension line of the delivery inlet an extension line of the delivery outlet; and a piercing component for piercing a tissue is connected with the delivery inlet of the delivery tube.
    Type: Application
    Filed: May 30, 2018
    Publication date: January 7, 2021
    Applicant: Zhongshan Ophthalmic Center of Sun Yat-Sen University
    Inventors: Yizhi LIU, Yan LUO, Xiaofeng LIN, Lin LU
  • Patent number: 10868353
    Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a chip package, an antenna pattern, and an insulating layer. The chip package includes a semiconductor die and an insulating encapsulation enclosing the semiconductor die. The antenna pattern is electrically coupled to the chip package, where a material of the antenna pattern comprises a conductive powder having fused metal particles. The insulating layer disposed between the chip package and the antenna pattern, where the antenna pattern includes a first surface in contact with the insulating layer, and a second surface opposite to the first surface, and a surface roughness of the second surface is greater than a surface roughness of the first surface.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Lin Lu, Hsiu-Jen Lin, Hsuan-Ting Kuo, Kai-Chiang Wu, Ming-Che Ho, Wei-Yu Chen, Yu-Peng Tsai, Chia-Lun Chang, Chia-Shen Cheng, Chih-Chiang Tsao, Tzu-Chun Tang, Ching-Hua Hsieh, Tuan-Yu Hung, Cheng-Shiuan Wong
  • Patent number: 10867952
    Abstract: A semiconductor structure includes a semiconductor substrate; a first pad and a second pad on a top surface of the semiconductor substrate; a circuit board including a polymeric pad and an active pad corresponding to the first pad and the second pad on the top surface of the semiconductor substrate respectively; a first bump disposed between the polymeric pad and the first pad; and a second bump disposed between the active pad and the second pad; wherein a first thickness of the polymeric pad is greater than a second thickness of the active pad. Further, a method of manufacturing the semiconductor structure is disclosed. The method includes providing a circuit board; and forming a polymeric pad and an active pad on a surface of the circuit board, wherein a first thickness of the polymeric pad is substantially greater than a second thickness of the active pad.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Lin Lu, Kai-Chiang Wu
  • Patent number: 10867957
    Abstract: Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package structure includes a pillar bump and an elongated solder bump bonded to the semiconductor die and the substrate. A height of the elongated solder bump is substantially equal to a height of the pillar bump. The elongated solder bump has a first width, at a first horizontal plane passing through an upper end of a sidewall surface of the elongated solder bump, and a second width, at a second horizontal plane passing through a midpoint of the sidewall surface. A ratio of the second width to the first width is in a range from about 0.5 to about 1.1.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Lin Lu, Kai-Chiang Wu, Ming-Kai Liu, Yen-Ping Wang, Shih-Wei Liang, Ching-Feng Yang, Chia-Chun Miao, Hung-Jen Lin
  • Patent number: 10865121
    Abstract: Provided is a method of making an inorganic platinum compound. The method includes the steps of: Step (A): providing a platinum material and a halogen-containing oxidizing agent; and Step (B): treating the platinum material with the halogen-containing oxidizing agent in a hydrochloric acid aqueous solution to obtain the inorganic platinum compound, including chloroplatinic acid or chloroplatinate salt; wherein the halogen-containing oxidizing agent excludes chlorine gas. The method of making an inorganic platinum compound is simple, safe, time-effective, cost-effective, and environment-friendly, and has the advantage of high yield.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: December 15, 2020
    Assignee: TRIPOD NANO TECHNOLOGY CORPORATION
    Inventors: Lin Lu, Kuei-Sheng Fan, Chun-Lun Chiu, Han-Wu Yen, Chi-Jiun Peng, Cheng-Ding Wang, Jim-Min Fang
  • Patent number: 10854520
    Abstract: The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: December 1, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Chun-Hsien Lin, Wei-Hao Huang, Kai-Teng Cheng
  • Publication number: 20200374882
    Abstract: Methods and systems for determining transmission power levels according to signal types and RF exposure limits. An example method generally includes determining a first transmission power for transmitting a first type of uplink (UL) signal, determining a second transmission power for transmitting a second type of UL signal based on the first transmission power, and transmitting at least one of the first UL signal according to the first transmission power or the second UL signal according to the second transmission power.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 26, 2020
    Inventors: Mingming CAI, Junsheng HAN, Raghu Narayan CHALLA, Tienyow LIU, Jing LIN, Jagadish NADAKUDUTI, Lin LU, Farhad MESHKATI
  • Publication number: 20200373173
    Abstract: An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and at least one first through interlayer via. The first redistribution structure includes a dielectric layer, a feed line at least partially disposed on the dielectric layer and a signal enhancement layer covering the feed line, wherein the signal enhancement layer has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The at least one first TIV is embedded in the insulation encapsulation and the signal enhancement layer.
    Type: Application
    Filed: August 11, 2020
    Publication date: November 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chiang Wu, Chung-Hao Tsai, Chun-Lin Lu, Yen-Ping Wang, Che-Wei Hsu