Patents by Inventor Lin Lu

Lin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220077072
    Abstract: A method of manufacturing a semiconductor structure includes following operations. A first die is provided. A first molding is formed to encapsulate the first die. A second die is disposed over the first molding. A mold chase is disposed over the second die and the first molding. The mold chase includes a protrusion protruded from the mold chase towards the first molding. A molding material is disposed between the mold chase and the first molding. A second molding is formed to surround the second die. The second die is at least partially covered by the second molding. The disposing of the mold chase includes surrounding the protrusion of the mold chase by the molding material.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Inventors: CHEN-HUA YU, KAI-CHIANG WU, CHUN-LIN LU
  • Patent number: 11271792
    Abstract: Systems and methods are provided for use in a Simple Network Management Protocol (“SNMP”) computing environment, by which efficiency of computing systems employing SNMP may be improved. An SNMP message is parsed, and the parsed information used to construct a binary tree. By using a binary tree, which is a data object that consumes less memory resources, efficiency of interactions between elements of the SNMP computing environment are improved. A method can include receiving a SNMP request for data. Then, the SNMP request is parsed and a binary tree constructed from the parsed SNMP request. The binary tree includes a plurality of type-length-value nodes. The length value of each non-leaf node is the summation of the length values of all the child nodes below the non-leaf node; and the length value of each leaf node is the length of the data requested.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 8, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dennis Tseng, Min-Lin Lu, Jason Chuang, Yi-Ning Chen
  • Publication number: 20220070796
    Abstract: Certain aspects of the present disclosure provide techniques for operating a wireless communication device pursuant to radio frequency (RF) exposure with antenna grouping. An example method of wireless communication by a user equipment generally includes accessing a stored backoff factor associated with an antenna group among a plurality of antenna groups. The method also includes transmitting, from at least one transmit antenna in the antenna group, a signal at a transmission power level based on the backoff factor in compliance with an RF exposure requirement.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 3, 2022
    Inventors: Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN, Troy CURTISS, Akhil DEODHAR
  • Publication number: 20220070795
    Abstract: Certain aspects of the present disclosure provide techniques for radio frequency (RF) exposure with antenna grouping. An example method for grouping antennas for RF exposure compliance by a processing system generally includes determining RF exposure distributions per transmit antenna configuration for a plurality of transmit antennas and assigning the plurality of transmit antennas to a plurality of antenna groups based on the RF exposure distributions.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 3, 2022
    Inventors: Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN, Troy CURTISS, Akhil DEODHAR
  • Patent number: 11264316
    Abstract: A package structure includes a first RDL structure, a die, an encapsulant, a film, a TIV and a second RDL structure. The die is located over the first RDL structure. The encapsulant laterally encapsulates sidewalls of the die. The film is disposed between the die and the first RDL structure, and between the encapsulant and the first RDL structure. The TIV penetrates through the encapsulant and the film to connect to the first RDL structure. The second RDL structure is disposed on the die, the TIV and the encapsulant and electrically connected to die and the TIV.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: March 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuei-Tang Wang, Chun-Lin Lu, Kai-Chiang Wu
  • Patent number: 11239096
    Abstract: An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and at least one first through interlayer via. The first redistribution structure includes a dielectric layer, a feed line at least partially disposed on the dielectric layer and a signal enhancement layer covering the feed line, wherein the signal enhancement layer has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The at least one first TIV is embedded in the insulation encapsulation and the signal enhancement layer.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: February 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chiang Wu, Chung-Hao Tsai, Chun-Lin Lu, Yen-Ping Wang, Che-Wei Hsu
  • Publication number: 20220028773
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, an insulating encapsulation, a buffer layer, a semiconductor device and a stiffener ring is provided. The redistribution circuit structure includes a first surface and a second surface opposite to the first surface. The wiring substrate is disposed on the first surface of the redistribution circuit structure. The insulating encapsulation is disposed on the first surface of the redistribution circuit structure and laterally encapsulating the wiring substrate. The buffer layer is disposed over the second surface of the redistribution circuit structure. The semiconductor device is disposed on the buffer layer, and the semiconductor device is electrically connected to the wiring substrate through the redistribution circuit structure. The stiffener ring is adhered with the buffer layer by an adhesive.
    Type: Application
    Filed: July 21, 2020
    Publication date: January 27, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Lin Lu, Jiun-Yi Wu, Kai-Chiang Wu
  • Publication number: 20220021409
    Abstract: According to certain aspects a wireless device includes transmitters, and a processor coupled to the transmitters. The processor is configured to determine a radio frequency (RF) exposure value at a peak location based on transmission power levels for the transmitters, determine a contribution of each one of the transmitters to the RF exposure value at the peak location, and reduce the transmission power level for each one of one or more of the transmitters based on the contributions of the transmitters to the RF exposure value at the peak location.
    Type: Application
    Filed: July 14, 2021
    Publication date: January 20, 2022
    Inventors: Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN
  • Publication number: 20220006940
    Abstract: A method includes detecting, based on sensor data from a sensor on a mobile device, an environmental brightness measurement, where the mobile device comprises a display screen configured to adjust display brightness based on environmental brightness. The method further includes determining, based on image data from a camera on the mobile device, an extent to which the detected environmental brightness measurement is caused by reflected light from the display screen. The method additionally includes setting a rate of exposure change for the camera based on the determined extent to which the detected environmental brightness measurement is caused by reflected light from the display screen.
    Type: Application
    Filed: September 16, 2021
    Publication date: January 6, 2022
    Inventors: Jinglun Gao, Lin Lu, Gang Sun, Szepo Hung, Ruben Manuel Velarde
  • Patent number: 11211358
    Abstract: Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a first molding material disposed around the integrated circuit die, and a through-via disposed within the first molding material. A first side of a redistribution layer (RDL) is coupled to the integrated circuit die, the through-via, and the first molding material. A second molding material is over a second side of the RDL, the second side of the RDL being opposite the first side of the RDL. The packaged semiconductor device includes an antenna over the second molding material.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: December 28, 2021
    Assignee: Taiwwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Chun Tang, Chuei-Tang Wang, Chun-Lin Lu, Wei-Ting Chen, Vincent Chen, Shou-Zen Chang, Kai-Chiang Wu
  • Patent number: 11211339
    Abstract: A semiconductor device includes a semiconductor die having an insulative layer and a conductive feature in the insulative layer, and a shield in contact with a lateral surface of the conductive feature. In some embodiments, the lateral surface of the conductive feature is aligned with an edge of the insulating material.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: December 28, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chuei-Tang Wang, Vincent Chen, Tzu-Chun Tang, Chen-Hua Yu, Ching-Feng Yang, Ming-Kai Liu, Yen-Ping Wang, Kai-Chiang Wu, Shou Zen Chang, Wei-Ting Lin, Chun-Lin Lu
  • Publication number: 20210391230
    Abstract: An interposer may comprise a metal layer above a substrate. A dam or a plurality of dams may be formed above the metal layer. A dam surrounds an area of a size larger than a size of a die which may be connected to a contact pad above the metal layer within the area. A dam may comprise a conductive material, or a non-conductive material, or both. An underfill may be formed under the die, above the metal layer, and contained within the area surrounded by the dam, so that no underfill may overflow outside the area surrounded by the dam. Additional package may be placed above the die connected to the interposer to form a package-on-package structure.
    Type: Application
    Filed: August 31, 2021
    Publication date: December 16, 2021
    Inventors: Chun-Lin Lu, Kai-Chiang Wu, Yen-Ping Wang, Shih-Wei Liang, Ching-Feng Yang
  • Patent number: 11200672
    Abstract: Systems and methods are described herein for modeling neural architecture. Regions of interest of a brain of a subject can be identified based on image data characterizing the brain of the subject. the identified regions of interest can be mapped to a connectivity matrix. The connectivity matrix can be a weighted and undirected network. A multivariate transformation can be applied to the connectivity matrix to transform the connectivity matrix into a partial correlation matrix. The multivariate transformation can maintain a positive definite constraint for the connectivity matrix. The partial correlation matrix can be transformed into a neural model indicative of the connectivity matrix.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: December 14, 2021
    Assignees: Ohio State Innovation Foundation, The Penn State Research Foundation, University of North Carolina, University of San Francisco
    Inventors: Skyler Cranmer, Bruce Desmarais, Shankar Bhamidi, James Wilson, Matthew Denny, Zhong-Lin Lu, Paul Stillman
  • Patent number: 11183461
    Abstract: A method of manufacturing a semiconductor structure includes following operations. A first die is provided. A first molding is formed to encapsulate the first die. A second die is disposed over the first molding. A mold chase is disposed over the second die and the first molding. The mold chase includes a protrusion protruded from the mold chase towards the first molding. A molding material is disposed between the mold chase and the first molding. A second molding is formed to surround the second die. The second die is at least partially covered by the second molding. The disposing of the mold chase includes surrounding the protrusion of the mold chase by the molding material.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: November 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chen-Hua Yu, Kai-Chiang Wu, Chun-Lin Lu
  • Patent number: 11179781
    Abstract: Provided is a method of making colloidal platinum nanoparticles. The method includes three consecutive steps: dissolving platinum powders by a halogen-containing oxidizing agent in HCl to obtain an inorganic platinum solution containing an inorganic platinum compound; adding a reducing agent into the same reaction vessel to form a mixture solution and heating the mixture solution to undergo a reduction reaction and produce a composition containing platinum nanoparticles, residues and a gas, and guiding the gas out of the reaction vessel, wherein the amount of the residues is less than 15% by volume of the mixture solution; and adding a medium into the same reaction vessel to disperse the platinum nanoparticles to obtain colloidal platinum nanoparticles. The method is simple, safe, time-effective, cost-effective, and has the advantage of high yield.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: November 23, 2021
    Assignee: TRIPOD NANO TECHNOLOGY CORPORATION
    Inventors: Lin Lu, Kuei-Sheng Fan, Chun-Lun Chiu Chiu, Han-Wu Yen, Hao-Chan Hsu, Chia-Yi Lin, Chi-Jiun Peng, Cheng-Ding Wang, Jim-Min Fang
  • Publication number: 20210351805
    Abstract: An apparatus including a housing; sensors configured to sense one or more locations upon which a user is gripping the housing; sensors including antenna modules configured to transmit a signal based on the one or more locations upon which the user is gripping the housing. Another aspect relates to an apparatus including a housing; a set of antenna modules situated proximate at different surface locations along the housing; and a controller configured to operate the set of antenna modules to determine at least one or more electromagnetic leakage coupling between at least one pair of antenna modules of the set. In this aspect, the controller may be configured to select one or more of the set of antenna modules for transmitting a signal based on the one or more electromagnetic leakage coupling associated with one or more of the different locations where a user grips the housing, respectively.
    Type: Application
    Filed: July 23, 2021
    Publication date: November 11, 2021
    Inventors: Udara FERNANDO, Lin LU
  • Publication number: 20210336090
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active area between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer including an upper surface; an exposed region formed in the semiconductor stack to expose the upper surface; a first protective layer covering the exposed region and a portion of the second semiconductor layer, wherein the first protective layer includes a first part with a first thickness formed on the upper surface and a second part with a second thickness formed on the second semiconductor layer, the first thickness is smaller than the second thickness; a first reflective structure formed on the second semiconductor layer and including one or multiple openings; and a second reflective structure formed on the first reflective structure and electrically connected to the second semiconductor layer through the one or multiple openings.
    Type: Application
    Filed: April 22, 2021
    Publication date: October 28, 2021
    Inventors: Jhih-Yong YANG, Hsin-Ying WANG, De-Shan KUO, Chao-Hsing CHEN, Yi-Hung LIN, Meng-Hsiang HONG, Kuo-Ching HUNG, Cheng-Lin LU
  • Patent number: 11159737
    Abstract: A method includes detecting, based on sensor data from a sensor on a mobile device, an environmental brightness measurement, where the mobile device comprises a display screen configured to adjust display brightness based on environmental brightness. The method further includes determining, based on image data from a camera on the mobile device, an extent to which the detected environmental brightness measurement is caused by reflected light from the display screen. The method additionally includes setting a rate of exposure change for the camera based on the determined extent to which the detected environmental brightness measurement is caused by reflected light from the display screen.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: October 26, 2021
    Assignee: Google LLC
    Inventors: Jinglun Gao, Lin Lu, Gang Sun, Szepo Robert Hung, Ruben Manuel Velarde
  • Patent number: 11145595
    Abstract: An integrated fan-out (InFO) package includes a first redistribution structure, a die, an encapsulant, a plurality of first through interlayer vias (TIV), a second redistribution structure, an insulating layer, a supporting layer, and a plurality of conductive patches. The die is disposed on the first redistribution structure. The encapsulant encapsulates the die. The first TIVs are embedded in the encapsulant. The second redistribution structure is disposed on the die, the first TIVs, and the encapsulant. The first redistribution structure is electrically connected to the second redistribution structure through the first TIVs. The insulating layer is disposed on the first redistribution structure opposite to the die and includes a plurality of air gaps. The supporting layer is over the insulating layer. The conductive patches are over the supporting layer. Locations of the conductive patches correspond to locations of the air gaps of the insulating layer.
    Type: Grant
    Filed: December 8, 2019
    Date of Patent: October 12, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Lin Lu, Han-Ping Pu, Kai-Chiang Wu, Nan-Chin Chuang
  • Publication number: 20210307610
    Abstract: A sensory mapping method for a human brain is disclosed. The method includes the steps of flattening the cortical surface of the human brain, projecting functional imaging data onto the flattened surface, smoothing the functional imaging data, generating a sensory map, registering sensory maps across individuals and analyzing the maps in the common space. The flattening utilizes a conformal parametrization method. The smoothing utilizes a topological smoothing method that utilizes a diffeomorphic smoother. The registering is diffeomorphic. The sensory mapping method may further include a step of processing the functional imaging data to produce topological results.
    Type: Application
    Filed: April 2, 2021
    Publication date: October 7, 2021
    Inventors: Yanshuai Tu, Yalin Wang, Zhong-Lin Lu