Patents by Inventor Lingli Zhang

Lingli Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250037452
    Abstract: Provided is a method of reconstructing multi-source long-time-series night light data and a system thereof, relating to the field of reconstructing ecological remote sensing data. Based on night light images of a first-generation satellite DMSP/OLS (Defense Meteorological Satellite Program/Operational Line-scan System) and a second-generation satellite NPP/VIIRS (National Polar-orbiting Partnership/Visible Infrared Imaging Radiometer Suite), a method of reconstructing a set of long-time-series night light data products is developed. Since satellite images that two generations of satellites have at the same time in a certain year use an inverse hyperbolic sine transform to fit NPP/VIIRS in 2013 into a data form of DMSP/OLS, and obtain an optimal fitting equation, thus producing a set of long-time-series data products from 1992 to 2021. The method can solve a fault problem between two generations of light data of DMSP/OLS and NPP/VIRS, and improve the accuracy of data reconstruction.
    Type: Application
    Filed: May 17, 2024
    Publication date: January 30, 2025
    Inventors: Yu Zhang, Kunlun Xiang, Jianjun Xu, Ruozhao Deng, Yuanhong Li, Lingli Fan, Xi Lu, Yujiao Deng, Jie Xu, Junjie Feng
  • Publication number: 20240429929
    Abstract: Pulse width modulation (PWM) driver circuitry comprising: a loop filter configured to receive an analog input signal and to output a digital loop filter output signal based on the analog input signal and an analog feedback signal; and a PWM modulator configured to receive a digital signal based on the digital loop filter output signal and to output a PWM signal, wherein the PWM driver circuitry further comprises a feedback path coupled to an output of the PWM driver circuitry for the analog feedback signal.
    Type: Application
    Filed: September 4, 2024
    Publication date: December 26, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Eric J. KING, Thomas H. HOFF, Lingli ZHANG
  • Publication number: 20240421783
    Abstract: This application relates to methods and apparatus for driving a transducer. A transducer driver has a switch network is operable to selectively connect a driver output to any of a first set of at least three different switching voltages. which are, in use, maintained throughout a switching cycle of the driver apparatus. The switch network is also operable to selectively connect the driver output to flying capacitor driver. A controller is configured to control the switch network and flying capacitor driver to generate a drive signal at the driver output based on an input signal, wherein in one mode of operation the driver output is switched between two of the first set of switching voltages with a controlled duty cycle and in another mode of operation the driver output is connected to the flying capacitor driver which is switched between first and second states with a controlled duty cycle.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Lingli ZHANG, Theodore M. BURK, Yongjie CHENG, Paul M. ASTRACHAN
  • Publication number: 20240413822
    Abstract: This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.
    Type: Application
    Filed: August 20, 2024
    Publication date: December 12, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ross C. MORGAN, Joe WALKER, Yongjie CHENG, Lingli ZHANG
  • Patent number: 12160166
    Abstract: A driver apparatus for driving a load with a differential drive signal is described. For a level of input signal within a first range, a first switching driver modulates the voltage at a first output node with a first modulation index by switchably connecting at least one flying capacitor to the first output node, whilst a second switching driver modulates the voltage at a second output node with a second modulation index by controlling switching between DC voltages that are maintained throughout a switching cycle of the driver apparatus. The first and second switching drivers are controlled so, for at least a first part of the first input range, a change in input signal level results in a change of the first controlled modulation index that has a different magnitude to any change in the second controlled modulation index, a constant modulation frequency of the differential drive signal is maintained.
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: December 3, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Lingli Zhang, Yongjie Cheng, John L. Melanson
  • Patent number: 12155380
    Abstract: This application relates to methods and apparatus for driving a transducer connected between two output nodes in a bridge-tied-load configuration. A driver receives first and second supply voltages and has charge pumps that generate respective first and second boosted voltages. The driver is operable in a first driver mode in which each output node is modulated between the first and second supply voltage; a second driver mode in which one output nodes is modulated between the first and second supply voltages and the other output node is modulated between either the first boosted voltage and the first supply voltage or between the second supply voltage and the second boosted voltage; and a third driver mode in which one of the output nodes is modulated between the first supply voltage and the first boosted voltage and the other output node is modulated between the second supply voltage and the second boosted voltage.
    Type: Grant
    Filed: March 22, 2023
    Date of Patent: November 26, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Ross C. Morgan, Yongjie Cheng, Lingli Zhang
  • Patent number: 12119834
    Abstract: Pulse width modulation (PWM) driver circuitry comprising: a loop filter configured to receive an analog input signal and to output a digital loop filter output signal based on the analog input signal and an analog feedback signal; and a PWM modulator configured to receive a digital signal based on the digital loop filter output signal and to output a PWM signal, wherein the PWM driver circuitry further comprises a feedback path coupled to an output of the PWM driver circuitry for the analog feedback signal.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: October 15, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: John L. Melanson, Eric J. King, Thomas H. Hoff, Lingli Zhang
  • Publication number: 20240322817
    Abstract: This application relates to methods and apparatus for driving a transducer connected between two output nodes in a bridge-tied-load configuration. A driver receives first and second supply voltages and has charge pumps that generate respective first and second boosted voltages. The driver is operable a first driver mode in which each output node is modulated between the first and second supply voltage; a second driver mode in which one output nodes is modulated between the first and second supply voltages and the other output node is modulated between either the first boosted voltage and the first supply voltage or between the second supply voltage and the second boosted voltage; and a third driver mode in which one of the output nodes is modulated between the first supply voltage and the first boosted voltage and the other output node is modulated between the second supply voltage and the second boosted voltage.
    Type: Application
    Filed: March 22, 2023
    Publication date: September 26, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ross C. MORGAN, Yongjie CHENG, Lingli ZHANG
  • Publication number: 20240316163
    Abstract: Lactoferrin (Lf) is used in the prophylaxis and treatment of Alzheimer's disease (AD), and is used as an active agent in the preparation of drugs for preventing or treating AD. By designing an in vitro model of AD, it has been proved that Lf can reduce the cell damage caused by A?, and play the role of anti-Alzheimer's disease by improving the anti-inflammatory ability, inhibiting the inflammation and regulating apoptosis. Meanwhile, using the APP/PS1 transgenic mouse model, it has been confirmed that Lf can reduce the phosphorylation level of Tau protein, shorten the time for mice to escape from the water maze, and improve learning and cognitive functions.
    Type: Application
    Filed: June 27, 2022
    Publication date: September 26, 2024
    Inventors: Guo CHENG, Lin ZHANG, Lingli ZHANG
  • Publication number: 20240322821
    Abstract: This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.
    Type: Application
    Filed: March 22, 2023
    Publication date: September 26, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ross C. MORGAN, Joe WALKER, Yongjie CHENG, Lingli ZHANG
  • Patent number: 12101085
    Abstract: This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.
    Type: Grant
    Filed: March 22, 2023
    Date of Patent: September 24, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Ross C. Morgan, Joe Walker, Yongjie Cheng, Lingli Zhang
  • Publication number: 20240291501
    Abstract: A digital-to-analog converter (DAC) may include an integrator, an input network, and control circuitry. The input network may include a plurality of parallel taps, each having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member is coupled between an input of the digital-to-analog converter and an input of the integrator. The control circuitry may be configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the DAC, such that the control circuitry enables, substantially contemporaneously, an even number of members at a time in order to increase the analog gain, with half of such enabled members in a first group and half of such enabled members in a second group.
    Type: Application
    Filed: May 3, 2024
    Publication date: August 29, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Lingli ZHANG, Paul M. ASTRACHAN, James KELTON
  • Patent number: 12047086
    Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps comprising a respective input resistance, and control circuitry configured to selectively enable and selectively disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: July 23, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Paul M. Astrachan, Lingli Zhang, John L. Melanson, James Kelton
  • Patent number: 12009829
    Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member of the plurality of parallel taps is coupled between an input of the digital-to-analog converter and an input of the integrator, and control circuitry configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter, such that the control circuitry enables an even number of members at a time, with half of such enabled members in a first group and half of such enabled members in a second group.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: June 11, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: John L. Melanson, Lingli Zhang, Paul M. Astrachan, James Kelton
  • Patent number: 11909317
    Abstract: A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuitry configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: February 20, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Eric J. King, Ajit Sharma, Lingli Zhang, Christian Larsen, Graeme G. Mackay
  • Patent number: 11859071
    Abstract: The present invention relates to the field of manufacture of polymer materials, and more particularly to an ultra-high molecular weight polyethylene (UHMWPE) composition and a cut resistant and creep resistant fiber prepared therefrom. The ultra-high molecular weight polyethylene composition comprises the following components: modified graphene, modified silicon carbide whisker, and ultra-high molecular weight polyethylene. The ultra-high molecular weight polyethylene composition provided by the present invention has superior cut resistance, high strength and high modulus. By regulating the morphology of silicon carbide, the type of a coupling agent, the mixing ratio and so on, not only cut resistance, high strength and high modulus can be provided, but also creep resistance can be improved.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: January 2, 2024
    Assignee: JIANGSU JONNYMA NEW MATERIALS CO., LTD.
    Inventors: Wendong Shen, Qingqing Chen, Haijian Cao, Xiaolin Chen, Junhao Che, Lingli Zhang, Xingyin Song, Feng Yu, Yafeng Cao, Chenyu Zhu
  • Patent number: 11837956
    Abstract: A method for determining if an inductor coupled to a switching network has been electrically shorted may include applying a voltage across the inductor for a predetermined period of time, controlling an impedance in an electrical path of a voltage source generating the voltage and the inductor, sensing an inductor current through the inductor, comparing the inductor current with a predetermined current threshold, and determining whether the inductor has been electrically shorted based on the inductor current, the predetermined current threshold, and the predetermined period of time.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: December 5, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Hasnain Akram, Graeme G. Mackay, Lingli Zhang, Ruoxin Jiang, Sakkarapani Balagopal, Theodore M. Burk
  • Patent number: 11811370
    Abstract: A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: November 7, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Ramin Zanbaghi, Lingli Zhang, Wei Xu, Justin Richardson, John L. Melanson
  • Publication number: 20230344331
    Abstract: A driver apparatus for driving a load with a differential drive signal is described. For a level of input signal within a first range, a first switching driver modulates the voltage at a first output node with a first modulation index by switchably connecting at least one flying capacitor to the first output node, whilst a second switching driver modulates the voltage at a second output node with a second modulation index by controlling switching between DC voltages that are maintained throughout a switching cycle of the driver apparatus. The first and second switching drivers are controlled so, for at least a first part of the first input range, a change in input signal level results in a change of the first controlled modulation index that has a different magnitude to any change in the second controlled modulation index a constant modulation frequency of the differential drive signal is maintained.
    Type: Application
    Filed: October 21, 2022
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Lingli ZHANG, Yongjie CHENG, John L. MELANSON
  • Publication number: 20230344394
    Abstract: A system may include an analog loop filter comprising a plurality of analog integrators, the analog loop filter configured to receive an analog signal input and a feedback output signal, at least one sampler for sampling outputs of the analog integrators, a second loop filter coupled between an output of an analog pulse-width modulation driver and a digital pulse-width modulation controller, wherein the second loop filter comprises at least one integrator and is configured to receive sampled outputs of the analog integrators from the at least one sampler and receive a feedback pulse-width modulation signal from the analog pulse-width modulation driver, and a correction subsystem configured to apply a non-linear function to a signal path of the second loop filter in order to compensate for non-linearity introduced as a result of sampling outputs of the analog integrators.
    Type: Application
    Filed: April 20, 2023
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Abhishek MUKHERJEE, Lingli ZHANG, Zhaohui HE