Patents by Inventor Long Lu

Long Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11031361
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a first semiconductor element and a first bonding structure. The first semiconductor element has a first element top surface and a first element bottom surface opposite to the element top surface. The first bonding structure is disposed adjacent to the element top surface of the first semiconductor element and includes a first electrical connector, a first insulation layer surrounding the first electrical connector, and a first metal layer surrounding the first insulation layer.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: June 8, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11024569
    Abstract: A semiconductor package device includes a circuit layer having a top surface, a first electronic component disposed on the top surface of the circuit layer, and a first conductive element disposed on the top surface of the circuit layer, the first conductive element having a top surface. The first electronic component has an active surface and a back surface facing the top surface of the circuit layer. A distance between the active surface of the first electronic component and the top surface of the circuit layer is greater than a distance between the top surface of the first conductive element and the top surface of the circuit layer.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: June 1, 2021
    Assignee: ADVANCED SEMICONDUCOR ENGINEERING, INC.
    Inventors: Jen-Kuang Fang, Wen-Long Lu
  • Publication number: 20210143072
    Abstract: A semiconductor device package includes a substrate; an electronic component disposed on the substrate; multiple supporting structures disposed on the substrate; and a reinforced structure disposed on the supporting structures and extending in parallel with the substrate.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 13, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20210134752
    Abstract: A semiconductor device package includes an electronic component. The electronic component has an active surface, a back surface opposite to the active surface, and a lateral surface connected between the active surface and the back surface. The electronic component has an electrical contact disposed on the active surface. The semiconductor device package also includes a redistribution layer (RDL) contacting the back surface of the electronic component, a first dielectric layer surrounding the electrical contact on the active surface of the electronic component, and a second dielectric layer surrounding the lateral surface of the electronic component and the first dielectric layer. The second dielectric layer has a first sidewall in contact with the lateral surface of the electronic component and a second sidewall opposite to the first sidewall. The second sidewall of the second dielectric layer has a first portion proximal to the RDL and a second portion distal from the RDL.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 6, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Patent number: 10993954
    Abstract: The present invention provides compositions and methods of their use in treating muscular dystrophy and other disorders.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: May 4, 2021
    Assignee: The Charlotte Mecklenburg Hospital Authority
    Inventors: Qi Long Lu, Marcela Cataldi, Pei Juan Lu
  • Patent number: 10998251
    Abstract: A semiconductor trace structure is provided for carrying a heat source. The semiconductor device package includes a dielectric structure having a first surface configured to receive the heat source and a second surface opposite to the first surface; a cavity defined by the dielectric structure to accommodate a fluid. The cavity includes a first passage portion between the first surface and the second surface. A first area of the first passage portion is closer to the heat source than a second area of the first passage portion, and that the first area is greater than the second area from a top view perspective. A method for manufacturing the semiconductor trace structure is also provided.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: May 4, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Publication number: 20210125940
    Abstract: A semiconductor package comprises a semiconductor substrate, a first metal layer, an adhesive layer, a second metal layer, a rigid supporting layer, and a plurality of contact pads. A thickness of the semiconductor substrate is equal to or less than 50 microns. A thickness of the rigid supporting layer is larger than the thickness of the semiconductor substrate. A thickness of the second metal layer is larger than a thickness of the first metal layer. A method comprises the steps of providing a device wafer; providing a supporting wafer; attaching the supporting wafer to the device wafer via an adhesive layer; and applying a singulation process so as to form a plurality of semiconductor packages.
    Type: Application
    Filed: December 30, 2020
    Publication date: April 29, 2021
    Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Jun Lu, Long-Ching Wang, Madhur Bobde, Bo Chen, Shuhua Zhou
  • Publication number: 20210125965
    Abstract: A semiconductor device package includes a dielectric layer and a patterned conductive layer disposed in the dielectric layer. The dielectric layer has a first surface, a second surface opposite the first surface, and a third surface extended from the first surface to the second surface. The semiconductor device package also includes a first electronic component in direct contact with the first surface of the dielectric layer and a first connection structure disposed between the first electronic component and the patterned conductive layer. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: October 24, 2019
    Publication date: April 29, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20210122972
    Abstract: The present invention discloses a quantum-dot film, wherein the quantum-dot film comprises a binder and a plurality of quantum dots dispersed in the binder, wherein the plurality of quantum dots are capable of being water-resistant and oxygen-resistant.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 29, 2021
    Inventors: Chia-Yeh Miu, Ge-Wei Lin, Chia-Jung Chiang, Chien-Chih Lai, Lung-Pin Hsin, Yi-Long Tyan, Jeffrey Wu, Hui-Yong Chen, Ying-Yi Lu
  • Publication number: 20210126231
    Abstract: A battery includes a case and a battery core assembly disposed in the case, the battery core assembly includes a plurality of battery core groups and an receiving space holding the plurality of battery core groups, the battery core groups are connected in series, and the battery core group includes at least one battery core; a separator plate is disposed between at least two adjacent battery core groups, the separator plate divides the receiving space into a plurality of receiving cavities, each of the receiving cavities holds one or more battery core groups , and a cavity wall of the receiving cavity comprised by a connection of the separator plate and a separation membrane; and the battery further includes a liquid injection channel and the liquid injection channel in a sealed state, the liquid injection channel is disposed on at least one of the separation membranes and the separator plates.
    Type: Application
    Filed: September 14, 2020
    Publication date: April 29, 2021
    Applicant: BYD COMPANY LIMITED
    Inventors: Chuanfu WANG, Long HE, Huajun SUN, Jianhua ZHU, Zhipei LU, Yan ZHU, Shichao HU
  • Publication number: 20210126293
    Abstract: The present invention provides a lithium-ion battery, including: a housing and a separator located inside the housing, where the separator separates internal space of the housing into a plurality of accommodation cavities, battery core sets are disposed inside the accommodation cavities, the battery core sets each include at least one pole shank, and the battery core sets are connected in series; and at least one separator is provided with a liquid injection hole, and the liquid injection hole is used to connect two adjacent accommodation cavities on two sides of the separator; and a block mechanism, where the block mechanism is located inside the housing, the block mechanism enables the liquid injection hole to be in a predetermined state, and the predetermined state includes an open state and a closed state. The battery provided in the present invention ensures isolation and safety of each battery core set while facilitating liquid injection.
    Type: Application
    Filed: September 10, 2020
    Publication date: April 29, 2021
    Applicant: BYD COMPANY LIMITED
    Inventors: Chuanfu WANG, Long HE, Huajun SUN, Zhipei LU, Jianhua ZHU, Yan ZHU, Shichao HU
  • Patent number: 10991660
    Abstract: A semiconductor wafer is singulated to form a plurality of semiconductor packages. The semiconductor wafer has a semiconductor substrate, a metal layer, an adhesive layer, a rigid supporting layer, a passivation layer and a plurality of contact pads. A semiconductor package has a semiconductor substrate, a metal layer, an adhesive layer, a rigid supporting layer, a passivation layer and a plurality of contact pads. A thickness of the rigid supporting layer is larger than a thickness of the semiconductor substrate. A thickness of the metal layer is thinner than the thickness of the semiconductor substrate. An entirety of the rigid supporting layer may be made of a single crystal silicon material or a poly-crystal silicon material. The single crystal silicon material or the poly-crystal silicon material may be fabricated from a reclaimed silicon wafer. An advantage of using a reclaimed silicon wafer is for a cost reduction.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: April 27, 2021
    Assignee: ALPHA ANC OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Long-Ching Wang, Zhen Du, Bo Chen, Jun Lu, Yueh-Se Ho
  • Publication number: 20210104810
    Abstract: A semiconductor assembly includes a first wiring structure, a first semiconductor die and a first electronic element. The first wiring structure has a first surface. The first semiconductor die is disposed on the first surface of the first wiring structure. The first electronic element is electrically connected to the first wiring structure. The first electronic element includes a first metal layer, a second metal layer and a dielectric material interposed between the first metal layer and the second metal layer. The first metal layer and the second metal layer are substantially perpendicular to the first surface of the first wiring structure.
    Type: Application
    Filed: October 3, 2019
    Publication date: April 8, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20210098677
    Abstract: A thermal conduction unit includes a conductive via, a periphery conductor and an isolation material. The conductive via includes a first thermoelectric material. The periphery conductor encloses the conductive via and includes a second thermoelectric material. An end of the periphery conductor is electrically connected to an end of the conductive via. The isolation material is interposed between the conductive via and the periphery conductor.
    Type: Application
    Filed: September 30, 2019
    Publication date: April 1, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20210098180
    Abstract: An inductor structure includes a carrier, a coil structure, an isolation structure and a ferromagnetism structure. The carrier has an upper surface. The coil structure is disposed adjacent to the upper surface of the carrier. The isolation structure covers the upper surface and the coil structure. The ferromagnetism structure is disposed on the isolation structure.
    Type: Application
    Filed: September 30, 2019
    Publication date: April 1, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Patent number: 10964616
    Abstract: A semiconductor package structure includes a first semiconductor die, an encapsulant surrounding the first semiconductor die, and a redistribution layer (RDL) electrically coupled to the first semiconductor die. The encapsulant has a first surface over the first semiconductor die and a second surface under the first semiconductor die. The RDL has a first portion under the first surface of the encapsulant and a second portion over the first surface of the encapsulant.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: March 30, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Publication number: 20210091453
    Abstract: A semiconductor device package includes a dielectric layer and a stacking conductive structure. The dielectric layer includes a first surface. The stacking conductive structure is disposed on the first surface of the dielectric layer. The stacking conductive structure includes a first conductive layer disposed on the first surface of the dielectric layer, and a second conductive layer stacked on the first conductive layer. A first surface roughness of the first surface of the dielectric layer is larger than a second surface roughness of a top surface of the first conductive layer, and the second surface roughness of the top surface of the first conductive layer is larger than a third surface roughness of a top surface of the second conductive layer.
    Type: Application
    Filed: September 20, 2019
    Publication date: March 25, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20210090947
    Abstract: A semiconductor substrate and a method of manufacturing the same are provided. The semiconductor substrate includes a dielectric layer, at least one first conductive trace, and a conductive via. The dielectric layer has a first dielectric surface and a second dielectric surface opposite to the first dielectric surface. The first conductive trace is disposed adjacent to the first dielectric surface of the dielectric layer. The conductive via is disposed adjacent to the second dielectric surface of the dielectric layer and connected to the first conductive trace, where the conductive via and the first conductive trace are connected at a first interface leveled with about a half thickness of the dielectric layer.
    Type: Application
    Filed: September 24, 2019
    Publication date: March 25, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20210083388
    Abstract: A semiconductor device package includes a circuit layer and a first antenna structure. The circuit layer includes a first surface, and a second surface opposite to the first surface. The first antenna structure is disposed on the first surface and electrically connected to the circuit layer. The first antenna structure includes a first patch, a second patch, a third patch, a first dielectric layer and a second dielectric layer. The second patch is disposed on the first patch. The first dielectric layer has a first dielectric constant (Dk), and is disposed between the first patch and the second patch. The third patch is disposed on the second patch. The second dielectric layer has a second dielectric constant and is disposed between the second patch and the third patch. The first dielectric constant is smaller than the second dielectric constant.
    Type: Application
    Filed: September 18, 2019
    Publication date: March 18, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Patent number: 10939682
    Abstract: Pesticidally active bi- or tricyclic heterocycles with sulphur-containing substituents, stereoisomers and tautomeric forms thereof that can be used as insecticides and can be prepared in a manner known per se.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: March 9, 2021
    Assignee: Syngenta Participations AG
    Inventors: Andrew Edmunds, Michel Muehlebach, Andre Stoller, Olivier Loiseleur, Anke Buchholz, Ottmar Franz Hueter, Roger Graham Hall, Daniel Emery, Pierre Joseph Marcel Jung, Long Lu, Yaming Wu, Aurelien Bigot, Ruifang Chen