Patents by Inventor Long Lu

Long Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230027674
    Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jhao-Cheng CHEN, Huang-Hsien CHANG, Wen-Long LU, Shao Hsuan CHUANG, Ching-Ju CHEN, Tse-Chuan CHOU
  • Publication number: 20230026556
    Abstract: The invention provides compositions, devices, methods and kits allowing for rapid diagnosis of infectious diseases via extraction-free, direct PCR techniques using combined biological samples.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 26, 2023
    Inventors: Robert E. Blomquist, Shi-Long Lu, Brian L. Harry, Xin Yao
  • Publication number: 20220415739
    Abstract: A package structure and a circuit layer structure are provided in the present disclosure. The package structure includes a wiring structure, a first electronic device, a second electronic device and at least one dummy trace. The wiring structure includes a plurality of interconnection traces. The first electronic device and the second electronic device are disposed on the wiring structure, and electrically connected to each other through the interconnection traces. The dummy trace is adjacent to the interconnection traces. A mechanical strength of the at least one dummy trace is less than a mechanical strength of one of the interconnection traces.
    Type: Application
    Filed: August 29, 2022
    Publication date: December 29, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Patent number: 11538760
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a lower conductive structure, a first semiconductor device and a second semiconductor device. The upper conductive structure is disposed on the lower conductive structure. The second semiconductor device is electrically connected to the first semiconductor device by a first path in the upper conductive structure. The lower conductive structure is electrically connected to the first semiconductor device through a second path in the upper conductive structure under the first path.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: December 27, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11532542
    Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a conductive structure and a plurality of conductive through vias. The conductive structure includes a dielectric layer, a circuit layer in contact with the dielectric layer, a plurality of dam portions and an outer metal layer. The dam portions extend through the dielectric layer. The dam portion defines a through hole. The outer metal layer is disposed adjacent to a top surface of the dielectric layer and extends into the through hole of the dam portion. The conductive through vias are disposed in the through holes of the dam portions and electrically connecting the circuit layer.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: December 20, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Publication number: 20220387346
    Abstract: The present invention is related to pharmaceutical formulations comprising a synthetic deoxypentitol and methods of use thereof in treating cancer.
    Type: Application
    Filed: June 2, 2022
    Publication date: December 8, 2022
    Inventors: Qi Long Lu, Pei Juan Lu
  • Publication number: 20220367304
    Abstract: An electronic device package and a method for manufacturing an electronic device package are provided. The electronic device package includes electronic device structure which includes a first electronic device and a first encapsulant, a second electronic device, and a second encapsulant. The first encapsulant encapsulates the first electronic device. The second electronic device is adjacent to the electronic device structure. The second encapsulant encapsulates the electronic device structure and the second electronic device. A first extension line along a lateral surface of the first electronic device and a second extension line along a lateral surface of the first encapsulant define a first angle, the second extension line along the lateral surface of the first encapsulant and a third extension line along a lateral surface of the second electronic device define a second angle, and the first angle is different from the second angle.
    Type: Application
    Filed: May 11, 2021
    Publication date: November 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuoching CHENG, Yuan-Feng CHIANG, Ya Fang CHAN, Wen-Long LU, Shih-Yu WANG
  • Patent number: 11495557
    Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: November 8, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jhao-Cheng Chen, Huang-Hsien Chang, Wen-Long Lu, Shao Hsuan Chuang, Ching-Ju Chen, Tse-Chuan Chou
  • Publication number: 20220290210
    Abstract: The invention provides compositions and methods allowing for rapid, accurate, robust, and low-cost diagnosis of infectious diseases via extraction-free, direct PCR techniques.
    Type: Application
    Filed: March 9, 2022
    Publication date: September 15, 2022
    Inventors: Robert E. Blomquist, Shi-Long Lu, Brian L. Harry, Jose P. Zevallos, Xin Yao
  • Patent number: 11441193
    Abstract: Disclosed is a diagnostic panel of methylated genomic loci encoding microRNA (mgmiR) markers that demonstrated 90% sensitivity and 100% specificity in the detection of head and neck squamous cell carcinoma (HNSCC). These results represent the first use of quantitative MS-PCR for the detection of mgmiRs. In addition, this panel demonstrates the ability to detect hypermethylation in the adjacent mucosa of cancer patients, suggesting its utility in early detection. This panel is also capable of detecting cancer by using saliva, blood and FNA tissue samples.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: September 13, 2022
    Assignee: The Regents of the University of Colorado, a body corporate
    Inventors: Shi-long Lu, John Song
  • Patent number: 11430708
    Abstract: A package structure and a circuit layer structure are provided in the present disclosure. The package structure includes a wiring structure, a first electronic device, a second electronic device and at least one dummy trace. The wiring structure includes a plurality of interconnection traces. The first electronic device and the second electronic device are disposed on the wiring structure, and electrically connected to each other through the interconnection traces. The dummy trace is adjacent to the interconnection traces. A mechanical strength of the at least one dummy trace is less than a mechanical strength of one of the interconnection traces.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: August 30, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11398408
    Abstract: A semiconductor substrate and a method of manufacturing the same are provided. The semiconductor substrate includes a dielectric layer, at least one first conductive trace, and a conductive via. The dielectric layer has a first dielectric surface and a second dielectric surface opposite to the first dielectric surface. The first conductive trace is disposed adjacent to the first dielectric surface of the dielectric layer. The conductive via is disposed adjacent to the second dielectric surface of the dielectric layer and connected to the first conductive trace, where the conductive via and the first conductive trace are connected at a first interface leveled with about a half thickness of the dielectric layer.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: July 26, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Publication number: 20220227692
    Abstract: The present disclosure describes compositions comprising substantially pure ribitol, pharmaceutical compositions of ribitol, and methods of making ribitol. The methods may include combining a reducing agent (e.g., borohydride) and ribose (e.g. D-ribose), optionally with stirring, to form a first reaction mixture; and contacting the first reaction mixture and an acidic quenching agent, optionally with stirring, to form a second reaction mixture, thereby forming ribitol.
    Type: Application
    Filed: May 27, 2020
    Publication date: July 21, 2022
    Inventors: George L. MCLENDON, Bas Wilhelmus Theodorus GRUIJTERS, Qi Long LU
  • Publication number: 20220199538
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a lower conductive structure, a first semiconductor device and a second semiconductor device. The upper conductive structure is disposed on the lower conductive structure. The second semiconductor device is electrically connected to the first semiconductor device by a first path in the upper conductive structure. The lower conductive structure is electrically connected to the first semiconductor device through a second path in the upper conductive structure under the first path.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Patent number: 11362052
    Abstract: A semiconductor device package includes a first electronic component having a first surface and a second surface opposite the first surface. The semiconductor device package further includes a first pad disposed on the first surface of the first electronic component. The first pad has a first surface facing away from the first surface of the first electronic component, a second surface opposite the first surface of the first pad, and a lateral surface extended between the first surface of the first pad and the second surface of the first pad. The semiconductor device package further includes a second pad disposed on the first surface of the first pad. The second pad has a first surface facing away from the first surface of the first pad, a second surface opposite the first surface of the second pad, and a lateral surface extended between the first surface of the second pad and the second surface of the second pad.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: June 14, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi-Chang Lee, Wen-Long Lu
  • Publication number: 20220148936
    Abstract: A package structure and a circuit layer structure are provided in the present disclosure. The package structure includes a wiring structure, a first electronic device, a second electronic device and at least one dummy trace. The wiring structure includes a plurality of interconnection traces. The first electronic device and the second electronic device are disposed on the wiring structure, and electrically connected to each other through the interconnection traces. The dummy trace is adjacent to the interconnection traces. A mechanical strength of the at least one dummy trace is less than a mechanical strength of one of the interconnection traces.
    Type: Application
    Filed: November 6, 2020
    Publication date: May 12, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20220130776
    Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 28, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20220128768
    Abstract: An optical device package includes a semiconductor substrate, and an optical device. The semiconductor substrate has a first surface, a second surface different in elevation from the first surface, and a profile connecting the first surface to the second surface. A surface roughness of the profile is greater than a surface roughness of the second surface. The optical device is disposed on the second surface and surrounded by the profile.
    Type: Application
    Filed: January 4, 2022
    Publication date: April 28, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Huang-Hsien CHANG, Po Ju WU, Yu Cheng CHEN, Wen-Long LU
  • Patent number: 11302644
    Abstract: A package structure includes a substrate, a first electronic component, a second electronic component, a third electronic component and a connection component. The substrate includes a first surface and a second surface opposite the first surface. The first electronic component is disposed at the substrate and has a first active surface exposed from the second surface of the substrate. The second electronic component includes a second active surface facing the first active surface of the first electronic component. The second active surface of the second electronic component is electrically connected to the first active surface of the first electronic component. The third electronic component includes a third active surface facing the first active face of the first electronic component. The connection component electrically connects the third active surface of the third electronic component to the first active surface of the first electronic component. The connection component has at least two bendings.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: April 12, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11302594
    Abstract: A semiconductor package includes a substrate, an electronic component and a first dilatant layer. The electronic component is disposed on the substrate. The electronic component has a top surface, a bottom surface opposite to the top surface and a lateral surface extending between the top surface and the bottom surface. The first dilatant layer is disposed on the top surface of the electronic component and extends along the lateral surface of the electronic component.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: April 12, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu