Abstract: A semiconductor assembly includes a first wiring structure, a first semiconductor die and a first electronic element. The first wiring structure has a first surface. The first semiconductor die is disposed on the first surface of the first wiring structure. The first electronic element is electrically connected to the first wiring structure. The first electronic element includes a first metal layer, a second metal layer and a dielectric material interposed between the first metal layer and the second metal layer. The first metal layer and the second metal layer are substantially perpendicular to the first surface of the first wiring structure.

Abstract: An inductor structure includes a carrier, a coil structure, an isolation structure and a ferromagnetism structure. The carrier has an upper surface. The coil structure is disposed adjacent to the upper surface of the carrier. The isolation structure covers the upper surface and the coil structure. The ferromagnetism structure is disposed on the isolation structure.

Abstract: A thermal conduction unit includes a conductive via, a periphery conductor and an isolation material. The conductive via includes a first thermoelectric material. The periphery conductor encloses the conductive via and includes a second thermoelectric material. An end of the periphery conductor is electrically connected to an end of the conductive via. The isolation material is interposed between the conductive via and the periphery conductor.

Abstract: A semiconductor package structure includes a first semiconductor die, an encapsulant surrounding the first semiconductor die, and a redistribution layer (RDL) electrically coupled to the first semiconductor die. The encapsulant has a first surface over the first semiconductor die and a second surface under the first semiconductor die. The RDL has a first portion under the first surface of the encapsulant and a second portion over the first surface of the encapsulant.

Abstract: A semiconductor substrate and a method of manufacturing the same are provided. The semiconductor substrate includes a dielectric layer, at least one first conductive trace, and a conductive via. The dielectric layer has a first dielectric surface and a second dielectric surface opposite to the first dielectric surface. The first conductive trace is disposed adjacent to the first dielectric surface of the dielectric layer. The conductive via is disposed adjacent to the second dielectric surface of the dielectric layer and connected to the first conductive trace, where the conductive via and the first conductive trace are connected at a first interface leveled with about a half thickness of the dielectric layer.

Abstract: A semiconductor device package includes a dielectric layer and a stacking conductive structure. The dielectric layer includes a first surface. The stacking conductive structure is disposed on the first surface of the dielectric layer. The stacking conductive structure includes a first conductive layer disposed on the first surface of the dielectric layer, and a second conductive layer stacked on the first conductive layer. A first surface roughness of the first surface of the dielectric layer is larger than a second surface roughness of a top surface of the first conductive layer, and the second surface roughness of the top surface of the first conductive layer is larger than a third surface roughness of a top surface of the second conductive layer.

Abstract: A semiconductor device package includes a circuit layer and a first antenna structure. The circuit layer includes a first surface, and a second surface opposite to the first surface. The first antenna structure is disposed on the first surface and electrically connected to the circuit layer. The first antenna structure includes a first patch, a second patch, a third patch, a first dielectric layer and a second dielectric layer. The second patch is disposed on the first patch. The first dielectric layer has a first dielectric constant (Dk), and is disposed between the first patch and the second patch. The third patch is disposed on the second patch. The second dielectric layer has a second dielectric constant and is disposed between the second patch and the third patch. The first dielectric constant is smaller than the second dielectric constant.

Abstract: Pesticidally active bi- or tricyclic heterocycles with sulphur-containing substituents, stereoisomers and tautomeric forms thereof that can be used as insecticides and can be prepared in a manner known per se.

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a first dielectric layer, a first semiconductor element, a second dielectric layer, and at least one first conducive via. The first dielectric layer has a first top surface, a first bottom surface opposite to the first top surface, and a first side surface extending from the first top surface to the first bottom surface. The first semiconductor element is disposed adjacent to the first top surface of the first dielectric layer. The second dielectric layer has a second top surface, a second bottom surface opposite to the second top surface, and a second side surface extending from the second top surface to the second bottom surface, where the second dielectric layer covers a top surface of the first semiconductor element and the first side surface of the first dielectric layer.

Abstract: A package structure includes a base material, at least one electronic device, at least one dummy pillar and an encapsulant. The electronic device is electrically connected to the base material. The dummy pillar is disposed on the base material. The encapsulant covers the electronic device and a top end of the dummy pillar.

Abstract: A package structure includes a base material, at least one electronic device, at least one encapsulant and a plurality of dummy pillars. The electronic device is electrically connected to the base material. The encapsulant covers the electronic device. The dummy pillars are embedded in the encapsulant. At least two of the dummy pillars have different heights.

Abstract: A semiconductor package device includes a wiring structure, a semiconductor chip and an encapsulant. The semiconductor chip is electrically connected to the wiring structure. The encapsulant is disposed on the wiring structure and covers the semiconductor chip. A roughness (Ra) of a surface of the encapsulant is about 5 nm to about 50 nm.

Abstract: Compounds of formula I A-B??(I), wherein A is a radical selected from the group consisting of formulae A1 to A8: wherein the arrow denotes the point of attachment to the radical B; and B is a radical selected from the group consisting of formulae B1 to B11: wherein the arrow denotes the point of attachment to the radical A; and wherein the substituents are as defined in claim 1, and the agrochemically acceptable salts and all stereoisomers and tautomeric forms of the compounds of formula I can be used as insecticides and can be prepared in a manner known per se.

Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a first semiconductor element and a first bonding structure. The first semiconductor element has a first element top surface and a first element bottom surface opposite to the element top surface. The first bonding structure is disposed adjacent to the element top surface of the first semiconductor element and includes a first electrical connector, a first insulation layer surrounding the first electrical connector, and a first metal layer surrounding the first insulation layer.

Abstract: A semiconductor device package includes a first substrate having a first surface, a first electrical contact disposed on the first surface of the first substrate, a second substrate having a second surface facing the first surface of the first substrate, and a second electrical contact disposed on the second surface of the second substrate. The first electrical contact has a base portion and a protrusion portion. The second electrical contact covers at least a portion of the protrusion portion of the first electrical contact. The second electrical contact has a first surface facing the first substrate and a second surface facing the second substrate.

Abstract: A semiconductor substrate includes a dielectric layer, a first conductive layer, a first barrier layer and a conductive post. The dielectric layer has a first surface and a second surface opposite to the first surface. The first conductive layer is disposed adjacent to the first surface of the dielectric layer. The first barrier layer is disposed on the first conductive layer. The conductive post is disposed on the first barrier layer. A width of the conductive post is equal to or less than a width of the first barrier layer.

Abstract: A semiconductor device package includes an electronic component, an encapsulation layer encapsulating the electronic component, and a passivation layer stacking with the encapsulation layer. The passivation layer has a first surface facing the encapsulation layer, a second surface opposite to the first surface, and a first sidewall connecting the first surface and the second surface. The first sidewall inclines with respect to the second surface, and a first projection width of the encapsulation layer is greater than a second projection width of the passivation layer.

Abstract: A semiconductor device package includes a substrate and an electronic component disposed on the substrate. The electronic component has an active surface facing away from the substrate. The substrate has a first conductive pad and a second conductive pad disposed thereon. The electronic component has a first electrical contact and a second electrical contact disposed on the active surface. The semiconductor device package further includes a first metal layer connecting the first electrical contact with the first conductive pad, a second metal layer connecting the second electrical contact with the second conductive pad, a first seed layer disposed below the first metal layer; and a first isolation layer disposed between the first metal layer and the second metal layer. A method of manufacturing a semiconductor device package is also disclosed.

Abstract: A semiconductor device package includes a substrate, a semiconductor device, and an underfill. The semiconductor device is disposed on the substrate. The semiconductor device includes a first lateral surface. The underfill is disposed between the substrate and the semiconductor device. The underfill includes a first lateral surface. The first lateral surface of the underfill and the first lateral surface of the semiconductor device are substantially coplanar.

Abstract: A semiconductor device package is provided, which includes a substrate, a semiconductor device and an alignment structure. The semiconductor device and the alignment structure are disposed on the substrate. The alignment structure is in direct contact with the semiconductor device.