Abstract: A storage application running in a local host system connected to a storage product to define and implement at least a function, feature, or aspect of network storage services provided via the storage product. The storage application can specify a configuration for message selection performed in the storage product. A first message selected from incoming messages received in a network interface of the storage product is processed by the storage application to generate second messages. The processing of the second messages in the storage product implements a new function not available in the storage product standalone. Responses to the second messages can be selected for processing by the local host system, based on which the storage application can generate a response to the first message. The response can be sent back to the storage product for transmission using its network interface.

Abstract: A memory sub-system having a first memory configured as a non-volatile storage medium of the memory sub-system; and a second memory having an access speed faster than the first memory. A processing device of the memory sub-system is configured to: run a plurality of data placement handlers concurrently; allocate a plurality of data buffers from the second memory to the plurality of data placement handlers respectively; reserve a plurality of backup spaces from the first memory for the plurality of data placement handlers respectively; allocate accumulation buffers from the second memory; and arrange the data placement handlers to time share the accumulation buffers via usages of the backup spaces.

Abstract: A processing device in a memory sub-system receives a plurality of requests to write data to a non-volatile memory device, the plurality of requests comprising respective numbers of input/output (I/O) chunks of a fixed size, and performs a plurality of write operations to write the data to the non-volatile memory device using respective translation units, wherein the respective translation units comprise two or more different translation unit sizes selected based on the respective numbers of I/O chunks of the plurality of requests.

Abstract: The disclosure configures a memory sub-system controller to test and validate a memory sub-system. The controller configures a plurality of namespaces associated with a set of memory components based on configuration information received from a virtual machine comprising an operating system. The controller performs a first set of memory operations using a first namespace based on a first set of instructions received from a first application instance and performs a second set of memory operations using a second namespace based on a second set of instructions received from a second application instance. The controller causes the operating system of the virtual machine to generate one or more metrics associated with the memory sub-system based on performance of the first and second sets of memory operations.

Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). A host system sends write commands to the memory systems. The write commands can include normal commands according to a current NVMe standard and fast commands extending the NVMe standard. The memory systems can tell whether a write command is a normal command or a fast command based on the opcode embedded in the command.

Abstract: A memory sub-system including: first memory cells configured to provide a memory space accessible to a host system; second memory cells configured to provide a storage space accessible to the host system; and a controller. The controller is configured to: allocate, during execution of a storage access request identifying a logical block address in the storage space, a first logical memory block from a logical memory space; provide a starting logical memory address of the first logical memory block in a response to the storage access request; allocate a second physical memory block from the physical memory space; and implement the first logical memory block using the second physical memory block.

Abstract: Methods, apparatuses, and systems related to serially chained memory subsystems are described. The grouped set of chained subsystems may coordinate internal communications and operations across the separate subsystems within the set. Memory locations for related or connected data may be dynamically computed to be across multiple subsystems to allow for parallel processing, failure/error recovery, or the like.

Abstract: A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and a flag configured to indicate an atomic operation being in progress in the memory sub-system. Over the connection, the memory sub-system can attach a portion of its fast, random access memory as a memory device, and a non-volatile memory as a storage device. The flag is set in the memory device accessible to the host system via a cache-coherent memory access protocol, before execution of commands of the atomic operation. After the completion of the atomic operation, the flag is cleared off the memory device. During a recovery from an interruption, the host system can check the flag to decide whether to restart or start the atomic operation again, or undo the partially executed the atomic operation.

Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). A host system sends commands to the memory systems. The commands can include normal read/write commands according to a current NVMe standard and fast read/write commands extending the NVMe standard. Execution of normal read/write commands are performed at least in part using firmware in the memory systems. Execution of fast commands in the memory systems can skip the use of the firmware.

Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). A host system sends read commands to the memory systems. The read commands can include normal commands according to a current NVMe standard and fast commands extending the NVMe standard. The memory systems can tell whether a read command is a normal command or a fast command based on the opcode embedded in the command.

Abstract: A plurality of context data structures are maintained. Each context data structure corresponds to an active region of a memory device. Each context data structure comprises an indicator characterizing the corresponding active region open or closed. A write request directed to a first active region is received. Responsive to determining that a first indicator of the first context data structure characterizes the first active region as open, the host data is written to the first active region, and at least a portion of the host data is padded to satisfy a predetermined write size of the memory device. The first active region is determined to have reached a capacity based on data written to the first active region including the padded data. The first active region is indicated to have reached capacity the first active region is characterized as closed.

Abstract: A host system connected to a memory sub-system via a connection to configure memory services provided by the memory sub-system to the host system over the connection. The memory sub-system can allocate a portion of its memory resources to provide storage services to the host system, and allocate another portion of its memory resources to provide memory services to the host system. In response to a request from the host system over the connection, the memory sub-system can update configuration data of the memory services and provide the memory services according to the parameters specified by the request. The request can be implemented in the protocol over the connection for storage access, or in the protocol over the connection for memory access. The request can be implemented via a store instruction, a write command, or another command having another command identifier.

Abstract: A memory sub-system having: first memory cells (e.g., DRAM) configured to provide a memory space accessible to a host system via a memory access protocol (e.g., compute express link (CXL) or component interconnect express (PCIe)); and second memory cells (e.g., flash memory) configured to provide a storage space accessible to the host system via a submission queue using a storage access protocol (e.g., non-volatile memory express (NVMe)). A controller in the memory sub-system is configured to: allocate to the host system a plurality of memory blocks from the memory space; and send to the host system, a request for freeing at least a portion of the memory blocks.

Abstract: A memory sub-system having: first memory cells of a first type (e.g., SRAM); second memory cells of a second type (e.g., DRAM); third memory cells of a third type (e.g., flash memory) configured to provide a storage space accessible via commands entered in a submission queue. A controller in the memory sub-system is configured to: implement, using at least a portion of the first memory cells, a first logical memory device over a compute express link fabric; implement, using at least a portion of the second memory cells, a second logical memory device over the compute express link fabric; retrieve, from the submission queue, a request; allocate a memory block during execution of the request, the memory block having an address in the first logical memory device or the second logical memory device; and provide the address in a completion record for the request.

Abstract: A host system connected to a memory sub-system via a connection to query memory attachment capabilities of the memory sub-system in providing memory services over the connection. The memory sub-system can allocate a portion of its memory resources to provide storage services to the host system, and allocate another portion of its memory resources to provide memory services to the host system. In response to the query, the memory sub-system can provide a response containing data indicative of memory attachment capabilities of the memory sub-system. The host system can configure the memory services of the memory sub-system, such as a solid-state drive, based on the data received as a response to the query. The query and response can be implemented in the protocol over the connection for storage access, or in the protocol over the connection for memory access.

Abstract: Methods, apparatuses, and systems related to serially chained memory subsystems that support and provide redundant coverage for multiple hosts are described. The grouped set of chained subsystems can provide dedicated storage locations for each of the multiple hosts during normal operations. When one of the hosts fail, the grouped set can reconfigure the internal accessing scheme, thereby allowing the surviving host to see and access locations and data that was initially assigned to the failed host.

Abstract: A memory sub-system, including: a random access memory; a storage medium having a storage capacity accessible to a host system through commands communicated via a plurality of submission queues to the memory sub-system; and a controller. The controller is configured to: retrieve, from a first submission queue among the plurality of submission queues, a first command configured with a first address to access the storage medium; determine, based at least in part on the first command, that a second address configured in a second command following the first command in communication via the first submission queue from the host system to the memory sub-system is predictable; predict a third address according to the first address configured in the first command; and retrieve, from the storage medium and according to the third address, a data chunk into the random access memory, before the second command is retrieved.

Abstract: The disclosure configures a memory sub-system controller to perform scalable write amplification (WAF) measurement. The controller receives a request to place a memory sub-system into a WAF mode and, in response, reduces a full capacity of the memory sub-system to a reduced capacity by restricting write operations to an individual portion of a set of memory components. The controller generates a log that tracks a number of write operations performed to store data to the individual portion of the set of memory components relative to a plurality of requests to program the data to the individual portion of the memory sub-system. The controller computes, based on the log, the WAF for the full capacity of the memory sub-system based on the WAF of the reduced capacity of the memory sub-system.

Abstract: A memory sub-system including: first memory cells (e.g., of a flash memory) configured to provide a storage space accessible to a host system via entering requests in a plurality of submission queues (e.g., according to a standard for NVMe); and second memory cells (e.g., of a random access memory) configured to provide a memory space accessible to the host system. A controller of the memory sub-system is configured to: identify a batch of first requests pending in the submission queues; determine a memory allocation scheme configured to identify, in the memory space, placements of memory blocks to be allocated for the first requests; and execute, after the memory allocation scheme is determined, the first requests.

Abstract: A memory sub-system having: memory cells of a first type to provide a first portion of a memory space; memory cells of a second type to provide a second portion of the memory space; and memory cells of a third type to provide a storage space. A controller of the memory sub-system is configured to: receive a request identifying at least one memory attribute specified by a host system; allocate, in view of the at least one memory attribute, a memory block from the memory space; and provide the host system with a response to the request to identify a memory address of the memory block.