Patents by Inventor Luca Bert

Luca Bert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260339556
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a controller retrieves a command including a buffer identifier. The controller determines, from a lookup table, a memory address associated with the buffer identifier for data transfer during execution of the command to access a logical storage space implemented using the non-volatile memory.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339563
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a submission queue is configured in a memory for a memory sub-system operable to execute a first command retrieved from the submission queue and generated according to a first command format. A processing device generates a second command according to a second command format configured without a plurality of command fields predefined according to the first command format. The processing device enters the second command into the submission queue for execution in the memory sub-system.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339554
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). A host system generates a setting command configured to cause a memory system to store pre-set parameters for use by subsequent read or write commands from the host system. The setting command includes a namespace identifier. When the setting command is retrieved by the memory sub-system, parameters in the setting command are processed to generate the pre-set parameters. The pre-set parameters are stored as namespace attributes of a namespace identified by the namespace identifier. Subsequent read or write commands include the same namespace identifier and are processed using the pre-set parameters.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339555
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a controller retrieves a command including a data pointer having a first portion specifying a memory address and a second portion separate from the first portion. The controller determines, based on whether the memory address provided in the first portion of the data pointer is valid, whether to use the first portion or the second portion to identify a memory location in a random access memory for data transfer during execution of the command to access a logical storage space implemented using non-volatile memory.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339558
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a controller retrieves a command specifying a data length via a sub block size and a number of sub blocks for reading one or more sub blocks from, or writing one or more sub blocks to, a storage space configured in a non-volatile memory. The controller executes the command to read the sub blocks from, or write the sub blocks to, the storage space.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339564
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces provided by memory systems (e.g., solid-state drive (SSD) having NAND flash memory). The memory sub-systems can execute storage access commands in compliance of a current version of the NVMe standard and further storage access commands configured to have a smaller size(s) for improved performance in storage access. In one example, two commands of a reduced size can be entered into a single slot of a submission queue that is configured for such a memory sub-system according to the NVMe standard.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339843
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a controller retrieves a read or write command specifying a data retention request and a logical block implemented using the non-volatile memory. The controller reads data from, or writes data to, the logical block. The controller retains, in the local memory and in view of the data retention request, the read or written data, and updates metadata stored in the local memory to indicate that the read or written data is stored in the local memory.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339544
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a system includes local memory, non-volatile memory to provide a storage space accessible via a storage access protocol, and a controller. The controller stores, in the local memory, first parameters in association with an identification of the storage space. The controller executes a command specifying second parameters to access the storage space according to the storage access protocol, and checks consistency between the first parameters and the second parameters during execution of the command.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339561
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a host configures a submission queue in random access memory. The host associates unique identifiers with threads running concurrently in the host. The host configures the threads to access a memory sub-system using the submission queue. The host causes each thread to identify commands entered in the submission queue by the thread using an identifier that is associated with the thread.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339562
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a host system includes random access memory and a processing device. The processing device runs threads concurrently to access a memory sub-system using a submission queue configured in the random access memory. Each of the threads enters commands in the submission queue using an atomic write to copy a command from outside of the submission queue to inside of the submission queue.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339557
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a controller retrieves a read command including a steering tag value. The controller retrieves, according to the read command, user data from a logical storage space implemented using non-volatile memory. The controller extracts the steering tag value from the read command; creates a transaction layer packet (TLP) to include at least the steering tag value and the user data as a payload of the TLP; and transmits, during execution of the read command, the TLP to a peripheral component interconnect express (PCIe) bus.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339559
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). In one approach, a controller retrieves a command specifying a logical block address representing a logical block in a storage space configured in the non-volatile memory. The command further specifies a data offset from a beginning of the logical block. The controller executes the command based at least in part on the data offset.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Publication number: 20260339560
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces provided by memory systems (e.g., solid-state drive (SSD) having NAND flash memory). The memory sub-systems can execute storage access commands in compliance with a current version of the NVMe standard and further storage access commands configured for improved performance in storage accessing. In one example, a command is configured to specify multiple, non-contiguous data locations in a logical storage space in the memory sub-system for the memory sub-system to read or write during the execution of the command in the memory sub-system.
    Type: Application
    Filed: July 10, 2025
    Publication date: October 29, 2026
    Inventor: Luca Bert
  • Patent number: 12775392
    Abstract: A memory sub-system, such as a solid-state drive (SSD), having host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. During an autonomous self-test operation of the memory sub-system, the memory sub-system is configured to generate random challenges of proof of space, generate using a proof of space plot, stored in the memory cells, responses to the random challenges respectively, and determine validity of the responses to evaluate health of the memory cells.
    Type: Grant
    Filed: March 18, 2024
    Date of Patent: October 27, 2026
    Assignee: Micron Technology, Inc.
    Inventors: Joseph Harold Steinmetz, Luca Bert
  • Patent number: 12764199
    Abstract: A storage application running in a local host system connected to a storage product to define and implement at least a function, feature, or aspect of network storage services provided via the storage product. The storage application can specify a configuration for message selection performed in the storage product. A first message selected from incoming messages received in a network interface of the storage product is processed by the storage application to generate second messages. The processing of the second messages in the storage product implements a new function not available in the storage product standalone. Responses to the second messages can be selected for processing by the local host system, based on which the storage application can generate a response to the first message. The response can be sent back to the storage product for transmission using its network interface.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: October 13, 2026
    Assignee: Micron Technology, Inc.
    Inventor: Luca Bert
  • Patent number: 12761832
    Abstract: A memory sub-system having a first memory configured as a non-volatile storage medium of the memory sub-system; and a second memory having an access speed faster than the first memory. A processing device of the memory sub-system is configured to: run a plurality of data placement handlers concurrently; allocate a plurality of data buffers from the second memory to the plurality of data placement handlers respectively; reserve a plurality of backup spaces from the first memory for the plurality of data placement handlers respectively; allocate accumulation buffers from the second memory; and arrange the data placement handlers to time share the accumulation buffers via usages of the backup spaces.
    Type: Grant
    Filed: July 24, 2024
    Date of Patent: October 13, 2026
    Assignee: Micron Technology, Inc.
    Inventor: Luca Bert
  • Patent number: 12754835
    Abstract: A processing device in a memory sub-system receives a plurality of requests to write data to a non-volatile memory device, the plurality of requests comprising respective numbers of input/output (I/O) chunks of a fixed size, and performs a plurality of write operations to write the data to the non-volatile memory device using respective translation units, wherein the respective translation units comprise two or more different translation unit sizes selected based on the respective numbers of I/O chunks of the plurality of requests.
    Type: Grant
    Filed: December 3, 2024
    Date of Patent: October 6, 2026
    Assignee: Micron Technology, Inc.
    Inventor: Luca Bert
  • Patent number: 12754813
    Abstract: The disclosure configures a memory sub-system controller to test and validate a memory sub-system. The controller configures a plurality of namespaces associated with a set of memory components based on configuration information received from a virtual machine comprising an operating system. The controller performs a first set of memory operations using a first namespace based on a first set of instructions received from a first application instance and performs a second set of memory operations using a second namespace based on a second set of instructions received from a second application instance. The controller causes the operating system of the virtual machine to generate one or more metrics associated with the memory sub-system based on performance of the first and second sets of memory operations.
    Type: Grant
    Filed: March 6, 2025
    Date of Patent: October 6, 2026
    Assignee: Micron Technology, Inc.
    Inventor: Luca Bert
  • Publication number: 20260299788
    Abstract: Systems, methods, and apparatus related to commands for accessing storage spaces of memory systems (e.g., solid-state drive (SSD) having NAND flash memory). A host system sends write commands to the memory systems. The write commands can include normal commands according to a current NVMe standard and fast commands extending the NVMe standard. The memory systems can tell whether a write command is a normal command or a fast command based on the opcode embedded in the command.
    Type: Application
    Filed: March 28, 2025
    Publication date: October 1, 2026
    Inventor: Luca Bert
  • Publication number: 20260300153
    Abstract: A memory sub-system including: first memory cells configured to provide a memory space accessible to a host system; second memory cells configured to provide a storage space accessible to the host system; and a controller. The controller is configured to: allocate, during execution of a storage access request identifying a logical block address in the storage space, a first logical memory block from a logical memory space; provide a starting logical memory address of the first logical memory block in a response to the storage access request; allocate a second physical memory block from the physical memory space; and implement the first logical memory block using the second physical memory block.
    Type: Application
    Filed: March 26, 2025
    Publication date: October 1, 2026
    Inventor: Luca Bert