Abstract: A memory system includes a memory device and a processing device coupled to the memory device, the processing device is to create a namespace by allocating a reclaim group, the reclaim group comprising a plurality of reclaim units; assign a reclaim unit handle to the namespace; receive, from a virtual machine running on a host computing system, a command to perform an operation associated with the namespace; identify a segment of the memory device based on the reclaim unit handle that is assigned to the namespace; and perform the operation on the segment of the memory device.

Abstract: An apparatus with a solid state drive (SSD) configured to manage storage resources for proof of space activities. The SSD has a host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands and the write commands. In response to an indication of a storage space request for the host system, the apparatus identifies a portion of storage resources used to store the data of the proof of space plot, and reallocates the portion to service the host system. Subsequently, the SSD can continue proof of space activities based on the proof of space plot using the data stored in a remaining portion of the storage resources initially allocated to the proof of space plot.

Abstract: A host command is received designating a first interface standard at a first port for exposing a storage element implemented by a non-volatile memory device and a second interface standard at a second port for exposing a persistent memory region (PMR) implemented as a power protected region of a volatile memory device. The non-volatile memory device and the volatile memory device are associated with a first switch for implementing the first interface standard and a second switch for implementing the second interface standard. The first interface standard supports one or more alternate protocols implemented by the second interface standard. The storage element is exposed by designating the first interface standard at the first port and the PMR by designating the second interface standard at the second port. A segment of the PMR is allocated as a cacheable memory marked as visible through, and shared through, the second interface standard.

Abstract: A storage product manufactured as a component to be installed in a computing device to provide network storage services. The storage product has a network interface to receive storage access messages from a remote host system, a bus connector connectable via an external computer bus to an external local host system, a local storage device, and a computational storage processor. The storage product is configured to: separate the storage access messages into first messages, second messages, and third messages; provide the first messages to an external local host system to generate fourth messages; and provide the second messages to the computational storage processor to generate fifth messages. To implement network storage services provided via the network interface, the local storage device executes commands in the third messages, the fourth messages from the local host system, and the fifth messages from the computational storage processor.

Abstract: Memory sub-systems configured to run file system managers and to provide file services via memory services. For example, a connection from a memory sub-system to the host system can support both a cache-coherent memory access protocol to a memory device attached by the memory sub-system to the host system and a storage access protocol to a storage device attached by the memory sub-system to the host system. A messaging channel through the memory device can be used for an operating system running in the host system to communicate with a file system manager running in the memory sub-system to access the file system. For example, a hypertext transfer protocol (HTTP) representational state transfer (REST) application programming interface (API) can be implemented for the host system to access the file system in the memory sub-system.

Abstract: Memory sub-systems configured to manage storage locations of files for a host system. For example, a connection from a memory sub-system to the host system can support both a cache-coherent memory access protocol to a memory device implemented in the storage capacity of the memory sub-system and a storage access protocol. The memory sub-system can maintain, and share with the host system via the memory device, a medium map configured to identify, for a file stored in the memory sub-system, memory addresses usable for the host system to access locations in the file over the connection using the cache-coherent memory access protocol, and/or logical block addresses usable for the host system to access blocks of the files over the connection using the storage access protocol.

Abstract: A processing device, operatively coupled with the memory device, is configured to provide a plurality of functions for accessing the memory device, wherein a function of the plurality of function receives input/output (I/O) operations from a host computing system. The processing device further determines a quality of service level of each function of the plurality of functions, and assigns to each function of the plurality of functions a corresponding function weight based on a corresponding quality of service level. The processing device also selects, for execution, a subset of the I/O operations, the subset comprising a number of I/O operations received at each function of the plurality of functions, wherein the number of I/O operations is determined according to the corresponding function weight of each function. The processing logic then executes the subset of I/O operations at the memory device.

Abstract: A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and having storage access queues configured at least in part in the memory sub-system. The memory sub-system can attach, as a memory device, a portion of its fast random access memory over the connection to the host system. One or more storage access queues can be configured in the memory device. The host system can use a cache-coherent memory access protocol to communicate storage access messages over the connection to the random access memory of the memory sub-system. Optionally, the host system can have a memory with second storage access queues usable to access the storage services of the memory sub-system over the connection using a storage access protocol.

Abstract: A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and a flag configured to indicate an atomic operation being in progress in the memory sub-system. Over the connection, the memory sub-system can attach a portion of its fast, random access memory as a memory device, and a non-volatile memory as a storage device. The flag is set in the memory device accessible to the host system via a cache-coherent memory access protocol, before execution of commands of the atomic operation. After the completion of the atomic operation, the flag is cleared off the memory device. During a recovery from an interruption, the host system can check the flag to decide whether to restart or start the atomic operation again, or undo the partially executed the atomic operation.

Abstract: A standalone storage product having: a first bus connector for connecting to an external processor; a second bus connector for connecting to an external network interface; a storage device accessible over the network interface; and a processing device configured to communicate, via the second bus connector, with the network interface to obtain storage access messages represented by incoming packets received at the network interface from a computer network. The processing device can: identify, from the storage access messages, first messages and second messages; provide, the first messages via the first bus connector, to the processor; and provide, the second messages, to the storage device without the second messages going through the processor. The storage device is configured to: receive, via the first bus connector, third messages from the processor; and execute commands in the second messages and the third messages to implement a network storage service.

Abstract: An apparatus with a solid state drive (SSD) having firmware to farm proof of space plots stored outside of the SSD. The SSD has a communication interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. The firmware is executable in the SSD to receive and store configuration data specified via a user interface to indicate a location, outside of the SSD, storing a proof of space plot that can be used by the SSD to participate in proof of space activities in a cryptocurrency network.

Abstract: A victim management unit (MU) for performing a media management operation is identified. The victim MU stores valid data. An ordered set cursors is maintained. A source cursor of the ordered set of cursors associated with the victim MU is identified. A target cursor of the ordered set of cursors referencing one or more available MUs is identified as the cursor following the source cursor in the ordered set of cursors. The valid data is associated with the identified target cursor.

Abstract: A memory sub-system, such as a solid state drive (SSD), having host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. During a burn-in operation of the memory sub-system in a manufacturing facility, the memory sub-system is configured to perform read/write operations for the generation of a proof of space plot. After the burn-in operation, the memory sub-system is provided as a product of the manufacturing facility; and the proof of space plot stored in the memory sub-system is provided as a by-product of the burn-in operation.

Abstract: Operations include identifying a system failure affecting visibility, to at least one dual port node of a plurality of dual port nodes, of at least one of a first volume of a plurality of volumes of a first memory device or a second volume of the plurality of volumes, and modifying a visibility configuration to address the system failure. Each volume of the plurality of volumes includes a persistent memory region (PMR). Modifying the visibility configuration includes modifying the visibility of at least one of the first volume or the second volume to the at least one dual port node of the plurality of dual port nodes through its first port or its second port via the at least one switch domain of the plurality of switch domains.

Abstract: Aspects of the present disclosure configure a system component, such as memory sub-system controller, to dynamically generate Redundant Array of Independent Nodes (RAIN) parity information for zone-based memory allocations. The RAIN parity information is generated for a given zone or set of zones on the basis of whether the given zone or set of zones satisfy a zone completeness criterion. The zone completeness criterion can represent a specified size such that when a given zone reaches the specified size, the parity information for that zone is generated.

Abstract: A memory sub-system, such as a solid-state drive (SSD), having host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. During an autonomous self-test operation of the memory sub-system, the memory sub-system is configured to generate random challenges of proof of space, generate using a proof of space plot, stored in the memory cells, responses to the random challenges respectively, and determine validity of the responses to evaluate health of the memory cells.

Abstract: A security server storing a plurality of cryptographic keys to support device authentication, access control and proof of space plot farming. The cryptographic keys can include a first cryptographic key representative of an identity of a memory device, a second cryptographic key representative of a privilege to access a memory region in the memory device, and a third cryptographic key representative of a pool of proof of space plots. The security server can sign blocks in a blockchain created via plots in the pool, sign commands to access the memory region, and secure transfer of the second and/or third cryptographic key to the computer operated by an owner of the memory device.

Abstract: A memory sub-system having a paging system to provide memory services over a connection from its host interface to a host system. The connection can support both a storage access protocol and a cache coherent memory access protocol. The memory sub-system can have a non-volatile memory to provide a storage capacity and a fast, volatile memory to cache active pages of a memory space provided by a memory device attached by the memory sub-system over the connection to the host system. The memory space can be configured in a namespace of the storage capacity of the non-volatile memory. Optionally, the memory space can be configured for access both via the storage access protocol using logical block addresses and via the cache coherent memory access protocol using memory addresses.

Abstract: An apparatus with a solid state drive (SSD) having firmware to manage spare storage resources for proof of space activities. The SSD has a host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. The firmware is executable in the SSD to allocate storage resources not used or allocated by the host system to support proof of space activities and dynamically return the allocated storage resources when execution of a command from the host system needs additional storage resources.

Abstract: Host system failover via a memory sub-system storing in-memory data for database operations. Over a connection from a host interface of the memory sub-system, a first portion of the memory sub-system can be attached to a first host system as a memory device accessible via a first protocol; and a second portion of the memory sub-system can be attached to the first host system as a storage device accessible via a second protocol. A database manager running in the first host system can store the in-memory data in the memory device and store a persistent copy of database records in the storage device. When the first host system fails, the memory sub-system can be reconnected to a second host system to use the in-memory data for continued database operations.