Abstract: Subject matter disclosed herein may relate to forming a nucleation layer in connection with fabrication of correlated electron materials used, for example, to perform, for example, a switching function. In embodiments, processes are described in which a metallic precursor in a gaseous form is utilized to deposit a transition metal, for example, on a conductive substrate that includes a noble metal. The conductive substrate may be exposed to a reducing agent, which may operate to convert ligands of the metallic precursor to a gaseous form. A remaining metallic portion of the precursor deposited on the noble metal may allow a correlated electron material (CEM) film to be grown over the conductive substrate.

Abstract: Subject matter disclosed herein may relate to fabrication of layered correlated electron materials (CEMs) in which a first group of one or more layers may comprise a first concentration of a dopant species, and wherein a second group of one or more layers may comprise a second concentration of a dopant species. In other embodiments, a CEM may comprise one or more regions of graded concentration of a dopant species.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) device. In embodiments, after formation of the one or more CEM traces, a spacer may be deposited in contact with the one or more CEM traces. The spacer may operate to control an atomic concentration of dopant within the one or more CEM traces by replenishing dopant that may be lost during subsequent processing and/or by forming a seal to reduce further loss of dopant from the one or more CEM traces.

Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In embodiments, processes are described in which conductive traces may be formed on or over an insulating material. Responsive to forming voids in the insulating material, localized portions of the conductive traces in contact with the voids may be exposed to gaseous oxidizing agents, which may convert the localized portions of the conductive traces to a CEM. In embodiments, an electrode material may be deposited within the voids to contact the localized portion of conductive trace converted to the CEM.

Abstract: Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, processes are described in which a correlated electron material film may be formed over a conductive substrate by converting at least a portion of the conductive substrate to CEM.

Abstract: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a correlated electron switch (CES) device may be placed in any one of multiple memory states in a write operation. A plurality of bitcells may be connectable to a common source voltage during a two-phase operation to place individual bitcells in intended impedance states.

Abstract: Subject matter herein disclosed relates to an improved CEM switching device and methods for its manufacture. In this device, a conductive substrate and/or conductive overlay comprises a primary layer of a conductive material and a secondary layer of a conductive material. The primary layer contacting the CEM layer is substantially inert to the CEM layer and/or acts as an oxygen barrier for the secondary layer at temperatures used for the manufacture of the device.

Abstract: Subject matter disclosed herein may relate to devices formed from correlated electron material.

Abstract: According to an embodiment of the present disclosure, a device and a method are provided. The device includes one or more resistive random access memory (ReRAM) elements. The device further includes a random number generator configured to generate a random number in dependence on impedance values of the one or more ReRAM elements.

Abstract: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a correlated electron switch (CES) device may be placed in any one of multiple memory states in a write operation. A plurality of bitcells may be connectable to a common source voltage during a two-phase operation to place individual bitcells in intended impedance states.

Abstract: A method of writing a state to a correlated electron element in a storage circuit, comprising receiving a write command to write the state into the correlated electron element; reading a stored state of the correlated electron element; comparing the state and the stored state; and enabling a write driver to write the state into the correlated electron element when the state and read state are different.

Abstract: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a correlated electron switch (CES) device may be placed in any one of multiple memory states in a write operation. Limiting current between terminals of the non-volatile memory device during read operations may enable use of higher voltages for higher realized gain. Additionally, bipolar write operations for set and reset may enable an increased write window and enhanced durability for a CES device.

Abstract: Subject matter disclosed herein may relate to devices formed from correlated electron material.

Abstract: A structure and method of fabrication thereof relate to a Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced ?VT (variation in VT) compared to conventional bulk CMOS and can allow the threshold voltage VT of FETs having dopants in the channel region to be set much more precisely. A novel dopant profile indicative of a distinctive notch enables tuning of the VT setting within a precise range. This VT set range may be extended by appropriate selection of metals of a gate electrode material so that a very wide range of VT settings is accommodated on the die. The DDC design also can have a strong body effect compared to conventional bulk CMOS transistors, which can allow for significant dynamic control of power consumption in DDC transistors. The result is the ability to independently control VT (with a low ?VT) and VDD (the operating voltage supplied to the transistor), so that the body bias can be tuned separately from VT for a given device.

Abstract: Subject matter herein disclosed relates to a method for the manufacture of a CEM switching device providing that the CEM layer comprises a doped metal compound substantially free from metal wherein ions of the same metal element are present in different oxidation states. The method may provide a CEM layer which is born on and capable of switching with operating voltages below 2.0V.

Abstract: Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a silicon-containing correlated electron material. In embodiments, processes are described for forming the silicon-containing correlated electron material. These processes may use comparatively lower temperatures as compared to those used for forming a correlated electron material comprising a transition metal oxide.

Abstract: Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a correlated electron material. In embodiments, processes are described which may be useful for avoiding a resistive layer which tends to form between the correlated electron material and a conductive substrate and/or overlay.

Abstract: Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, processes are described, in which an ultraviolet light source is utilized during fabrication of a correlated electron material. In embodiments, use of ultraviolet light may decrease a likelihood of diffusion of atomic and/or molecular components of a substrate that may bring about undesirable electrical performance of a CEM device.

Abstract: Subject matter disclosed herein may relate to fabrication of layered correlated electron materials (CEMs) in which a first group of one or more layers may comprise a first concentration of a dopant species, and wherein a second group of one or more layers may comprise a second concentration of a dopant species. In other embodiments, a CEM may comprise one or more regions of graded concentration of a dopant species.

Abstract: Subject matter disclosed herein may relate to correlated electron switches.