Abstract: An antenna array can be mounted on a flexible substrate and connected by a flexible interconnect to an integrated circuit such as a radio frequency front end. The antenna array can be mounted in a device housing that includes radio frequency interference (RFI) shielding. The antenna array is aligned with and next to an area of the housing that is not shielded against RFI.

Abstract: In a method of head-disk contact detection in a hard disk drive, a Radio Frequency (RF) carrier signal is injected into a slider which is flying above a surface of a disk in a hard disk drive. A modulated version of the RF carrier signal is received from the slider. The modulated version of the RF carrier signal is demodulated to achieve a demodulated signal. A signal spectrum of a range of frequencies in the demodulated signal is monitored for activity indicative of a contact between a head of the slider and the surface of the disk. An occurrence of the contact is determined based upon an occurrence of the activity.

Abstract: A flex cable comprises a base film, a first adhesive layer coupled with the base film, and at least two signal traces coupled with the first adhesive layer. The flex cable comprises a second adhesive layer coupled with the signal traces and the first adhesive layer, and a cover film coupled with the second adhesive layer. The flex cable comprises an electrically conductive layer adjacent to the signal traces, and parallel with the base film and the cover film.

Abstract: In a method of actively controlling slider fly height, a modulated radio frequency (RF) carrier signal is received from a slider. The modulated RF carrier signal comprises an amplitude modulated component which is modulated onto the modulated RF carrier signal by vibration of the slider. The amplitude associated with the amplitude modulated component is measured. Thermal fly height control (TFC) voltage generation is controlled by feeding back on the amplitude. A TFC voltage to apply to the slider is generated such that a selected amplitude of the amplitude modulated component is achieved and maintained. The selected amplitude is associated with a particular preselected fly height of the slider above a surface of a disk. The TFC voltage is provided to the slider.

Abstract: An integrated lead suspension (ILS) or flexure has a connection scheme that allows for coplanar and interleaved conductive traces between read/write circuitry and a read/write head in a magnetic recording disk drive. The flexure has an electrically conductive substrate and insulator layer with the traces formed on the insulator layer. At each end of the flexure there is an island of substrate material with vias in the insulator layer that permit electrical connection to the islands. The conductive traces are grouped into two sets and extend generally parallel along the length of the flexure, with the traces from one set being interleaved with traces from the other set and each set carrying one of the positive or negative signals. At one of the ends, all of the traces from one set are connected through the vias to the island at that end, and at the other end all of the traces from the other set are connected through the vias to the island at that end.

Abstract: An amplifier has a band pass response. The band pass response may be set by setting corner frequencies of low pass filters.

Abstract: Various embodiments describe a chip package having a transceiver front-end. The transceiver front-end may be coupled to a communication processor on a die disposed on the chip package. Other embodiments may be described and claimed.

Abstract: An ultrawideband radio frequency pulse is generated by shaping a carrier signal having a selected frequency with a window function. The shaped carrier is gated to produce the ultrawideband pulse. In further embodiments, the window function comprises a sinusoidal function, and the ultrawideband pulse is formed via a mixer and a CMOS radio frequency switch.

Abstract: A transceiver system on a single package provides an RF/Microwave subsystem in an area external to the processor die which contains a digital processor. The external area may include an antenna-switch, an input matching network and an impedance transformer impedance transformer and RF-choke for a power amplifier as the passive elements to provide both lower noise reception and higher efficiency transmission.

Abstract: An amplification system for reducing DC offset in an input signal uses a low pass filter to isolate a DC component of the input signal. The system then subtracts the DC component from the input signal. In one embodiment, the system includes first and second amplifiers in addition to the low pass filter. The first amplifier amplifies the input signal to generate a first amplified signal at a differential output port of the amplification system. The second amplifier amplifies a low pass filtered version of the input signal to generate a second amplified signal at the differential output port of the amplification system. The outputs of the first and second amplifiers are connected to the differential output port of the amplification system in such a way that the first and second signals combine 180 degrees out of phase at the output port.

Abstract: A clock signal is generated by receiving an input clock signal having an input clock signal frequency, dividing the input clock signal frequency by a selected number to produce a lower frequency output clock signal, and shifting the phase of the output clock signal. The phase can be shifted by changing, for at least a predetermined amount of time, the selected number by which the input clock signal frequency is divided, and then restoring the selected number to its original value. The clock can be used as a channel sampling clock, and it can be synchronized to the data by the phase shifting. One implementation uses a chain of flip-flops for dividing the frequency and additional circuitry for shifting phase. The flip-flops may be connected with minimum logic in order to operate at substantially the highest frequency reachable by a given transistor technology.

Abstract: Techniques and structures are disclosed for providing interface and radio frequency (RF) network between a microelectronic device and an antenna.

Abstract: An electrically tunable radio frequency (RF) amplifier includes a resonant circuit having a voltage variable capacitance as one of its elements. In one approach, a drain diffusion capacitance of one of the transistors within the amplifier is used as the voltage variable capacitance. A voltage adjustment unit is provided to adjust a bias voltage on the voltage variable capacitance to change the capacitance value thereof and thus modify the operating frequency range of the amplifier. In one embodiment, the voltage adjustment unit also provides a power supply noise blocking function.

Abstract: An ultra wide band (UWB) low noise amplifier (LNA) includes a common-gate (CG) amplifying element in cascode with a common-source (CS) amplifying element, and a load-tracking (LT) network to, at least in part, track a changing output impedance of the cascode helping to provide a substantially constant gain over an ultra wide frequency band of interest. The LT network may include of a parallel combination of a capacitive element, an inductive element, and a resistive element, which may be selected to, at least in part, track the changing output impedance of the cascode over an ultra wide frequency band. An initial common-gate stage may compensate for a capacitive input impedance of the cascode and may provide a substantially matched antenna input over the ultra wide frequency band. The amplifier may also include one or more resistor-based amplifying stages after the cascode.

Abstract: A duplexer structure for allowing an RF transmitter and an RF receiver to share a common antenna includes impedance matching circuitry to match the receiver input impedance to the antenna impedance during a receive operation and impedance transformation circuitry to transform the antenna impedance to a lower impedance at the receiver input terminals during a transmit operation. The impedance matching circuitry and the impedance transformation circuitry of the duplexer share one or more passive components, thus reducing the overall number of components required to implement the duplexer. This reduction in component count reduces the amount of chip area required to implement the duplexer and increases the ease with which the RF transceiver is integrated onto a semiconductor chip. In one embodiment, the duplexer uses a differential topology to provide common mode noise rejection and even harmonic distortion cancellation within a transceiver.

Abstract: An oscillator operating close to transistor's fmax based on one or several repetitions of an amplifier design using simultaneous input and output matching, and thus designed, the oscillator may operate at the optimum pumping regime a given technology can provide. Phase condition for oscillations is provided by the strategic addition of lossless (purely real characteristic impedance) delays.

Abstract: An amplification system for reducing DC offset in an input signal uses a low pass filter to isolate a DC component of the input signal. The system then subtracts the DC component from the input signal. In one embodiment, the system includes first and second amplifiers in addition to the low pass filter. The first amplifier amplifies the input signal to generate a first amplified signal at a differential output port of the amplification system. The second amplifier amplifies a low pass filtered version of the input signal to generate a second amplified signal at the differential output port of the amplification system. The outputs of the first and second amplifiers are connected to the differential output port of the amplification system in such a way that the first and second signals combine 180 degrees out of phase at the output port.

Abstract: An ultra wide band (UWB) low noise amplifier (LNA) includes a common-gate (CG) amplifying element in cascode with a common-source (CS) amplifying element, and a load-tracking (LT) network to, at least in part, track a changing output impedance of the cascode helping to provide a substantially constant gain over an ultra wide frequency band of interest. The LT network may include of a parallel combination of a capacitive element, an inductive element, and a resistive element, which may be selected to, at least in part, track the changing output impedance of the cascode over an ultra wide frequency band. An initial common-gate stage may compensate for a capacitive input impedance of the cascode and may provide a substantially matched antenna input over the ultra wide frequency band. The amplifier may also include one or more resistor-based amplifying stages after the cascode.

Abstract: An electrically tunable radio frequency (RF) amplifier includes a resonant circuit having a voltage variable capacitance as one of its elements. In one approach, a drain diffusion capacitance of one of the transistors within the amplifier is used as the voltage variable capacitance. A voltage adjustment unit is provided to adjust a bias voltage on the voltage variable capacitance to change the capacitance value thereof and thus modify the operating frequency range of the amplifier. In one embodiment, the voltage adjustment unit also provides a power supply noise blocking function.

Abstract: A duplexer structure for allowing an RF transmitter and an RF receiver to share a common antenna includes impedance matching circuitry to match the receiver input impedance to the antenna impedance during a receive operation and impedance transformation circuitry to transform the antenna impedance to a lower impedance at the receiver input terminals during a transmit operation. The impedance matching circuitry and the impedance transformation circuitry of the duplexer share one or more passive components, thus reducing the overall number of components required to implement the duplexer. This reduction in component count reduces the amount of chip area required to implement the duplexer and increases the ease with which the RF transceiver is integrated onto a semiconductor chip. In one embodiment, the duplexer uses a differential topology to provide common mode noise rejection and even harmonic distortion cancellation within a transceiver.