Abstract: A shielding device is suitable for applying in an electronic module arranged on a mainboard of an electronic device having a housing baseboard. The mainboard is provided with a connector. The shielding device includes a fixing frame and a shielding cover. The fixing frame is provided with an accommodating space suitable for accommodating the connector and the electronic module. The fixing frame includes two first side walls, two second side walls, and a press plate connecting to one of the two first side walls and covering the connector. A part of the press plate is covered by the housing baseboard. The shielding cover is pivotally connected to one side, away from the press plate, of the fixing frame and may be opened or closed relative to the fixing frame. The electronic module is exposed through opening of the shielding cover and is shielded through closing of the shielding cover.

Abstract: A method includes obtaining an automatic speech recognition (ASR) model pre-trained on an initial training dataset, creating a set of canary speech utterances, and speeding up each canary speech utterance in the set of canary speech utterances. The operations also include fine-tuning the ASR model on the set of sped-up canary speech utterances and measuring un-intended memorization of the fine-tuned ASR model based on speech recognition results performed by the fine-tuned ASR model on the sped-up canary speech utterances.

Abstract: A gate voltage bootstrap switching circuit includes an LDO, a first MOS transistor, a second MOS transistor, a third MOS transistor, and a voltage control unit. The LDO has an inverting input terminal of connected to its output terminal. Drain of the first MOS transistor and source of the third MOS transistor are connected to the output terminal, source of the first MOS transistor is connected to drain of the second MOS transistor, and source of the second MOS transistor is connected to drain of the third MOS transistor. Capacitor arrays are connected. The voltage control unit is connected to gates of the first, second, and third MOS transistors to input an external power supply voltage as a gate-source voltage to the MOS transistors. The circuit eliminates the non-linearity of the impedance of the switch MOS transistors and improves the conversion speed of the ADC.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip comprising a gate electrode disposed on a substrate between a pair of source/drain regions. A dielectric layer is over the substrate. A field plate is disposed on the dielectric layer and laterally between the gate electrode and a first source/drain region in the pair of source/drain regions. The field plate comprises a first field plate layer and a second field plate layer. The second field plate layer extends along sidewalls and a bottom surface of the first field plate layer. The first and second field plate layers comprise a conductive material.

Abstract: A method and apparatus are provided for limiting a B1 field used for magnetic resonance imaging (MRI). The techniques described herein reduce a waste of performance of the B1 field while ensuring patient safety and improving the MR imaging quality.

Abstract: An integrated joint module includes a housing, a driving assembly, a speed reduction assembly, a braking assembly and an encoding assembly. The housing includes a first housing and a second housing, an annular supporting platform is arranged on an inner side of the first housing. The driving assembly includes an output shaft, a stator embedded in the annular supporting platform, and a rotor connected with the output shaft and arranged on an inner side of the stator, the speed reduction assembly and the braking assembly are connected with two ends of the output shaft. The encoding assembly is arranged on a side of the braking assembly away from the driving assembly and connected with the output shaft, the second housing is sleeved on the encoding assembly and connected with the first housing. The integrated joint module helps to simplify the structure of the joint module and reduce the cost.

Abstract: A lock electronically controls whether the battery box can be removed or not and has a base and a battery box. A first base latch seat of the base has an electronic controller and a latching member. The battery box is detachably mounted on the base. The latching member is movable or rotatable to engage with the first battery latch seat of the battery box. The latching member is moveable or rotatable to disengage from the first battery latch seat under the control of the electronic controller. The latching member on the base regularly engages with the first battery latch seat. To unlock the battery box, it is only necessary to control the electronic controller by signal, and then the latching member on the base may be disengaged from the first battery latch seat, so that the battery box can be removed.

Abstract: An opening and closing device is provided, including a fixing device and a limiting device. The fixing device includes a fixing portion and a fixing member, and the limiting device includes a driving device, a limiting portion, and a limiting member. The fixing member may rotate to be engaged with the fixing portion. The driving device is disposed on a first shell. The limiting portion is disposed on an inner side of the first shell. The limiting member is disposed on an inner side of a second shell. When the first shell approaches the second shell, the limiting member end portion may be engaged with the limiting portion. The driving device may be subjected to an external force to release the engagement between the fixing member and the fixing portion and the engagement between the limiting member end portion and the limiting portion.

Abstract: The present disclosure describes a semiconductor structure that includes a channel region, a source region adjacent to the channel region, a drain region, a drift region adjacent to the drain region, and a dual gate structure. The dual gate structure includes a first gate structure over portions of the channel region and portions of the drift region. The dual gate structure also includes a second gate structure over the drift region.

Abstract: The present disclosure provides a collaborative robot arm and a joint module. The joint module includes a housing, a driving assembly, and a multi-turn absolute encoder. The joint module detects the angular position of the output shaft and records a number of rotating revolutions of the output shaft only by means of the multi-turn absolute encoder. The multi-turn absolute encoder includes a base, a bearing, a rotating shaft, an encoding disk, and a circuit board, the encoding disk is rotatably connected with the base by the rotating shaft and the bearing, the circuit board is fixedly connected with the base, and the reading head on the circuit board detects the angular position of the output shaft cooperatively with the encoding disk, making the multi-turn absolute encoder be an integrated structure. The base and the rotating shaft are detachably connected with the housing and the output shaft respectively.

Abstract: The present disclosure describes a semiconductor structure that includes a channel region, a source region adjacent to the channel region, a drain region, a drift region adjacent to the drain region, and a dual gate structure. The dual gate structure includes a first gate structure over portions of the channel region and portions of the drift region. The dual gate structure also includes a second gate structure over the drift region.

Abstract: The disclosure belongs to the field of micro-nano electronic materials, and in particular to a Se-based selector material, a selector unit, and a preparation method thereof. The Se-based selector material is a compound including Ge, Se, and B elements. The chemical formula of the Se-based selector material is (GexSe1?x)1?yByMz, in which the M element is at least one of In, Ga, Al, and Zn, and 0.1?x?0.9, 0.02?y?0.15, and 0?z?0.2. The problems of safety and stability of the existing material selection for the selector are solved by the selector material, the selector unit, and the preparation method thereof provided by the disclosure. In addition, the threshold voltage of the selector device prepared based on the Se-based selector material is adjustable, and the comprehensive performance is good.

Abstract: The present disclosure relates to techniques for monitoring an operating state of a birdcage coil in a magnetic resonance system. The birdcage coil comprises a pair of end rings, and multiple legs arranged between the pair of end rings and connected to the pair of end rings. The technique enables a determination that an open circuit has occurred in at least one of the multiple legs.

Abstract: A power module and a power device are provided. The power device includes two screws, a heat dissipation components and a power module. The power module includes a substrate, a package body and two fixing structures. Each fixing structure includes a first through hole, two second through holes, an annular structure and two sinking structures. When the power module is fixed to the heat dissipation component, each sinking structure is bent toward the heat dissipation component, and each annular structure is fixed to the flat surface of the heat dissipation component by the screws. The heat dissipation surface of the substrate can be flatly attached to the flat surface of the heat dissipation component through the two fixed structures, so that the heat energy generated during the operation of the power module can be transferred out through the heat dissipation component.

Abstract: A method includes: forming a barrier layer in a substrate; depositing a first dielectric layer over the substrate; forming a patterned mask layer over the first dielectric layer; patterning the first dielectric layer into a first sublayer of a gate dielectric layer; converting at least part of the patterned mask layer into a second sublayer of the gate dielectric layer; depositing a second dielectric layer adjacent to the first and second sublayers to serve as a third sublayer of the gate dielectric layer; and depositing a gate electrode over the gate dielectric layer.

Abstract: A circuit board includes a substrate and a first metal circuit layer. The substrate has an upper surface and a lower surface opposite to the upper surface. The first metal circuit layer is located on the upper surface, and the first metal circuit layer includes a first line area and a second line area. The first line area and the second line area are separated by a groove area, and the groove area includes a bent section. Accordingly, the risk of detachment between the first metal circuit layer and the substrate due to stress concentration on the circuit board can be reduced.

Abstract: A method and apparatus for limiting an RF alternating magnetic field in MRI. The method includes: measuring a perpendicular distance between a local coil placed on a scanned part of a patient and the center of a detection hole of a magnetic resonance (MR) scanner; based on the perpendicular distance, determining a deviation between the B1 field strength at the position of the local coil during an MR scan and the B1 field strength at the center of the detection hole; based on the deviation, computing a conversion coefficient for conversion between the B1 field strength at the position of the local coil and the B1 field strength at the center of the detection hole; based on the B1 field strength required when the surface temperature of the local coil is equal to a safe temperature upper limit and the conversion coefficient, computing a maximum permissible field strength of the B1 field at the center of the detection hole.

Abstract: A segmented capacitance calibration circuit applied in a pure capacitor array structure includes a first calibration unit, a second calibration unit and a selection switch which are all connected with a scaling capacitor. The first and second calibration units include at least one capacitor, and the selection switch is configured to select the first or second calibration unit to be connected to the pure capacitor array structure. When the first calibration unit is connected to the pure capacitor array structure and in parallel with the scaling capacitor, a negative error calibration is performed on the scaling capacitor. When the second calibration unit is connected to the pure capacitor array structure and in series with the scaling capacitor, a positive error calibration is performed on the scaling capacitor. The nonlinear problem caused by the precision error of the scaling capacitor in the pure capacitor array structure is solved.

Abstract: A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.

Abstract: A printing head and a method for applying a correction for mounting deviation of light-emitting chips are provided. The printing head includes a plurality of light-emitting chips. Each light-emitting chip includes a plurality of primary light-emitting elements that are continuously arranged. At least one of two adjacent light-emitting chips further includes at least one spare light-emitting element continuously and linearly arranged after the primary light-emitting elements. If the two adjacent light-emitting chips are both at a target mounting position, first N light-emitting units of one of the two light-emitting chips respectively face to first N light-emitting units of the other one of the two light-emitting chips, where N?1. Each two of the light-emitting units facing to each other form a group. One of the two light-emitting units in each of the groups is set to a light emission disabled state.