Patents by Inventor Lun Wang

Lun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11241973
    Abstract: A vehicle includes a traction battery, an auxiliary battery, and a charge port configured to mate with a connector of a charging station. The charge port has a pilot pin. A control pilot circuit includes a first switch arranged between the pilot pin and a ground. The pilot circuit further includes a second switch arranged between the pilot pin and the ground. The second switch is configured to close in response to the voltage of the auxiliary battery being less than the threshold to induce the first voltage change in the pilot signal, and open in response to the voltage of the auxiliary battery exceeding the threshold.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: February 8, 2022
    Assignee: Ford Global Technologies, LLC
    Inventor: Chih-Lun Wang
  • Publication number: 20220029020
    Abstract: The present disclosure describes a semiconductor structure that includes a channel region, a source region adjacent to the channel region, a drain region, a drift region adjacent to the drain region, and a dual gate structure. The dual gate structure includes a first gate structure over portions of the channel region and portions of the drift region. The dual gate structure also includes a second gate structure over the drift region.
    Type: Application
    Filed: January 5, 2021
    Publication date: January 27, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Chih SU, Ruey-Hsin LIU, Pei-Lun WANG, Jia-Rui LEE, Jyun-Guan JHOU
  • Patent number: 11192283
    Abstract: A manufacturing apparatus and a manufacturing method for a molded lens are provided. A substrate is located between a first molding core and a second molding core, and the first molding core is moved so that the substrate is formed into a lens. A distance sensor sends a plurality of press distance parameters of moving the first molding core, and the press distance parameters may form a press curve. The press curve and a reference press curve is compared for a difference by a processor and a comparator. The processor determines whether the difference is within an error range.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: December 7, 2021
    Assignee: Young Optics Inc.
    Inventors: Shiue-Li Liu, Ming-Yuan Chou, Tzu-Lun Wang
  • Publication number: 20210376202
    Abstract: A micro-LED and a method for manufacturing the same, and a micro-LED module are provided. The method includes the following. Multiple micro-LED units that are spaced on a substrate are provided. A jig is covered on the substrate in such a manner that a light-emitting part of each micro-LED unit is covered between the jig and the substrate. A molten light blocking material is injected into the jig in such a manner that the light blocking material is filled between side surfaces of each micro-LED unit and the jig. The light blocking material is cured to form a light blocking layer on the side surfaces of each micro-LED unit. The jig is removed after the light blocking material is cured.
    Type: Application
    Filed: June 9, 2021
    Publication date: December 2, 2021
    Inventors: Chen HUNG-WEN, Kai Lun WANG
  • Patent number: 11165276
    Abstract: A adapter having an inputting terminal and an outputting terminal is provided. The adapter further includes a converter having a first side and a second side, a testing switch having a first terminal and a second terminal, a detecting circuit and a first indicator. The first side is coupled to the inputting terminal. The second side is coupled to the outputting terminal. The converter is used to convert inputting power for providing outputting power to a load system. The first terminal is coupled to the second side. The detecting circuit is coupled to the second terminal. When the first terminal and the second terminal of the testing switch are conducted, the load system is disconnected with the adapter by the detecting circuit. The detecting circuit is used to detect an outputting signal for generating a detecting result. The first indicator sends a message according to the detecting result.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: November 2, 2021
    Assignee: CYBER POWER SYSTEMS, INC.
    Inventors: Yu-Sheng Wang, Hong-Lun Wang, Cheng-Yang Su
  • Patent number: 11164970
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a gate structure disposed over a substrate between a source region and a drain region. A first inter-level dielectric (ILD) layer is disposed over the substrate and the gate structure and a second ILD layer is disposed over the first ILD layer. A field plate etch stop structure is between the first ILD layer and the second ILD layer. A field plate extends from an uppermost surface of the second ILD layer to the field plate etch stop structure. A plurality of conductive contacts extend from the uppermost surface of the second ILD layer to the source region and the drain region.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: November 2, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Ho, Hui-Ting Lu, Pei-Lun Wang, Yu-Chang Jong, Jyun-Guan Jhou
  • Patent number: 11158314
    Abstract: A voice control device includes a user database, a first image capturing module, a voice command module and a management module. The user database stores first user identification data of a first user account. The first image capturing module captures an environmental image. The voice command module is enabled to receive a voice command for controlling the voice control device. The management module is used to detect whether at least one facial image exists in the environmental image, and detect whether the facial image matches with the first user identification data, and when the facial image matches with the first user identification data, the management module logs in the first user account and enables the voice command module.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: October 26, 2021
    Assignee: PEGATRON CORPORATION
    Inventors: Cheng-Yu Kao, Nien-Chih Wang, Yu-Hung Tseng, Yueh-Fei Chang, Chih-Lun Wang
  • Publication number: 20210252990
    Abstract: A vehicle includes a traction battery, an auxiliary battery, and a charge port configured to mate with a connector of a charging station. The charge port has a pilot pin. A control pilot circuit includes a first switch arranged between the pilot pin and a ground. The pilot circuit further includes a second switch arranged between the pilot pin and the ground. The second switch is configured to close in response to the voltage of the auxiliary battery being less than the threshold to induce the first voltage change in the pilot signal, and open in response to the voltage of the auxiliary battery exceeding the threshold.
    Type: Application
    Filed: February 17, 2020
    Publication date: August 19, 2021
    Inventor: Chih-Lun Wang
  • Publication number: 20210220834
    Abstract: The present invention relates to an anti-adhesion crushing tool for crushing damp ores. The anti-adhesion crushing tool can effectively improve the current working environment in attapulgite crushing, and is beneficial to effectively improve the anti-adhesion properties of the attapulgite clay.
    Type: Application
    Filed: December 22, 2020
    Publication date: July 22, 2021
    Inventors: Xingqiao DENG, Zhifei DU, Lun WANG, Chengfu LI
  • Publication number: 20210149003
    Abstract: A local shimming device and a method for compensation of non-uniformity of a main magnetic field are disclosed, wherein the local shimming device comprises: a local coil, arranged to cover a local region of an examination subject, to receive a magnetic resonance signal from the local region; multiple shim coils, wherein the multiple shim coils are integrated in the local coil or arranged to surround at least a part of the local coil; and a shimming controller, configured to control at least one shim coil of the multiple shim coils, according to a strength distribution of a main magnetic field in the local region, to provide a field distribution for compensating a component of the main magnetic field in the local region.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 20, 2021
    Applicant: Siemens Healthcare GmbH
    Inventors: Ying Lun Wang, Yan Li Chen, Zhen Hua Yue, Wuyi Zhao
  • Publication number: 20210145872
    Abstract: Provided herein are methods for forming three-dimensional tissues in vivo. In one embodiment, provided herein is a method for forming a three-dimensional tissue in vivo, comprising depositing on a surface that is in or on a subject at least one composition that comprises cells. In another embodiment, provided herein is a method for forming a three-dimensional tissue in vivo, comprising depositing on a surface that is in or on a subject at least one composition that comprises cells and at least one composition that comprises an extracellular matrix (ECM). In another embodiment, provided herein is a method for forming a three-dimensional tissue in vivo, comprising depositing on a surface that is in or on a subject at least one composition that comprises cells, at least one composition that comprises an extracellular matrix (ECM), and at least one other additional components.
    Type: Application
    Filed: June 23, 2020
    Publication date: May 20, 2021
    Applicant: Celularity Inc.
    Inventors: Robert J. HARIRI, Mohit B. BHATIA, Wolfgang HOFGARTNER, Jia-Lun WANG, Qian YE
  • Patent number: 10971624
    Abstract: High-voltage transistor devices with two-step field plate structures and methods of fabricating the transistor devices are provided. An example high voltage transistor device includes: a gate electrode disposed over a substrate between a source region and a drain region, a first film laterally extending from over the gate electrode to over a drift region laterally arranged between the gate electrode and the drain region, a second film laterally extending over a portion of the drift region adjacent to the drain region and away from the gate electrode, and a field plate laterally extending from over the first film to over the second film. A first thickness vertically from a top surface of the gate electrode to a bottom surface of the field plate is smaller than a second thickness vertically from a top surface of the portion of the drift region to the bottom surface of the field plate.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: April 6, 2021
    Assignee: Macronix International Co., Ltd.
    Inventors: Han-Lun Wang, An-Hung Lin, Wei-Chih Lin, Xin-You Chen, Bo-Jui Huang
  • Patent number: 10964810
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip. The method may be performed by forming a source region and a drain region within a substrate. A gate structure is formed over the substrate and between the source region and the drain region. One or more dielectric layers are formed over the gate structure, and a first inter-level dielectric (ILD) layer is formed over the one or more dielectric layers. The first ILD layer laterally surrounds the gate structure. The first ILD layer is etched to define contact openings and a field plate opening. The contact openings and the field plate opening are filled with a conductive material.
    Type: Grant
    Filed: September 21, 2019
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsueh-Liang Chou, Dah-Chuen Ho, Hui-Ting Lu, Po-Chih Su, Pei-Lun Wang, Yu-Chang Jong
  • Publication number: 20210074820
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming a source region and a drain region within a substrate. A drift region is formed within the substrate such that the drift region is disposed laterally between the source region and the drain region. A first gate structure is formed over the drift region. An inter-level dielectric (ILD) layer is formed over the first gate structure. The ILD layers is patterned to define a field plate opening. A first field plate layer, a second field plate layer, and a third field plate layer are formed within the field plate opening.
    Type: Application
    Filed: November 19, 2020
    Publication date: March 11, 2021
    Inventors: Chia-Cheng Ho, Hui-Ting Lu, Pei-Lun Wang, Yu-Chang Jong, Jyun-Guan Jhou
  • Patent number: 10897823
    Abstract: A circuit board including an interconnect substrate and a multilayer structure is provided. The interconnect substrate includes a core layer and a conductive structure disposed on the core layer. The multilayer structure is disposed on the conductive structure. The multilayer structure includes a plurality of dielectric layers and a plurality of circuit structures. The circuit structures are disposed in the dielectric layers. A topmost layer in the circuit structures is exposed to the dielectric layers to be in contact with the conductive structure. A pattern of the topmost layer in the circuit structures and a pattern of a top surface of the conductive structure are engaged with each other.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: January 19, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Cheng-Ta Ko, Kai-Ming Yang, Chih-Lun Wang
  • Publication number: 20200397830
    Abstract: Provided herein are methods of treatment of individuals having an immune-related disease, disorder or condition, for example, inflammatory bowel disease, graft-versus-host disease, multiple sclerosis, rheumatoid arthritis, psoriasis, lupus erythematosus, diabetes, mycosis fungoides (Alibert-Bazin syndrome), or scleroderma using placental stem cells or umbilical cord stem cells.
    Type: Application
    Filed: January 24, 2020
    Publication date: December 24, 2020
    Applicant: CELULARITY, INC.
    Inventors: James W. Edinger, Robert J. Hariri, Jia-Lun Wang, Qian Ye, Herbert Faleck
  • Patent number: 10861946
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a field plate disposed over a drift region. A first gate electrode overlies a substrate between a source region and a drain region. An etch stop layer laterally extends from an outer sidewall of the first gate electrode to the drain region. The etch stop layer overlies the drift region disposed between the source region and the drain region. A field plate is disposed within a first inter-level dielectric (ILD) layer overlying the substrate. The field plate overlies the drift region. A top surface of the field plate is aligned with a top surface of the first gate electrode and a bottom surface of the field plate is vertically above a bottom surface of the first gate electrode. The field plate and first gate electrode respectively include metal materials.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Cheng Ho, Hui-Ting Lu, Pei-Lun Wang, Yu-Chang Jong, Jyun-Guan Jhou
  • Publication number: 20200373395
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a field plate disposed over a drift region. A first gate electrode overlies a substrate between a source region and a drain region. An etch stop layer laterally extends from an outer sidewall of the first gate electrode to the drain region. The etch stop layer overlies the drift region disposed between the source region and the drain region. A field plate is disposed within a first inter-level dielectric (ILD) layer overlying the substrate. The field plate overlies the drift region. A top surface of the field plate is aligned with a top surface of the first gate electrode and a bottom surface of the field plate is vertically above a bottom surface of the first gate electrode. The field plate and first gate electrode respectively include metal materials.
    Type: Application
    Filed: May 21, 2019
    Publication date: November 26, 2020
    Inventors: Chia-Cheng Ho, Hui-Ting Lu, Pei-Lun Wang, Yu-Chang Jong, Jyun-Guan Jhou
  • Patent number: 10777917
    Abstract: The present invention relates to a terminal stand, particularly, to a terminal stand with a base body, a movable part and a metal elastic part. The base body includes a casing and a side cover. One end of the movable part is a pressing end, the other end extends to form two arms. The metal elastic part is disposed in the accommodating space, one end of the metal elastic part has two abutments, one of the abutments passes through the first through hole and abut against one of the abutment holes, the other abutment passes through the second through hole and abuts against the other abutment hole, the other end of the metal elastic part has two pins, and at least one leg respectively passes through the corresponding pin hole.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: September 15, 2020
    Assignee: P-TWO INDUSTRIES INC.
    Inventors: Chien-Chun Wang, Wen-Lun Wang
  • Patent number: 10763660
    Abstract: A vehicle includes an Alternating Current (AC) source, a receptacle, and a switch. The AC source has a line and neutral potential. The receptacle is carried by a body of the vehicle and includes line, neutral, and ground conductors, and a ground fault interrupter (GFI) circuit. The switch is coupled between the AC source and the GFI circuit configured to selectively short the neutral and ground conductors.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: September 1, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Chih-Lun Wang, Tianbo Xu