Abstract: Disclosed is an optoelectronic semiconductor chip (10) comprising: —a succession of semiconductor layers (1) that has a main plane of extension, an active layer (12) and a bottom surface (1c); —a substrate (41) that is arranged on the bottom surface (1c) of the succession of semiconductor layers (1) and has a base surface (41c) facing away from the bottom surface (1c); and —a succession of joining layers (3) which is arranged in at least some locations between the succession of semiconductor layers (1) and the substrate (41) in a vertical direction; wherein —the substrate (41) laterally protrudes from the succession of semiconductor layers (1) by a maximum of 10 ?m.

Abstract: A method of producing a plurality of optoelectronic semiconductor components includes a) preparing a composite with a semiconductor layer sequence, wherein the composite includes a plurality of component areas mechanically connected to one another; b) forming a plurality of connecting surfaces on the semiconductor layer sequence, wherein at least one connecting surface is formed on each component area; c) forming a molding compound on the semiconductor layer sequence, wherein the molding compound fills interstices between the connecting surfaces; and d) singulating the composite with the molding compound, wherein during singulation a plurality of molded bodies is formed from the molding compound, each of which is associated with a semiconductor body obtained from a component area of the composite.

Abstract: A mount (10) and an optoelectronic component (100) with the mount (10) are provided, wherein the mount (10) comprises a moulding (5), at least one through-contact (41, 42) and a plurality of reinforcing fibres (52), wherein the moulding (5) is formed from an electrically insulating moulding material (53), the through-contact (41, 42) is formed from an electrically conductive material, and the reinforcing fibres (52) produce a mechanical connection between the moulding (5) and the through-contact (41, 42) by the reinforcing fibres (52) being arranged in certain regions of the moulding (5) and arranged in certain regions of the through-contact (41, 42). A method for producing a mount or a component with such a mount is also provided.

Abstract: An optoelectronic semiconductor component includes an active layer arranged between a p-type semiconductor region and an n-type semiconductor region, a carrier including a plastic and a first via and a second via, a p-contact layer and an n-contact layer arranged between the carrier and a semiconductor body at least in some regions, wherein the p-contact layer electrically joins the first via and the p-type semiconductor region, and the n-contact layer electrically joins the second via and the n-type semiconductor region, a metallic reinforcing layer arranged at least in some regions between the n-contact layer and the carrier, wherein the metallic reinforcing layer is at least 5 ?m thick, and at least one p-contact feed-through arranged between the first via and the p-contact layer, wherein the p-contact feed-through is at least 5 ?m thick and surrounded in a lateral direction by the reinforcing layer at least in some regions.

Abstract: A component includes a semiconductor body, a carrier, and a stabilization layer arranged between the semiconductor body and the carrier in the vertical direction. The semiconductor body has a first semiconductor layer facing away from the carrier, a second semiconductor layer facing the carrier, and an active layer arranged between the first semiconductor layer and the second semiconductor layer. The carrier has a first via and a second via laterally spaced apart from the first via by means of an intermediate region. The first via is connected to the first semiconductor layer in an electrically conductive manner and the second via is connected to the second semiconductor layer in an electrically conductive manner. The stabilization layer is continuous, overlaps with the vias in a top view, and laterally bridges the intermediate region. The stabilization layer is electrically insulated from the vias and from the semiconductor body.

Abstract: A component having a metal carrier and a method for producing a component are disclosed. In an embodiment the component includes a carrier having a metallic carrier layer, an insulating layer and a first through-contact extending in a vertical direction throughout the carrier layer, wherein the through-contact is electrically isolated from the carrier layer via the insulating layer. The component further includes a semiconductor body and a wiring structure arranged in the vertical direction between the carrier and the semiconductor body at least places and electrically contacting the semiconductor body, wherein the wiring structure has a first connection area and a second connection area, wherein the connection areas adjoin the carrier and are assigned to different electrical polarities of the component, wherein the first through-contact is in electrical contact with one of the connection areas, and wherein the component is configured to be externally electrically connectable via the carrier.

Abstract: A method for producing a component may include providing a composite containing a semiconductor stack layer, a first exposed connection layer and a second exposed connection layer, where the connection layers are arranged on the semiconductor stack, assigned to different electrical polarities and are configured to electrically contact the component to be produced; forming a first through contact exposed in lateral directions on the first connection layer and a second through contact exposed in lateral directions on the second connection layer, where the through contacts are formed from an electrically conductive connection material; and applying a molded body material on the composite for forming a molded body, where each of the through contacts are fully and circumferentially enclosed by the molded body at least in the lateral directions, such that the molded body and the through contacts form a permanently continuous carrier which mechanically carries the component to be produced

Abstract: The invention relates, inter alia, to a method for producing a plurality of semiconductor chips, the method comprising the following steps: providing a substrate (1); applying a semiconductor layer sequence (2) to the substrate (1); generating a plurality of recesses (6) in the semiconductor layer sequence (2) on the side of the semiconductor layer sequence (2) that is facing away from the substrate (1); detaching the substrate (1) from the semiconductor layer sequence (2); thinning the semiconductor layer sequence (2) on the side that was facing the substrate (1) prior to detaching the substrate (1).

Abstract: The invention relates to a method for producing a component wherein a composite, comprising a semiconductor layer stack and connection layers, is provided, wherein a molded article material is applied to the composite to form a molded article, such that the molded article covers the connection layers. Recesses for exposing the connection layers are formed through the molded article and the recesses are then filled with an electrically conductive material to form through-contacts. The invention further relates to a component, which is in particular produced by such a method, wherein the molded article is integral and formed from a compressed and/or from a molded article material reinforced by fibers or fillers.

Abstract: The invention relates to a method for producing an optoelectronic semiconductor chip (1). A semiconductor layer sequence (3) is provided, comprising a first semiconductor layer (3a) and a second semiconductor layer (3b). Furthermore, a first contact layer (5a) is provided which extends laterally along the first semiconductor layer (3a) and electrically contacts same. A third semiconductor layer (7) is applied onto a first contact layer (5a) face facing away from the semiconductor layer sequence (3). A recess (8) is formed which extends through the third semiconductor layer (7), the first contact layer (5a), and the first semiconductor layer (3a) into the second semiconductor layer (3b). A passivation layer (9) is applied onto a third semiconductor layer (7) face facing away from the the semiconductor layer sequence (3). At least one first (9a) and at least one second passage opening (9b, 9c) are formed in the passivation layer (9).

Abstract: A component includes a carrier and a semiconductor body arranged on the carrier, wherein the semiconductor body has an active layer arranged between the first and second semiconductor layers and is configured to generate, during operation of the component, an electromagnetic radiation that can be coupled out from the component through a first main surface, the first main surface of the component has an electrical contact layer configured to electrically contact a first semiconductor layer and in a plan view the carrier covers the first main surface in places, and in direct vicinity of the electrical contact layer the component includes a shielding structure configured to prevent electromagnetic radiation generated by the active layer from impinging onto the contact layer.

Abstract: A method for producing optoelectronic semiconductor components (100) is specified, wherein a carrier (1) having a carrier main side (11) is provided. Furthermore, a plurality of singulated optoelectronic semiconductor chips (2) are provided, wherein the semiconductor chips (2) each have a main emission side (21) and a contact side (22) opposite the main emission side (21). The singulated semiconductor chips (2) are then applied to the carrier main side (11), such that the contact side (22) in each case faces the carrier main side (11). In regions between the semiconductor chips, a mask frame (3) is applied, wherein the mask frame (3) is a grid of partitions (31). In a plan view of the carrier main side (11), each semiconductor chip (2) is surrounded all around by the partitions (31). The semiconductor chips (2) are potted with a conversion material (4) such that a conversion element (41) is respectively formed on the semiconductor chips (2).

Abstract: A component with a semiconductor body, and first and second metal layer is disclosed. The first metal layer is arranged between the semiconductor body and the second metal layer, the semiconductor body has a first semiconductor layer on a side which is averted from the first metal layer, a second semiconductor layer on a side facing towards the first metal layer, and an active layer arranged between the first semiconductor layer and the second semiconductor layer, the component has a through-connection, which extends through the second semiconductor layer and the active layer for the electrical bonding of the first semiconductor layer. The second metal layer has a first subregion electrically connected to the through-connection by the first metal layer, and a second subregion spaced apart laterally from the first subregion by an intermediate space. In an overhead view, the first metal layer laterally completely covers the intermediate space.

Abstract: Disclosed is a method for producing a plurality of semiconductor chips (10). A composite (1), which comprises a carrier (4) and a semiconductor layer sequence (2, 3), is provided. Separating trenches (17) are formed in the semiconductor layer sequence (2, 3) along an isolation pattern (16). A filling layer (11) limiting the semiconductor layer sequence (2, 3) toward the separating trenches (17) is applied to a side of the semiconductor layer sequence (2, 3) facing away from the carrier (4). Furthermore, a metal layer (10) adjacent to the filling layer (11) is applied in the separating trenches (17). The semiconductor chips (20) are isolated by removing the metal layer (10) adjacent to the filling layer (11) in the separating trenches (17). Each isolated semiconductor chip (20) has one part of the semiconductor layer sequence (2, 3), and of the filling layer (11). Also disclosed is a semiconductor chip (10).

Abstract: A method of producing a plurality of optoelectronic semiconductor chips includes a) providing a layer composite assembly having a principal plane which delimits the layer composite assembly in a vertical direction, and includes a semiconductor layer sequence having an active region that generates and/or detects radiation, wherein a plurality of recesses extending from the principal plane in a direction of the active region are formed in the layer composite assembly; b) forming a planarization layer on the principal plane such that the recesses are at least partly filled with material of the planarization layer; c) at least regionally removing material of the planarization layer to level the planarization layer; and d) completing the semiconductor chips, wherein for each semiconductor chip at least one semiconductor body emerges from the semiconductor layer sequence.

Abstract: A component with a semiconductor body, and first and second metal layer is disclosed. The first metal layer is arranged between the semiconductor body and the second metal layer, the semiconductor body has a first semiconductor layer on a side which is averted from the first metal layer, a second semiconductor layer on a side facing towards the first metal layer, and an active layer arranged between the first semiconductor layer and the second semiconductor layer, the component has a through-connection, which extends through the second semiconductor layer and the active layer for the electrical bonding of the first semiconductor layer. The second metal layer has a first subregion electrically connected to the through-connection by the first metal layer, and a second subregion spaced apart laterally from the first subregion by an intermediate space. In an overhead view, the first metal layer laterally completely covers the intermediate space.

Abstract: A method for producing an optoelectronic semiconductor chip based on a nitride semiconductor system is specified. The method comprises the steps of: forming a semiconductor section with at least one p-doped region; and forming a covering layer disposed downstream of the semiconductor section in a growth direction of the semiconductor chip, said covering layer having at least one n-doped semiconductor layer. An activation step suitable for electrically activating the p-doped region is effected before or during the formation of the covering layer. An optoelectronic semiconductor chip which can be produced by the method is additionally specified.

Abstract: The invention relates to a method for producing a plurality of optoelectronic semiconductor components (1), comprising the following steps: a) providing a semiconductor layer sequence (2) having a plurality of semiconductor body regions (200); b) providing a plurality of carrier bodies (3), which each have a first contact structure (31) and a second contact structure (32); c) forming a composite (4) having the semiconductor layer sequence and the carrier bodies in such a way that adjacent carrier bodies are separated from one another by interspaces (35) and each semiconductor body area is electrically conductive connected to the first contact structure and the second contact structure of the associated carrier body; and d) separating the composite into the plurality of semiconductor components, wherein the semiconductor components each have a semiconductor body (20) and a carrier body. The invention further relates to an optoelectronic semiconductor component (1).

Abstract: An optoelectronic semiconductor chip includes a semiconductor body with an active region provided for generating electromagnetic radiation, a first mirror layer provided for reflecting the electromagnetic radiation, a first encapsulation layer formed with an electrically insulating material, and a carrier provided for mechanically supporting the first encapsulation layer, the first mirror layer and the semiconductor body. The first mirror layer is arranged between the carrier and the semiconductor body. The first encapsulation layer is arranged between the carrier and the first mirror layer. The first encapsulation layer is an ALD layer.

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence and a carrier substrate. A first and a second electrical contact layer are arranged at least regionally between the carrier substrate and the semiconductor layer sequence and are electrically insulated from each other by an electrically insulating layer. A mirror layer is arranged between the semiconductor layer sequence and the carrier substrate. The semiconductor chip comprises a transparent encapsulation layer covering side surfaces of the semiconductor layer sequence, side surfaces of the mirror layer and side surfaces of the electrically insulating layer facing towards the side surfaces of the semiconductor chip.