Patents by Inventor M. Roberts

M. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151355
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack structure of a quantum dot device, wherein the quantum well stack structure includes an insulating material to define multiple rows of quantum dot formation regions; and a gate that extends over multiple ones of the rows.
    Type: Application
    Filed: January 10, 2025
    Publication date: May 8, 2025
    Applicant: Intel Corporation
    Inventors: Hubert C. George, Ravi Pillarisetty, Jeanette M. Roberts, Nicole K. Thomas, James S. Clarke
  • Publication number: 20250131424
    Abstract: Systems, methods, and computer-readable storage media for integrating issuing processor computing systems over a communications network are provided. A connection can be established with a remote computing device over a communications network. One or more parameters of a card program and a pointer to a computing device of a computing system can be received. A data object can be generated. An event regarding an exchange card can be detected. A message regarding the event can be transmitted to the computing device of the computing system using the pointer. The computing device can forward data of the message to an issuing processor computing system.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Inventor: Rhett M. Roberts
  • Publication number: 20250131412
    Abstract: Systems, methods, and computer-readable storage media for issuing processor aggregation are provided. Issuing processor integration interfaces can be specific to a corresponding issuing processor systems. Each issuing processor integration interface can include one or more issuer entities for card data, the card data for card creation and management within the corresponding issuing processor system. The issuer entities can be for customer data specific to the corresponding issuing processor system, and for credentials for an issuer account. One or more card records can correspond to resources for instantiating a card, modifying functionality of the card, and managing cards. Cards can be operable with a card network through an issuing processor system. Uniform receiving of data from and transmitting of data to the plurality of issuing processor systems is further provided.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Inventor: Rhett M. Roberts
  • Publication number: 20250131447
    Abstract: Systems and methods for configuring authorization expiration. The disclosed systems and methods receive rule data for defining an expiration for transaction authorizations and receive a transaction authorization request for a transaction. If the transaction authorization request is approved, the disclosed systems and methods can compare the transaction data to the rule data to determine whether a match occurs for the transaction data and the rule data. If there is a match, the disclosed systems and methods can set a transaction authorization expiration to the expiration value. The disclosed systems and methods can transmit the transaction data to a ledger system, which is configured to update an available balance based on the transaction data.
    Type: Application
    Filed: October 21, 2023
    Publication date: April 24, 2025
    Inventors: Rhett M. Roberts, Sloan A. Smith
  • Publication number: 20250131416
    Abstract: A system may include one or more processors, and one or more non-transitory, computer-readable mediums including instructions which, when executed by the one or more processors, cause the system to receive, at an authorization engine, from an issuing processor, a transaction authorization request including transaction information, compare, by the authorization engine, the transaction information to an available balance, based on the comparison, transmit, by the authorization engine, to the issuing processor, an approval message, transmit, by the authorization engine, the transaction information to a line of credit engine, determine, by the line of credit engine, an updated available balance based on the transaction information, and transmit, by the line of credit engine, the updated available balance to the authorization engine.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Inventor: Rhett M. Roberts
  • Patent number: 12263956
    Abstract: An aircraft with an aircraft fuselage, and a passenger cabin and a cockpit, where the aircraft includes a center-forward attendant space between the passenger cabin and the cockpit. A cabin crew member of the aircraft can stand in the center-forward attendant space for monitoring progress of an emergency evacuation of the aircraft. The aircraft has one or more emergency exits for providing egress of passengers from the aircraft fuselage during the emergency evacuation. The aircraft also has a situational awareness monitoring (SAM) system for use in evacuating the passengers from the aircraft during the emergency evacuation. The SAM system includes one or more imaging devices and one or more display modules, each of which displays within the passenger cabin images captured by a corresponding one of the one or more imaging devices.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: April 1, 2025
    Assignees: Airbus Americas, Inc., Airbus Operations GmbH, National Research Council of Canada
    Inventors: Joyce S. T. Tan, Tina Kay Griffin, Patrick Alexander Rollfink, Christophe J. P. J. Legare, Natalia Cooper, John Russell Thomas, Shelley M. Roberts, Caidence S. Paleske
  • Patent number: 12266699
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack structure of a quantum dot device, wherein the quantum well stack structure includes an insulating material to define multiple rows of quantum dot formation regions; and a gate that extends over multiple ones of the rows.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: April 1, 2025
    Assignee: Intel Corporation
    Inventors: Hubert C. George, Ravi Pillarisetty, Jeanette M. Roberts, Nicole K. Thomas, James S. Clarke
  • Publication number: 20250107221
    Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction.
    Type: Application
    Filed: December 5, 2024
    Publication date: March 27, 2025
    Applicant: Intel Corporation
    Inventors: James S. Clarke, Nicole K. Thomas, Zachary R. Yoscovits, Hubert C. George, Jeanette M. Roberts, Ravi Pillarisetty
  • Publication number: 20250086084
    Abstract: Technologies for providing enhanced management of processing errors include a compute device. The compute device includes circuitry configured to obtain error data indicative of errors resulting from integration of a component configured to add functionality to a data processing system of an institution. The compute device is also configured to perform statistical analysis on the obtained error data to produce error analytics data and produce a visual representation indicative of the error analytics data to enable efficient remediation of the errors.
    Type: Application
    Filed: September 11, 2024
    Publication date: March 13, 2025
    Inventors: David A. Arko, Paul McAndrew, Anna Hall-Lloyd, Jacqueline M. Roberts, Carolyn Gardner
  • Patent number: 12245523
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate and a quantum well stack disposed on the substrate. The quantum well stack may include a quantum well layer and a back gate, and the back gate may be disposed between the quantum well layer and the substrate.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: March 4, 2025
    Assignee: Intel Corporation
    Inventors: Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Zachary R. Yoscovits, James S. Clarke, Van H. Le
  • Patent number: 12232449
    Abstract: An over the row berry harvester provides flexible cushioned elements and surfaces to limit bruising of the fruit harvested. A chassis defines a picking tunnel that passes over rows of plants. A picking system removes fruit from the plants as the harvester moves along the rows. A catching system configured to receive fruit removed from the plants. The catching system includes groups of catch assemblies with soft surfaces on each side of the picking tunnel, each of the catch assemblies at least partially overlapping adjacent catch assemblies. Each of the catch assemblies has a lightweight frame with an aperture and a membrane over molded to bond to the frame and extend across the aperture. The harvest also includes soft surfaces assemblies with membranes stretched between edge frame elements.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: February 25, 2025
    Assignee: Oxbo International Corporation
    Inventors: Kevin M. Roberts, Thomas S. Kok
  • Patent number: 12211841
    Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: May 3, 2023
    Date of Patent: January 28, 2025
    Assignee: Intel Corporation
    Inventors: James S. Clarke, Nicole K. Thomas, Zachary R. Yoscovits, Hubert C. George, Jeanette M. Roberts, Ravi Pillarisetty
  • Publication number: 20250025170
    Abstract: Systems and subsystems for cutting and stapling tissue are disclosed. More specifically, the present disclosure relates to systems, devices, and subsystems for attachments for robotic surgeries. The surgical instrument includes a transection subsystem comprising a rotatable shaft having a lumen, a firing rod extending at least partially through the lumen, a firing rack coupled to a proximal end of the firing rod, the firing rod being rotationally independent of the firing rack, and a firing gear engaged with the firing rack. Rotation of the firing gear moves the firing rack and the firing rod axially.
    Type: Application
    Filed: July 17, 2024
    Publication date: January 23, 2025
    Applicant: CILAG GMBH INTERNATIONAL
    Inventors: BENJAMIN BERTRAM, RAFFAELE DEFINIS, HEATHER DICKSON, ERIC STOUT, M. ROBERT GARFIELD, SAMANTHA A. GRACE-MUDD, SAMANTHA S. TAYLOR
  • Publication number: 20250019705
    Abstract: Provided is BRCA-specific siRNA for enhancing the sensitivity of cancer cells to PARP inhibitors. According to the present disclosure, the siRNA can induce cancer cell death together with the PARP inhibitors in patients with wild-type BRCA genes with a low therapeutic effect of the PARP inhibitors, and the fusion protein-siRNA complex for siRNA delivery is up-taken into cells via CD47, and thus more specifically delivered to cancer cells while up-taken with high efficiency, thereby maximizing a desired cell death effect.
    Type: Application
    Filed: June 17, 2024
    Publication date: January 16, 2025
    Inventors: Ju Hee RYU, Ick Chan KWON, Youngji KO, Thomas M. ROBERTS, Jean J. ZHAO, Liya DING
  • Publication number: 20240370428
    Abstract: Systems, methods, and computer-readable storage media to calculate an update characteristic value for a capacity plan having multiple sub-ledgers. One system can include a communication network interface, a memory, and one or more processors. The memory can store a ledger to broadcast exchanges associated with the capacity plan. The one or more processors can identify a predetermined capacity plan characteristic value indicating a minimum update per cycle value for the capacity plan or a time period for completion of an update of a value of the capacity plan to zero. The one or more processors can calculate an update characteristic value for updating the value of the capacity plan to zero. The one or more processors can transmit, via the communication network interface, a record comprising the update characteristic value.
    Type: Application
    Filed: July 18, 2024
    Publication date: November 7, 2024
    Applicant: Simnang IP, LLC
    Inventors: Clement Ronzon, Rhett M. Roberts
  • Publication number: 20240330726
    Abstract: An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.
    Type: Application
    Filed: June 12, 2024
    Publication date: October 3, 2024
    Applicant: Intel Corporation
    Inventors: Florian Luethi, Hubert C. George, Felix Frederic Leonhard Borjans, Simon Schaal, Lester Lampert, Thomas Francis Watson, Jeanette M. Roberts, Jong Seok Park, Sushil Subramanian, Stefano Pellerano
  • Publication number: 20240296959
    Abstract: A computer-implemented method of determining a major adverse cardiovascular event, risk of MACE, in a patient, is provided. The method comprises receiving, with a computing device, subject value data for the patient, the subject value data including (i) at least one troponin value, (ii) at least one demographic value, and (iii) at least one of a value for prior history of cardiac disease, a value of prior history of renal disease, an erythrocyte mean corpuscular hemoglobin value and an electrolyte value. Further, the method comprises evaluating, with the computing device, the received subject value data of the patient based on a reference dataset indicative of reference subject values associated with one or more reference patients, wherein the reference dataset is indicative of reference subject values including (i) at least one troponin value, (ii) at least one demographic value, and (iii) a value for prior history of cardiac disease. Further, the risk of MACE is determined based on the evaluation.
    Type: Application
    Filed: May 10, 2024
    Publication date: September 5, 2024
    Inventors: Sean M. ROBERTS, Girish Simon
  • Patent number: 12072871
    Abstract: Systems, methods, and computer-readable storage media to calculate an update characteristic value for a capacity plan having multiple sub-ledgers. One system can include a communication network interface, a memory, and one or more processors. The memory can store a ledger to broadcast exchanges associated with the capacity plan. The one or more processors can identify a predetermined capacity plan characteristic value indicating a minimum update per cycle value for the capacity plan or a time period for completion of an update of a value of the capacity plan to zero. The one or more processors can calculate an update characteristic value for updating the value of the capacity plan to zero. The one or more processors can transmit, via the communication network interface, a record comprising the update characteristic value.
    Type: Grant
    Filed: January 24, 2023
    Date of Patent: August 27, 2024
    Assignee: Simnang IP, LLC
    Inventors: Clement Ronzon, Rhett M. Roberts
  • Patent number: D1044377
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: October 1, 2024
    Assignee: Starbucks Corporation
    Inventors: Brandon M. Roberts, Jonathan Levey, Ryan M. Gorham
  • Patent number: D1073815
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: May 6, 2025
    Inventor: Kwandaa M. Roberts