Patents by Inventor M. Roberts

M. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070152370
    Abstract: A method of making films surface imprinted with nanometer-sized particles to produce micro- and/or nano-structured electron and hole collecting interfaces, include providing at least one transparent substrate, providing at least one photoabsorbing conjugated polymer, providing a sufficient amount of nanometer-sized particles to produce a charge separation interface, providing at least one transparent polymerizable layer, embedding the nanometer-sized particles in the conjugated polymer, applying the polymerizable layer and the conjugated polymer/nanometer-sized particle mixture on separate substrates where the nanometer-sized particles form a stamp surface, imprinting the stamp surface into the surface of the polymerizable film layer to produce micro- and/or nano-structured electron and hole collecting interfaces, polymerizing the polymerizable film layer to form a conformal gap, and filling the gap with at least one photoabsorbing material to promote the generation of photoexcited electrons and transport to
    Type: Application
    Filed: June 7, 2006
    Publication date: July 5, 2007
    Inventors: M. Roberts, Scott Johnson, Richard Hollins, Curtis Johnson, Thomas Groshens, David Irvin
  • Publication number: 20060280291
    Abstract: A radiation window device to transmit radiation as part of an x-ray source or detector includes a support to be subject to a substantial vacuum, and an opening configured to transmit radiation. A film is mounted directly on the support across the opening, and has a material and a thickness selected to transmit soft x-rays. An adhesive directly adheres the film to the support. A coating covers exposed portions of at least one of the evacuated or ambient sides of the film, and covers a portion of the support surrounding the film. The support, film and adhesive form a vacuum tight assembly capable of maintaining the substantial vacuum when one side is subject to the substantial vacuum. In addition, the vacuum tight assembly can withstand a temperature of greater than approximately 250 degrees Celsius.
    Type: Application
    Filed: April 25, 2006
    Publication date: December 14, 2006
    Inventors: D. Turner, Keith Decker, M. Roberts, Robert Stillwell
  • Publication number: 20060240637
    Abstract: The invention includes methods of forming and/or passivating semiconductor constructions. In particular aspects, various oxides of a semiconductor substrate can be formed by exposing semiconductive material of the substrate to deuterium-enriched steam. In other aspects, a semiconductor construction is passivated by subjecting the construction to an anneal at a temperature of greater than or equal to 350° C. while exposing the construction to a deuterium-enriched ambient.
    Type: Application
    Filed: June 21, 2006
    Publication date: October 26, 2006
    Inventors: Kunal Parekh, Chandra Mouli, M. Roberts, Fernando Gonzalez
  • Publication number: 20060223279
    Abstract: First and second isolation trenches are formed into semiconductive material of a semiconductor substrate. The first isolation trench has a narrowest outermost cross sectional dimension which is less than that of the second isolation trench. An insulative layer is deposited to within the first and second isolation trenches effective to fill remaining volume of the first isolation trench within the semiconductive material but not that of the second isolation trench within the semiconductive material. The insulative layer comprises silicon dioxide deposited from flowing TEOS to the first and second isolation trenches. A spin-on-dielectric is deposited over the silicon dioxide deposited from flowing the TEOS within the second isolation trench within the semiconductive material, but not within the first isolation trench within the semiconductive material. The spin-on-dielectric is deposited effective to fill remaining volume of the second isolation trench within the semiconductive material.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Inventors: Robert Patraw, M. Roberts, Keith Cook
  • Publication number: 20060046355
    Abstract: The invention includes methods of forming and/or passivating semiconductor constructions. In particular aspects, various oxides of a semiconductor substrate can be formed by exposing semiconductive material of the substrate to deuterium-enriched steam. In other aspects, a semiconductor construction is passivated by subjecting the construction to an anneal at a temperature of greater than or equal to 350° C. while exposing the construction to a deuterium-enriched ambient.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 2, 2006
    Inventors: Kunal Parekh, Chandra Mouli, M. Roberts, Fernando Gonzalez
  • Publication number: 20060018910
    Abstract: The present invention relates to a therapeutic method for the treatment of non-hematologic malignancies comprising administering anti-IGF-1R antibodies, particularly human anti-IGF-1R antibodies, to a patient, in conjunction with the administration of at least one other therapeutic agent. The invention further relates to pharmaceutical compositions comprising these antibodies and methods of using such compositions thereof for treatment.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 26, 2006
    Inventors: Antonio Gualberto, Bruce Cohen, Carrie Melvin, M. Roberts