Patents by Inventor M. Roberts

M. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11549201
    Abstract: Described herein are fibers, nonwoven fabrics, and other nonwoven articles comprising a blend of at least one propylene-based elastomer and an impact copolymer. The impact copolymer is a reactor blend and comprises a propylene homopolymer component and a copolymer component, where the copolymer component comprises less than about 55 wt % ethylene-derived units, based on the weight of the copolymer component.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: January 10, 2023
    Assignee: EXXONMOBIL CHEMICALS PATENTS INC.
    Inventors: Vincent B. Gallez, Galen C. Richeson, Prasadarao Meka, John W. M. Roberts
  • Patent number: 11521474
    Abstract: Methods, systems and devices are provided for motion-activated display of messages on an activity monitoring device. In one embodiment, method for presenting a message on an activity monitoring device is provided, including the following method operations: downloading a plurality of messages to the device; detecting a stationary state of the device; detecting a movement of the device from the stationary state; in response to detecting the movement from the stationary state, selecting one of a plurality of messages, and displaying the selected message on the device.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: December 6, 2022
    Assignee: FITBIT, INC.
    Inventors: Timothy M. Roberts, Nichiketa Choudhary
  • Patent number: 11494682
    Abstract: Quantum computing assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a quantum computing assembly may include: a package substrate; a first die coupled to the package substrate; and a second die coupled to the second surface of the package substrate and coupled to the first die; wherein the first die or the second die includes quantum processing circuitry.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: November 8, 2022
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Shawna M. Liff, Jeanette M. Roberts, James S. Clarke
  • Patent number: 11482614
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum processing device may include a quantum well stack, the quantum well stack includes a quantum well layer, the quantum processing device further includes a plurality of gates above the quantum well stack to control quantum dot formation in the quantum well stack, and (1) gate metal of individual gates of the array of gates is tapered so as to narrow farther from the quantum well stack or (2) top surfaces of gate metal of individual gates of the array of gates are dished.
    Type: Grant
    Filed: December 23, 2017
    Date of Patent: October 25, 2022
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Willy Rachmady, Kanwaljit Singh, Nicole K. Thomas, Hubert C. George, Zachary R. Yoscovits, Roman Caudillo, Payam Amin, Jeanette M. Roberts, James S. Clarke
  • Patent number: 11450798
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a gate disposed on a quantum well stack; an insulating material disposed on the gate; and a conductive via extending through the insulating material and in conductive contact with the gate.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Zachary R. Yoscovits, James S. Clarke
  • Patent number: 11450765
    Abstract: A quantum dot device is disclosed that includes a fin and a gate above the fin. The fin may extend away from a base and include a quantum well stack in which one or more quantum dots may be formed during operation of the quantum dot device. The gate may include a gate electrode material having a first portion and a second portion, where the first portion is above the quantum well stack and the second portion is a portion that is not above the quantum well stack and is separated from the base by an insulating material. The quantum dot device may further include a metal structure between the second portion of the gate electrode material and the base, forming a portion of a diode provided in series with the gate, which diode may provide at least some ESD protection for the quantum dot device.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Hubert C. George, Ravi Pillarisetty, Lester Lampert, James S. Clarke, Nicole K. Thomas, Roman Caudillo, Kanwaljit Singh, David J. Michalak, Jeanette M. Roberts
  • Patent number: 11448248
    Abstract: A bracket for securing a panel is provided, the bracket including a panel contact member including an interface portion. Also provided are a first clamp member having a first clamp surface contact portion and a first clamp adjustable portion operable to interface with the panel contact member interface portion and a second clamp member having a second clamp surface contact portion positioned such that it is facing toward the first clamp surface contact portion of the first clamp when the first clamp adjustable portion is interfacing with the panel contact member interface portion, such that the first and second clamp surface contact portions are facing inward towards each other. A securing member is operable to secure the first clamp member to the panel contact member, the securing member positioned substantially perpendicular to the first and second clamp surface contact portions.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: September 20, 2022
    Assignee: HNI TECHNOLOGIES INC.
    Inventors: Evan M. Hundley, Samuel A. Herrmann, Trevor M. Sloat, Jacob C. Hovey, Ryan M. Roberts
  • Patent number: 11444188
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a base; a fin extending away from the base, wherein the fin includes a quantum well layer; an insulating material at least partially above the fin, wherein the insulating material includes a trench above the fin; and a gate metal on the insulating material and extending into the trench.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Nicole K. Thomas, Hubert C. George, Jeanette M. Roberts, Payam Amin, Zachary R. Yoscovits, Roman Caudillo, James S. Clarke
  • Patent number: 11424324
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a first gate and an adjacent second gate above the quantum well stack; and a multi-spacer between the first gate and the second gate, wherein the multi-spacer includes a first spacer and a second spacer different from the first spacer, and the first spacer is at least partially between the quantum well stack and the second spacer.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Hubert C. George, Ravi Pillarisetty, Lester Lampert, James S. Clarke, Nicole K. Thomas, Roman Caudillo, David J. Michalak, Jeanette M. Roberts
  • Patent number: 11417765
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a first gate above the quantum well stack, wherein the first gate includes a first gate metal and a first gate dielectric layer; and a second gate above the quantum well stack, wherein the second gate includes a second gate metal and a second gate dielectric layer, and the second gate dielectric layer extends over the first gate.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: August 16, 2022
    Assignee: Intel Corporation
    Inventors: Nicole K. Thomas, Ravi Pillarisetty, Kanwaljit Singh, Hubert C. George, David J. Michalak, Lester Lampert, Zachary R. Yoscovits, Roman Caudillo, Jeanette M. Roberts, James S. Clarke
  • Patent number: 11417755
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer; a first gate above the quantum well stack, wherein the first gate includes a first gate metal; and a second gate above the quantum well stack, wherein the second gate includes a second gate metal, and a material structure of the second gate metal is different from a material structure of the first gate metal; wherein the quantum well layer has a first strain under the first gate, a second strain under the second gate, and the first strain is different from the second strain.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: August 16, 2022
    Assignee: Intel Corporation
    Inventors: Kanwaljit Singh, Ravi Pillarisetty, Nicole K. Thomas, Payam Amin, Roman Caudillo, Hubert C. George, Jeanette M. Roberts, Zachary R. Yoscovits, James S. Clarke, Lester Lampert, David J. Michalak
  • Patent number: 11417201
    Abstract: This disclosure pertains to a system and method configured provide entry check-in protection of a protected premises network including a central alarm monitoring station in communication with a plurality of protected premises, each protected premises comprises a protected premises panel configured to provide entry check-in protection. Protected premises panels include processors and memory configured to provide entry check-in protection comprising receiving an indication of a zone violation of the monitored premises, transmitting a check-in message to the central alarm monitoring station, and transmitting an alert, by the central alarm monitoring station, indicating a destruction of the protected premises panel, upon expiration of the predetermined entry delay period. The check-in message includes a duration corresponding to the entry delay time plus a set period, e.g., one minute.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: August 16, 2022
    Assignee: DIGITAL MONITORING PRODUCTS, INC.
    Inventors: Rick A. Britton, David M. Roberts
  • Patent number: 11407998
    Abstract: The present invention relates to compositions comprising TWIST signaling inhibitors and optionally one or more anti-cancer agents, and methods of using the compositions for the treatment of cancer.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: August 9, 2022
    Assignees: City of Hope, The Regents of the University of California
    Inventors: Carlotta A. Glackin, John J. Rossi, Jeffrey I. Zink, Fuyuhiko Tamanoi, Cai M. Roberts, James Finlay
  • Patent number: 11387399
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate and a quantum well stack disposed on the substrate. The quantum well stack may include a quantum well layer and a back gate, and the back gate may be disposed between the quantum well layer and the substrate.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Zachary R. Yoscovits, James S. Clarke, Van H. Le
  • Publication number: 20220216305
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a first gate above the quantum well stack, wherein the first gate includes a first gate metal and a first gate dielectric; and a second gate above the quantum well stack, wherein the second gate includes a second gate metal and a second gate dielectric, and the first gate is at least partially between a portion of the second gate and the quantum well stack.
    Type: Application
    Filed: March 25, 2022
    Publication date: July 7, 2022
    Applicant: Intel Corporation
    Inventors: Nicole K. Thomas, Ravi Pillarisetty, Kanwaljit Singh, Hubert C. George, David J. Michalak, Lester Lampert, Zachary R. Yoscovits, Roman Caudillo, Jeanette M. Roberts, James S. Clarke
  • Patent number: 11366100
    Abstract: The present invention is based, in part, on the identification of novel FI.3K-mTORCI-S6K 1 signaling pathway biomarkers predictive of responsiveness to anti-cancer therapies.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: June 21, 2022
    Assignees: Dana-Farber Cancer Institute, Inc., President and Fellows of Harvard College
    Inventors: Thomas M. Roberts, Haoxuan Tong, Jean Zhao, John Blenis
  • Patent number: 11361240
    Abstract: Described herein are structures that include flux bias lines for controlling frequencies of qubits in quantum circuits. An exemplary structure includes a substrate, a qubit provided over a surface of the substrate, and a flux bias line provided below the surface of the substrate and configured to control the frequency of the qubit via a magnetic field generated as a result of a current flowing through the flux bias line. Methods for fabricating such structures are disclosed as well.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: June 14, 2022
    Assignee: Intel Corporation
    Inventors: Jeanette M. Roberts, Ravi Pillarisetty, Zachary R. Yoscovits, James S. Clarke, David J. Michalak
  • Patent number: 11355623
    Abstract: Embodiments of the present disclosure describe a method of fabricating spin qubit device assemblies that utilize dopant-based spin qubits, i.e. spin qubit devices which operate by including a donor or an acceptor dopant atom in a semiconductor host layer. The method includes, first, providing a pair of gate electrodes over a semiconductor host layer, and then providing a window structure between the first and second gate electrodes, the window structure being a continuous solid material extending between the first and second electrodes and covering the semiconductor host layer except for an opening through which a dopant atom is to be implanted in the semiconductor host layer. By using a defined gate-first process, the method may address the scalability challenges and create a deterministic path for fabricating dopant-based spin qubits in desired locations, promoting wafer-scale integration of dopant-based spin qubit devices for use in quantum computing devices.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: June 7, 2022
    Assignee: Intel Corporation
    Inventors: Lester Lampert, James S. Clarke, Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Kanwaljit Singh, Roman Caudillo, Hubert C. George, Zachary R. Yoscovits, Nicole K. Thomas
  • Patent number: PP34319
    Abstract: A new and distinct variety of peach tree (Prunus persica), which is denominated varietally as ‘Wapeachtwo’, and which produces an attractively colored yellow-fleshed, self-fertile, clingstone peach which is mature for harvesting and shipment about June 16 to June 25 under the ecological conditions prevailing in the San Joaquin Valley of central California.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: June 14, 2022
    Assignee: Wawona Packing Co., LLC
    Inventors: John Keith Slaughter, Kaylan M. Roberts
  • Patent number: PP34514
    Abstract: A new and distinct variety of nectarine tree (Prunus persica nucipersica), which is denominated varietally as ‘Wanectfive’, and which produces an attractively colored white-fleshed, clingstone nectarines which is mature for harvesting and shipment approximately June 1 to June 10 under the ecological conditions prevailing in the San Joaquin Valley of central California.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: August 23, 2022
    Assignee: Wawona Packing Co., LLC
    Inventors: John Keith Slaughter, Kaylan M. Roberts