Patents by Inventor Mahesh

Mahesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10225798
    Abstract: A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus may receive a temporary mobile group identifier (TMGI) for a single cell point-to-multipoint (SC-PTM) service to which a user equipment (UE) is to be subscribed. The apparatus may configure a connected mode discontinuous reception (CDRX) schedule for the UE based at least in part on an SC-PTM discontinuous reception (DRX) schedule that corresponds to the TMGI. The apparatus may transmit the CDRX schedule to the UE.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: March 5, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Kuo-Chun Lee, Sivaramakrishna Veerepalli, Shailesh Maheshwari, Rahul Kashyap, Muhammad Usman Aulakh, Mahesh Kommi, Omar Sabbarini
  • Patent number: 10221754
    Abstract: Some exemplary embodiments include an electrically driven cooling system for cooling non-engine components of a vehicle. The electrically driven cooling system includes a closed loop coolant flowpath including an electrically driven coolant pump and a radiator connected to the closed loop coolant flowpath, and one or more components connected in parallel and/or in series in the closed loop coolant flow path that receives the coolant. An electrically driven radiator fan is also operable to cool the coolant in the radiator. The electrically driven cooling system is flow isolated from any mechanically driven cooling system that provides coolant to the engine for vehicles that include an engine.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: March 5, 2019
    Assignee: Cummins Inc.
    Inventors: Mahesh Madurai Kumar, Gary L. Parker, Martin T. Books
  • Publication number: 20190065426
    Abstract: Systems, methods, and devices can involve a host device that includes a root complex, a link, and an interconnect protocol stack coupled to a bus link. The interconnect protocol stack can include multiplexing logic to select one of a Peripheral Component Interconnect Express (PCIe) upper layer mode, or an accelerator link protocol upper layer mode, the PCIe upper layer mode or the accelerator link protocol upper layer mode to communicate over the link, and physical layer logic to determine one or more low latency features associated with one or both of the PCIe upper layer mode or the accelerator link protocol upper layer mode.
    Type: Application
    Filed: October 25, 2018
    Publication date: February 28, 2019
    Applicant: Intel Corporation
    Inventors: Debendra Das Sharma, Michelle C. Jen, Prahladachar Jayaprakash Bharadwaj, Bruce A. Tennant, Mahesh Wagh
  • Publication number: 20190066569
    Abstract: An electronic device is provided. The electronic device includes a display that is configured to show content that includes a plurality of frames. The plurality of frames includes a first frame that is associated with a pre-transition value. The plurality of frames also includes a second frame that is associated with a current frame value that corresponds to a first luminance. Additionally, the electronic device is configured to determine an overdriven current frame value corresponding to a second luminance that is greater than the first luminance. The electronic device is also configured to display the second frame using the overdriven current frame value.
    Type: Application
    Filed: May 1, 2018
    Publication date: February 28, 2019
    Inventors: Yingying Tang, Chaohao Wang, Sheng Zhang, Yunhui Hou, Paolo Sacchetto, Koorosh Aflatooni, Gokhan Avkarogullari, Guy Cote, Mahesh B. Chappalli, Peter F. Holland
  • Publication number: 20190064469
    Abstract: The present disclosure provides an optical fiber cable. The optical fiber cable includes a plurality of optical fibers lying substantially along a longitudinal axis of the optical fiber cable. Further, the optical fiber cable includes a first layer surrounding the plurality of optical fibers. Furthermore, the optical fiber cable includes a second layer surrounding the first layer. Furthermore, the optical fiber cable includes a third layer surrounding the second layer. Moreover, the optical fiber cable includes a fourth layer surrounding the third layer. The first layer is a water blocking tape. The second layer is a buffer tube layer made of polyethylene material and foamed with master batch. The third layer is a water blocking tape. The fourth layer is a sheath made of polyethylene material. Moreover, the fourth layer has a plurality of strength members embedded inside the fourth layer.
    Type: Application
    Filed: August 22, 2018
    Publication date: February 28, 2019
    Inventors: Sravan Kumar, Kishore Sahoo, Venkatesh Murthy, Atul Mishra, Pavan Moturu, Gahininath Shinde, Mahesh Deshpande, Kangabam Tenzing
  • Publication number: 20190065572
    Abstract: A system to perform certain acts to indicate when an order state within an order database has been modified. The acts can include determining that an order lookup comprises an intent to cancel an order line item. The acts can also include running rules to determine whether the order line item is authorized to be cancelled by synchronizing the cancellation and pushing a cancel state asynchronously to the order database cache. When the order line item is not authorized to be cancelled, the acts can detect that the order state has not been modified. The acts can call to a caching interface to asynchronously push a not cancel state to the order state in the order database cache. The acts can publish the not cancel order state from the order database to the order database cache. The acts can display a message that the order state cannot be modified.
    Type: Application
    Filed: October 29, 2018
    Publication date: February 28, 2019
    Applicant: Walmart Apollo, LLC
    Inventors: Madhavan Kandhadai Vasantham, Mahesh Tyagarajan, Sreekanth Sreedhararaj
  • Publication number: 20190066021
    Abstract: Activity data of a set of tasks as a training set is obtained from a list of communication platforms associated with the tasks. For each of the tasks in the training set, a set of activity metrics is compiled according to a set of predetermined activity categories based on the activity data of each task. The activity metrics of all of the tasks in the training set are aggregated based on the activity categories to generate a data matrix. A principal component analysis is performed on the metrics of its covariance matrix to derive an activity dimension vector, where the activity dimension vector represents a distribution pattern of the activity metrics of the tasks. The activity dimension vector can be utilized to determine an activity score of a particular task, where the activity score of a task can be utilized to estimate a probability of completeness of the task.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: Lei Tang, MohamadAli Torkamani, Mahesh Subedi, Kurt Leafstrand
  • Publication number: 20190061398
    Abstract: A digitally printed decorative surfacing material includes a base layer of vulcanized fiber with ink on a top surface thereof, the base layer and the ink defining a printed vulcanized fiber base layer. The digitally printed decorative surfacing material also includes a top coat layer applied to the printed vulcanized fiber base layer to provide scratch resistance and other physical properties. The digitally printed decorative surfacing material is manufactured by providing a base layer of vulcanized fiber, applying ink on a top surface of the base layer thereby defining a printed vulcanized fiber base layer, and applying a top coat layer to the printed vulcanized fiber base layer to provide scratch resistance and other physical properties.
    Type: Application
    Filed: August 23, 2018
    Publication date: February 28, 2019
    Inventors: Arvind S. Karthikeyan, Mahesh Subramanian, Rajesh Ramamurthy
  • Publication number: 20190066801
    Abstract: A sequence of contiguous pages in an erase block in a non-volatile memory device is programmed and erased. Next, all of the pages in the erase block are programmed with data. Then, the data is read back and verified to determine whether there is an error in the data. When there is an error in the data, then the last page in the sequence is identified as being unstable. If there is no error in the data, then the last page in that sequence is identified as being stable. Thus, the recorded information identifies a point of instability in the erase block. Instabilities can be stabilized by performing additional writes to fill the partially filled word line.
    Type: Application
    Filed: August 29, 2018
    Publication date: February 28, 2019
    Inventors: Ajith Kumar BATTAJE, Mahesh Mandya VARDHAMANAIAH, Ashwin NARASIMHA, Sandeep SHARMA
  • Publication number: 20190065364
    Abstract: Methods and apparatus to allocating and/or configuring persistent memory are described. In an embodiment, memory controller logic configures non-volatile memory into a plurality of partitions at least in part based on one or more attributes. One or more volumes (visible to an application or operating system) are formed from one or more of the plurality of partitions. Each of the one or more volumes includes one or more of the plurality of partitions having at least one similar attribute from the one or more attributes. In another embodiment, memory controller logic configures a Non-Volatile Memory (NVM) Dual Inline Memory Module (DIMM) into a persistent region and a volatile region. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: October 31, 2018
    Publication date: February 28, 2019
    Applicant: Intel Corporation
    Inventors: Scott W. Kirvan, Andy M. Rudoff, Mahesh S. Natu, Murugasamy K. Nachimuthu
  • Patent number: 10216748
    Abstract: Techniques to perform segment index lookups are disclosed. In various embodiments, for each of one or more segment index entries included in a first on disk segment index a corresponding set of values is stored in a bloom filter. The bloom filter is used to determine prior to performing an on disk segment lookup of the segment index with respect to a given segment whether each location in the bloom filter that is associated with the given segment has been set to said corresponding set of values. An on disk lookup is performed in parallel of a second on disk segment index that is not included in said subset of on disk segment indexes each of which has associated therewith a corresponding bloom filter.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: February 26, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Ganesh KaruppurRajagopalan, Mahesh Kamat, Subrahmanyam Josyula
  • Patent number: 10217794
    Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a capacitor, where the capacitor includes a first capacitor plate and a second capacitor plate. The first capacitor plate includes a first memory cell, and the second capacitor plate includes a second memory cell. The capacitor is utilized as a functional capacitor in the integrated circuit.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 26, 2019
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Juan Boon Tan, Mahesh Bhatkar, Bhushan Bharat, Wanbing Yi
  • Patent number: 10218686
    Abstract: At a centralized service in a hosted environment, a permission list is established of at least one cipher suite valid for secure connections across multiple network environments. Responsive to the centralized service receiving a request from a socket indicating the socket is negotiating a secure connection with another socket, the centralized service sends the permission list to the socket, wherein the socket negotiates for a mutual cipher suite specified in the permission list with the another socket. Responsive to the centralized service identifying that a particular cipher suite matching the mutual cipher suite used in an ongoing secure session for the socket is revoked, the centralized service notifies the socket that the mutual cipher suite is revoked.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: February 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rinkesh I. Bansal, Shiv S. Jha, Sanjay B. Panchal, Mahesh S. Paradkar, Chintan Thaker
  • Publication number: 20190058633
    Abstract: Techniques described herein may be used to condense a large quantity of Virtual Network Function (VNF) chains (that each correspond to a network service) into a much smaller quantity of VNF records; and extract any of the large quantity of VNF chains from the smaller quantity of network service records. This may be accomplished by assigning a Number (No.) of Services attribute and a Tier attribute into each VNF record. The No. of Services attribute and Tier attribute may enable the VNF records to reference one another such that the largeer quantity of VNF chains may, in effect, be entirely represented by the much smaller quantity of VNF records, thereby conserving storage space, streamlining VNF chain management, and reducing the processing and memory capacity required to search, configure, and deploy virtual network services.
    Type: Application
    Filed: August 17, 2017
    Publication date: February 21, 2019
    Inventors: Mahesh Chapalamadugu, Raju Sharma, Manish Srivastava, Ramesh Nadella
  • Publication number: 20190054914
    Abstract: Systems, methods and apparatus for controlling operation a hybrid powertrain are disclosed that use low power storage and motor/generator components in line haul operations. In one embodiment, a line haul drive cycle includes a low power motor/generator executing a power assistance operation of the hybrid powertrain powered by electricity from a low power storage responsive to a monitoring by a line haul controller of ascensions of the hybrid vehicle at or near a constant speed over an uneven terrain. The line haul drive cycle further includes the low power motor/generator executing a regenerative braking operation of the hybrid powertrain supplying captured electric energy to the low power storage responsive to a monitoring by the line haul controller of descensions of the hybrid vehicle at or near the constant speed over the uneven terrain.
    Type: Application
    Filed: October 22, 2018
    Publication date: February 21, 2019
    Inventors: Martin T. Books, Mahesh Madurai Kumar
  • Publication number: 20190057558
    Abstract: A vehicle tracker (102) and a method for monitoring vehicle's activity are described. The vehicle tracker (102) has a connection port (216) which provides plug and play functionality. The vehicle tracker (102) further has a plurality of sensors (504) for sensing various parameters associated with the vehicle. The sensing results in generation of current parameter values (518) which are processed in relative to plurality of parameter threshold values (520). The parameter threshold values (520) define minimum and maximum range of the parameters. Based on the processing, the vehicle tracker (102) determines anomalies in the operation of the vehicle. Once the anomaly is detected, the vehicle tracker (102) generates an alert and sends it to the concerned person or user.
    Type: Application
    Filed: October 31, 2017
    Publication date: February 21, 2019
    Inventor: Mahesh GUPTA
  • Patent number: 10212089
    Abstract: Disclosed embodiments describe systems and methods for tunneling packets. A tunnel between a first intermediary device and a second intermediary device is established that encapsulates payload packets of transport layer connections between a client and a server. The first intermediary device identifies, from a first packet of a transport layer connection between the client and the server, packet header information. The first intermediary device populates a destination port and a source port of a header of a second packet to be transmitted via the tunnel. The destination port is populated with a predetermined destination port, and the source port includes a first hash of a tuple of the packet header information of the first packet. The second packet includes the first packet as a payload, and is load balanced across paths to the second intermediary device based on a second hash of the header of the second packet.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: February 19, 2019
    Assignee: Citrix Systems, Inc.
    Inventor: Mahesh Narayanan
  • Patent number: 10208014
    Abstract: The invention relates to valproic acid derivatives or pharmaceutical acceptable salts, as well as polymorphs, solvates, enantiomers, stereoisomers and hydrates thereof. The pharmaceutical compositions comprising an effective amount of valproic acid derivatives, and methods for treating or preventing neurological disorders may be formulated for oral, buccal, rectal, topical, transdermal, transmucosal, intravenous, parenteral administration, syrup, or injection. Such compositions may be used to treatment of epilepsy, bipolar disorder, migraine, schizophrenia, depression, Alzheimer's disease, cancer, HIV and familial adenomatous polyposis.
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: February 19, 2019
    Assignee: CELLIX BIO PRIVATE LIMITED
    Inventor: Mahesh Kandula
  • Patent number: 10211177
    Abstract: A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal “coins” having high thermal conductivity into package substrates, or printed circuit boards, and coupling the power device dies onto the metal coins is provided. In one embodiment, the power device die can be attached to an already embedded metal coin in the package substrate or PCB. The power device die can be directly coupled to the embedded metal coin or the power device die can be attached to a metallic interposer which is then bonded to the embedded metal coin. In another embodiment, the die can be attached to the metal coin and then the PCB or package substrate can be assembled to incorporate the copper coin. Active dies are coupled to each other either through wire bonds or other passive components, or using a built-up interconnect.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Scott M. Hayes, Scott D. Marshall, Mahesh K. Shah
  • Publication number: 20190050335
    Abstract: A system or a device can include a processor core comprising one or more hardware processors; a processor memory to cache data; a memory link interface to couple the processor core with one or more attached memory units; and a platform firmware to determine that a device is connected to the processor core across the memory link interface; determine that the device comprises an attached memory; determine a range of at least a portion of the attached memory available for the processor core; map the range of the portion of the attached memory to the processor memory; and wherein the processor core is to use the range of the portion of the attached memory and the processor memory to cache data.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 14, 2019
    Applicant: Intel Corporation
    Inventors: Mahesh S. Natu, Vivekananthan Sanjeepan