Patents by Inventor Mahesh

Mahesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11311206
    Abstract: A guidewire insertion tool configured to measure a length of an anatomic region. The tool can include a housing, a light chamber, and a track at least partially extending through the light chamber. The track is adapted to guide a guidewire as it is advanced through the insertion tool. The tool can also include an optical sensor assembly in optical communication with the light chamber. The optical sensor assembly can include one or more light sources, an optical sensor, and a magnifier. The one or more light sources can be adapted to direct light toward a portion of the guidewire within the track, and the optical sensor can be adapted to receive reflected light from the portion of the guidewire within the tract. A processing unit can analyze data from the optical sensor assembly to determine the length of the anatomic region and output the measurement to a display.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: April 26, 2022
    Inventors: Suman K. Mulumudi, Mahesh S. Mulumudi
  • Publication number: 20220124000
    Abstract: A system may receive enterprise information associated with a client enterprise. The system may select, using an industry analysis model, a set of queries associated with obtaining status information that is associated with a technology profile of the client enterprise. The system may generate client data that is associated with the enterprise information and the status information. The system may convert, using a matrix factorization technique, the client data associated with the client enterprise to a client matrix. The system may convert, using the matrix factorization technique, reference data associated with reference enterprises to a reference matrix. The system may determine, based on a comparison of the client matrix and the reference matrix, a set of scores associated with technology metrics of the technology profile. The system may perform an action associated with the client enterprise based on the set of scores.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 21, 2022
    Inventors: Rajendra Tanniru PRASAD, Bhaskar GHOSH, Aditi KULKARNI, Koushik M. VIJAYARAGHAVAN, Purnima JAGANNATHAN, Parul JAGTAP, Sangeetha JAYARAM, Badrinath PARAMESWAR, Manas MISHRA, Jeffson Felix DSOUZA, Gaurav GOENKA, Gaurav SOOD, Pradeep SENAPATI, Vaijayanthi RAMASWAMY, Ranjith THARAYIL, Mahesh Zurale
  • Publication number: 20220124145
    Abstract: A resource management system is disclosed herein that quickly and dynamically tailors application resource provisioning to real-time application resource consumption. The resource management system may service application requests using resources selected from a pool of servers, the pool of servers including a mixture of virtual server resources and serverless instance resources. The serverless instance resource may comprise software objects programmed using a machine image reflecting one or more states of a virtual application server booted using application-specific program code. Supporting an application using serverless instances enables dynamic scaling of application resources to support real-time application servicing loads.
    Type: Application
    Filed: December 29, 2021
    Publication date: April 21, 2022
    Applicant: Capital One Services, LLC
    Inventors: Nirmal PAREKH, Zachary ABRAHAMSON, Mahesh VEERABATHIRAN, Sathish GAMPA, Steven PEARSON
  • Patent number: 11310539
    Abstract: Techniques for efficiently matching two sets of video items are provided. In on technique, an embedding is generated for each video item in each set. For the first set of video items, multiple groups are generated. The first set of video items may have a relatively little amount of metadata information for them. Each video item in the first set is assigned to one of the groups. Then, for each video item in the second set, one of the groups is selected based on embedding similarity. For each video item in the selected group, an embedding similarity is determined between that video item in the selected group and the video item in the second set. If the embedding similarity is above a certain threshold, then an association is generated for that pair of video items.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: April 19, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Young Jin Yun, Sneha Chaudhari, Mahesh Subhash Joshi, Fares Hedayati, Gungor Polatkan, Gautam Borooah
  • Patent number: 11305989
    Abstract: The present disclosure provides a method of producing hydrogen. The method includes heating a mixture comprising a metal component exhibiting a nanostructured surface, water, and carbon dioxide.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: April 19, 2022
    Assignee: University of Massachusetts
    Inventors: David K. Ryan, T. A. Mahesh Jayamanna
  • Patent number: 11307928
    Abstract: First data is received on a plurality of data lanes of a physical link and a stream signal corresponding to the first data is received on a stream lane identifying a type of the first data. A first instance of an error detection code of a particular type is identified in the first data. Second data is received on at least a portion of the plurality of data lanes and a stream signal corresponding to the second data is received on the stream lane identifying a type of the second data. A second instance of the error detection code of the particular type is identified in the second data. The stream lane is another one of the lanes of the physical link and, in some instance, the type of the second data is different from the type of the first data.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: April 19, 2022
    Assignee: Intel Corporation
    Inventors: Venkatraman Iyer, Robert G. Blankenship, Mahesh Wagh, Zuoguo Wu
  • Patent number: 11308979
    Abstract: A method and apparatus for classifying a spatial environment as open or enclosed are provided. In the method and apparatus, one or more microphones detect ambient sound in a spatial environment and output an audio signal representative of the ambient sound. A processor determines a spatial environment impulse response (SEIR) for the audio signal and extracts one or more features of the SEIR. The processor classifies the spatial environment as open or enclosed based on the one or more features of the SEIR.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: April 19, 2022
    Assignees: STMicroelectronics, Inc., STMicroelectronics International N.V.
    Inventors: Mahesh Chowdhary, Arun Kumar, Ghanapriya Singh, Rajendar Bahl
  • Patent number: 11308018
    Abstract: Systems, methods, and devices can include a first die comprising a first arbitration and multiplexing logic, a first protocol stack associated with a first interconnect protocol, and a second protocol stack associated with a second interconnect protocol. A second die comprising a second arbitration and multiplexing logic. A multilane link connects the first die to the second die. The second arbitration and multiplexing logic can send a request to the first arbitration and multiplexing logic to change a first virtual link state associated with the first protocol stack. The first arbitration and multiplexing logic can receive, from across the multilane link, the request from the first die indicating a request to change the first virtual link state; determine that the first interconnect protocol is ready to change a physical link state; and change the first virtual link state according to the received request while maintaining a second virtual link state.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: April 19, 2022
    Assignee: Intel Corporation
    Inventors: Joon Teik Hor, Ting Lok Song, Mahesh Wagh, Su Wei Lim
  • Patent number: 11310548
    Abstract: Techniques are disclosed for organizing and distributing artifacts generated by processing pipelines for the training or application of machine learning models. An application may subscribe to a playlist of a stream of events and locally store a copy of the playlist. The subscriber may merge locally stored and/or selected events to generate a merged stream of events. The subscriber may then execute the merged event stream including the newly added instance of the event.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 19, 2022
    Assignee: Oracle International Corporation
    Inventors: Simon Chow, Mahesh Siddirampura, Suman Gupta
  • Patent number: 11304960
    Abstract: Provided herein are steroid containing compositions suitable for providing therapeutically effective amounts of at least one steroid to individuals. Also provided herein are compositions comprising testosterone and/or testosterone derivatives suitable for providing therapeutically effective and safe amounts of testosterone over periods of time. Further provided are methods of treating andro- and/or testosterone deficiency in individuals by administering to the individuals compositions described herein.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: April 19, 2022
    Inventors: Chandrashekar Giliyar, Nachiappan Chidambaram, Mahesh V. Patel, Srinivasan Venkateshwaran
  • Publication number: 20220115315
    Abstract: A reticle-stitched integrated circuit is provided. The reticle-stitched integrated circuit extends over a first die area and a second die area of an integrated circuit wafer. While individually the first die area and the second die area are within their respective reticle limits, collectively the first die area and the second die area exceed the reticle limit. A first layer of the reticle-stitched integrated circuit may have communication wires that remain exclusively in only one of the first die area and the second die area. A second layer of the reticle-stitched integrated circuit may have communication wires that overlap the first die area and the second die area, thereby allowing communication between the two die areas and enabling the reticle-stitched integrated circuit to exceed the limit of the reticle.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Atul Maheshwari, Ankireddy Nalamalpu, Mahesh K. Kumashikar, David Parkhouse
  • Publication number: 20220114131
    Abstract: In one embodiment, a device includes: an interface circuit to couple the device to a host via a link, where in a first mode the interface circuit is to be configured as an integrated switch controller and in a second mode the interface circuit is to be configured as a link controller; and a fabric coupled to the interface circuit, the fabric to couple to a plurality of hardware circuits, where the fabric is to be dynamically configured for one of the first mode or the second mode based on link training of the link. Other embodiments are described and claimed.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Lakshminarayana Pappu, David J. Harriman, Ramadass Nagarajan, Mahesh S. Natu
  • Publication number: 20220113350
    Abstract: Systems or methods of the present disclosure may provide a programmable logic device including multiple logic array blocks each having multiple programmable elements. The multiple logic array blocks are arranged in multiple rows that are segmented into multiple segments. The programmable logic device also includes repair circuitry disposed between the multiple segments. The repair circuitry remaps logic within a first segment of the multiple segments when a first logic array block of the multiple logic array blocks has failed. Moreover, the first segment includes the first logic array block.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Dheeraj Subbareddy, Arun Jangity, Ramya Yeluri, Mahesh K. Kumashikar, Atul Maheshwari, Ankireddy Nalamalpu
  • Publication number: 20220113694
    Abstract: Systems or methods of the present disclosure may provide efficient power consumption for programmable logic devices based on reducing guardband voltages. A programmable logic device may include circuit monitors to mimic critical paths of an implemented circuit design and generate timing information based on the critical paths. A controller on the programmable logic device may adjust the voltage guardband based on the timing information.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Mahesh K. Kumashikar, MD Altaf Hossain, Mahesh A. Iyer, Yuet Li, Atul Maheshwari, Ankireddy Nalamalpu
  • Publication number: 20220114316
    Abstract: Systems or methods of the present disclosure may provide for determining a loadline for operation of a programmable logic fabric where the loadline is based at least in part on design configuration details for a design or a configuration rather for generic deployment of the programmable logic device. The loadline may be determined using software modeling for the design or configuration. Additionally or alternatively, the loadline may be determined using runtime testing and sensing of real-world parameters. This determination based on real-world parameters of a deployment of the configuration or design is based on a determination of a step load for the design or configuration.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Yuet Li, Ankireddy Nalamalpu, Atul Maheshwari, MD Altaf Hossain, Mahesh K. Kumashikar, Mahesh A. Iyer
  • Publication number: 20220114125
    Abstract: A processor having a system on a chip (SOC) architecture comprises one or more central processing units (CPUs) comprising multiple cores. An optical Compute Express Link (CXL) communication path incorporating a logical optical CXL protocol stack path transmits and receives an optical bit stream directly after the link layer, bypassing multiple levels of the CXL protocol stack. A CXL interface controller is connected to the one or more CPUs to enable communication between the CPUs and one or more CXL devices over the optical CXL communication path.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 14, 2022
    Inventors: Anshuman THAKUR, Dheeraj SUBBAREDDY, MD Altaf HOSSAIN, Ankireddy NALAMALPU, Mahesh KUMASHIKAR
  • Publication number: 20220116042
    Abstract: Embodiments of the present disclosure are related to dynamically adjusting a timing and/or power model for a programmable logic device. In particular, the present disclosure is directed to adjusting a timing and/or power model of the programmable logic device that operates at a voltage level that is not other than a predefined voltage defined by a voltage library. A system of the present disclosure may interpolate between voltage levels defined by the voltage libraries to generate a new voltage library for the programmable logic device. A timing and/or power model may be generated for the programmable logic device based on the new voltage library and the programmable logic device may be analyzed using the timing and/or power model at the interpolated voltage. The timing and/or power model may be used to generate a bitstream that is used to program the integrated circuit.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Atul Maheshwari, Mahesh Iyer, Mahesh K. Kumashikar, Ian Kuon, Yuet Li, Ankireddy Nalamalpu, Dheeraj Subbareddy
  • Publication number: 20220116041
    Abstract: Systems or methods of the present disclosure may provide efficient electric power consumption of programmable logic devices based on providing different voltage levels to different portions (e.g., voltage islands) of the programmable logic device. For example, the programmable logic device may include circuitry to provide different voltage levels to different voltage islands. The programmable logic device may implement and operate logic configurations with different operating parameters using different operating voltages for efficient electric power consumption.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Mahesh K. Kumashikar, Ankireddy Nalamalpu, MD Altaf Hossain, Dheeraj Subbareddy, Atul Maheshwari, Yuet Li, Mahesh A. Iyer
  • Publication number: 20220114121
    Abstract: A processor package module comprises a substrate, one or more compute die mounted to the substrate, and one or more photonic die mounted to the substrate. The photonic die have N optical I/O links to transmit and receive optical I/O signals using a plurality of virtual optical channels, the N optical I/O links corresponding to different types of I/O interfaces excluding power and ground I/O. The substrate is mounted into a socket that support the power and ground I/O and electrical connections between the one or more compute die and the one or more photonic die.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 14, 2022
    Inventors: Anshuman THAKUR, Dheeraj SUBAREDDY, MD Altaf HOSSAIN, Ankireddy NALAMALPU, Mahesh KUMASHIKAR, Sandeep SANE
  • Publication number: 20220115959
    Abstract: Systems or methods of the present disclosure may provide for operating a programmable fabric including multiple programmable elements organized into a number of power domains that utilize a common voltage within the respective power domains. A current sensor senses a current of the programmable fabric. When the sensed current has crossed a threshold, the programmable fabric changes the number of power domains.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: MD Altaf Hossain, Ankireddy Nalamalpu, Mahesh K. Kumashikar, Dheeraj Subbareddy, Atul Maheshwari, Mahesh A. Iyer