Patents by Inventor Mahesh

Mahesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220113788
    Abstract: The present disclosure describes programmable logic that may be operated in a turbo processing mode to cause an ongoing operation to be completed faster than a scheduled completion time. With at least some of the remaining time to the scheduled completion time, power savings may be realized by operating the programmable logic into a deep sleep mode, where configuration memory associated with the programmable logic may be set to a suitable voltage level as to not cause data loss at lower or zero voltage levels but otherwise realize power savings relative to an amount of power consumed during average processing operations.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Mahesh K. Kumashikar, Ankireddy Nalamalpu, Mahesh A. Iyer, Atul Maheshwari, Yuet Li, MD Altaf Hossain
  • Publication number: 20220113756
    Abstract: Systems or methods of the present disclosure may provide for gradually adjusting a frequency of a clock signal. When transitioning from a configuration mode to a user mode, a clock of an integrated circuit (e.g., a field-programmable gate array or FPGA) may quickly (e.g., instantaneously) switch from a low configuration mode frequency to a high user mode frequency. This rapid increase in clock frequency may cause an inrush current and corresponding current-resistance voltage (IR) drop. To reduce or avoid the inrush current and IR drop, a frequency of the clock may be gradually ramped up from the configuration mode frequency to the user mode frequency.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Atul Maheshwari, Ankireddy Nalamalpu, Mahesh A. Iyer, Mahesh K. Kumashikar
  • Publication number: 20220116045
    Abstract: An integrated circuit device that includes programmable logic circuitry that includes a plurality of regions each configured to operate at different voltage levels. The regions may be separated by level shifters that enable communication between the different voltage level regions. The integrated circuitry may also include software that performs voltage aware placement and routing for a user register-transfer level design, and may direct logic to regions according to voltages defined for the regions.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Mahesh K. Kumashikar, Ankireddy Nalamalpu, MD Altaf Hossain, Atul Maheshwari, Yuet Li, Mahesh A. Iyer
  • Publication number: 20220116038
    Abstract: Systems or methods described herein may relate to latch-independent clock gating techniques to enable or disable an internal clock of an integrated circuit device. A programmable logic device includes a clock gating circuit that receives a clock signal and is latch independent. The clock gating circuit includes gating signal circuitry that generates a gating signal based on the clock signal and an enable signal. The clock gating circuit also includes a logic gate that generates a control signal based on the gating signal. The clock gating circuit also includes gated clock generation circuitry that generates a gated clock signal based on the clock signal and the control signal.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Mahesh K. Kumashikar, MD Altaf Hossain, Yuet Li, Atul Maheshwari, Ankireddy Nalamalpu
  • Patent number: 11300623
    Abstract: This disclosure relates generally to relates to the field of estimation of remaining useful life (RUL) in lithium based batteries, and, more particularly, to estimation of remaining useful life in lithium based batteries based on coupled estimation of a state of charge (SOC) and a state of health (SOH) during charging/discharging in constant current (CC) and constant voltage (CV) modes. The disclosed RUL estimation technique considers the inter-dependency of SOC-SOH and influence of internal-external parameters/factors during the coupled estimation of SOC-SOH. The coupled estimation of SOC and SOH is based on a reduced order physics based modelling technique and considers the influence real time environment obtained using real-time dynamic data obtained by several sensors during the coupled estimation of SOC-SOH.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: April 12, 2022
    Assignee: Tata Consultancy Services Limited
    Inventors: Kaustubh Rajendra Badwekar, Naga Neehar Dingari, Mahesh Mynam, Beena Rai
  • Patent number: 11303877
    Abstract: Methods, systems, and techniques for enhancing use of two-dimensional (2D) video analytics by using depth data. Two-dimensional image data representing an image comprising a first object is obtained, as well as depth data of a portion of the image that includes the first object. The depth data indicates a depth of the first object. An initial 2D classification of the portion of the image is generated using the 2D image data without using the depth data. The initial 2D classification is stored as an approved 2D classification when the initial 2D classification is determined consistent with the depth data. Additionally or alternatively, a confidence level of the initial 2D classification may be adjusted depending on whether the initial 2D classification is determined to be consistent with the depth data, or the depth data may be used with the 2D image data for classification.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: April 12, 2022
    Assignee: AVIGILON CORPORATION
    Inventors: Dharanish Kedarisetti, Pietro Russo, Peter L. Venetianer, Mahesh Saptharishi
  • Patent number: 11301025
    Abstract: A number of frames may be transferred in one frame period to a display panel followed by at least one frame period during which no frame is transferred. During this link idle time, the display panel continues to work on the transferred frames. However, the link and/or graphics processor may be powered down during this time to reduce power consumption.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: April 12, 2022
    Assignee: Intel Corporation
    Inventors: Uma Shankar, Madhav Singh Chauhan, Susanta Bhattacharjee, Animesh Manna, Vandita Kulkarni, Mahesh Kumar
  • Patent number: 11301338
    Abstract: According to one embodiment, in response to a request to revert a virtual machine (VM) to a previously backed up consistent state, whether there are one or more existing consistent states on the VM is determined. In response to determining that there are one or more existing consistent states on the VM, a consolidation or deletion of the one or more existing consistent states is initiated based on a selection to consolidate or to delete the one or more existing consistent states. Whether the consolidation or deletion of the one or more existing consistent states was successful is determined. A recovery operation to revert the VM to the previously backed up consistent state is initiated in response to determining that the consolidation or deletion of the one or more existing consistent states was successful.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: April 12, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Sharath Talkad Srinivasan, Mahesh Rao
  • Patent number: 11303545
    Abstract: A cloud-based service records time-series data of a plurality of metrics from a plurality of tenants. The time-series data comprises a series of measures of a metric at sequential points in time. The time-series data is recorded in database tables in a manner that consumes more resources when the cardinality of the time-series data is high. When the cardinality of the data for the tenant is too high, the tenant is blacklisted and further data for the tenant is not stored. In addition to identifying incoming time-series data by the tenant that produced it, the data may also identify its type. In this case, the cardinality of each type of data may be determined and the types of data may be individually allowed or blacklisted for the tenant.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: April 12, 2022
    Assignee: eBay Inc.
    Inventors: Sudeep Kumar, Mahesh Somani
  • Patent number: 11299513
    Abstract: The present disclosure provides efficient and reliable methods for preparing cyclized peptidic compounds. Advantageously, the currently described methods allow for on-resin cyclization using a limited number of processing steps, while increasing the chemical diversity available for the cyclized peptidic compounds produced.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: April 12, 2022
    Assignee: CIRCLE PHARMA, INC.
    Inventors: Mahesh Ramaseshan, Andrew Bockus
  • Patent number: 11304259
    Abstract: A radio access network (RAN) entity (e.g. an eNodeB) may be configured to facilitate multicast communication in a local private Third Generation Partnership Project (3GPP) network. The RAN entity may receive a user data packet tunneled in an IP message via one of a plurality of downlink tunnels. The RAN entity may select, from a plurality of stored mappings, one of a plurality of multicast group identifiers that is mapped to an identified one of a plurality of downlink tunnel endpoint identifiers that matches a downlink tunnel endpoint identifier from a tunnel header of the IP message, as well as one of a plurality of sets of UE identifiers that is mapped to the selected multicast group identifier. The RAN may send, for each one of the UE identifiers in the selected set of UE identifiers, the user data packet for transmission to a UE associated with the UE identifier.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: April 12, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Ajaykumar Gopalprasad More, Shailender Potharaju, Mahesh Satyanarayana, Vicky Sachdeva, Nitin Prakash Sharma, Rajesh S. Pazhyannur
  • Patent number: 11298365
    Abstract: Disclosed are bioavailable solid state (17-?)-Hydroxy-4-Androsten-3-one esters suitable for pharmaceutical uses and administration to mammals in need of (17-?)-Hydroxy-4-Androsten-3-one.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: April 12, 2022
    Inventors: Mahesh V. Patel, Nachiappan Chidambaram, Satish Kumar Nachaegari, Srinivasan Venkateshwaran, Joel Frank
  • Publication number: 20220105793
    Abstract: An example system includes a vehicle having a prime mover motively coupled to a drive line; a motor/generator selectively coupled to the drive line, and configured to selectively modulate power transfer between an electrical load and the drive line; a battery pack; a DC/DC converter electrically interposed between the motor/generator and the electrical load, and between the battery pack and the electrical load, the DC/DC converter comprising a DC/DC converter housing; and a covering tray positioned over a plurality of batteries of the battery pack, the covering tray comprising a connectivity layer configured to provide electrical connectivity to terminals of the plurality of batteries.
    Type: Application
    Filed: December 17, 2021
    Publication date: April 7, 2022
    Inventors: Nihal Sukhatankar, Mahesh Prabhakar Joshi, Shivaprasad Vithal Goud, Thomas Joseph Stoltz, Matthew Richard Busdiecker, Kaylah J. Berndt, Glenn Clark Fortune, Sarah Elizabeth Behringer, Mark Steven George, Dennis Dukaric, Thomas Alan Genise, Gary Baker, Tissaphem Mirfakhrai, Elizabeth Jane Mercer, Viken Rafi Yeranosian, Lesley Earl Candler, Nicole Downing, Lalit Murlidhar Patil, Suyog Shekhar Kulkami, Sunil Kumar Kunche, Rishabh Kumar Jain, Juan Chen
  • Publication number: 20220108203
    Abstract: In a memory device, a static random access memory (SRAM) circuit includes an array of SRAM cells arranged in rows and columns and configured to store data. The SRAM array is configured to: store a first set of information for a machine learning (ML) process in a lookup table in the SRAM array; and consecutively access, from the lookup table, information from a selected set of the SRAM cells along a row of the SRAM cells. A memory controller circuit is configured to select the set of the SRAM cells based on a second set of information for the ML process.
    Type: Application
    Filed: October 1, 2020
    Publication date: April 7, 2022
    Inventors: Mahesh Madhukar MEHENDALE, Vinod Joseph MENEZES
  • Publication number: 20220109672
    Abstract: At least one aspect of the present disclosure is directed to systems and methods of secure and privacy preserving device classification. A server can maintain a plurality of data records, each including an indication of a request and a known classification value. The server can train a context obfuscation model using each of the plurality of requests and known classification values. The server can train a classification model using resources and category information from a data structure in the memory of the client device. The server can transmit the context obfuscation model to a different plurality of client devices. The server can receive a request for classification including a classification vector and request metadata. The server can determine the classification of the device responsible for the request using the classification model. The server can transmit the device classification to the device responsible for the request.
    Type: Application
    Filed: April 3, 2020
    Publication date: April 7, 2022
    Applicant: GOOGLE LLC
    Inventors: Mahesh KERALAPURA MANJUNATHA, Chiu Wah SO
  • Publication number: 20220105052
    Abstract: The invention relates to the compounds or their pharmaceutically acceptable polymorphs, solvates, enantiomers, stereoisomers, and hydrates thereof. The pharmaceutical compositions comprising an effective amount of compounds of formula I, formula II, formula III, formula IV, formula V, formula VI, formula VII, formula VIII, formula IX, formula X, formula XI, formula XII, formula XIII, formula XIV, and formula XV and the methods for treatment of chronic pain may be formulated for oral, buccal, rectal, topical, transdermal, transmucosal, intravenous, or parenteral administration, or as a lozenge, spray, oral solution, buccal mucosal layer tablet, syrup or injection. Such compositions may be used to treat chronic pain.
    Type: Application
    Filed: December 13, 2021
    Publication date: April 7, 2022
    Applicant: Cellix Bio Private Limited
    Inventor: Mahesh Kandula
  • Patent number: 11294775
    Abstract: Methods and systems for file level prioritization during a data backup operation are described. According to some embodiments, the method includes in response to a request to backup one or more files and for each file, sniffing file information of the file. The method further includes determining a backup critical level of the file based on the file information. The method further includes assigning a weighted value corresponding to the backup critical level of the file. The method further includes using the weighted value to calculate a Euclidean distance of the file to a next consecutive file.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: April 5, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Mahesh Reddy A V, Swaroop Shankar D H, Chetan Battal
  • Patent number: 11296681
    Abstract: A fast Mux-D scan flip-flop is provided, which bypasses a scan multiplexer to a master keeper side path, removing delay overhead of a traditional Mux-D scan topology. The design is compatible with simple scan methodology of Mux-D scan, while preserving smaller area and small number of inputs/outputs. Since scan Mux is not in the forward critical path, circuit topology has similar high performance as level-sensitive scan flip-flop and can be easily converted into bare pass-gate version. The new fast Mux-D scan flip-flop combines the advantages of the conventional LSSD and Mux-D scan flip-flop, without the disadvantages of each.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: April 5, 2022
    Assignee: Intel Corporation
    Inventors: Amit Agarwal, Steven Hsu, Simeon Realov, Mahesh Kumashikar, Ram Krishnamurthy
  • Patent number: 11294852
    Abstract: Methods and apparatuses relating to hardware processors with multiple interconnected dies are described. In one embodiment, a hardware processor includes a plurality of physically separate dies, and an interconnect to electrically couple the plurality of physically separate dies together. In another embodiment, a method to create a hardware processor includes providing a plurality of physically separate dies, and electrically coupling the plurality of physically separate dies together with an interconnect.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 5, 2022
    Assignee: Intel Corporation
    Inventors: Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati, Tejpal Singh, Ankush Varma, Mahesh K. Kumashikar, Srikanth Nimmagadda, Carleton L. Molnar, Vedaraman Geetha, Jeffrey D. Chamberlain, William R. Halleck, George Z. Chrysos, John R. Ayers, Dheeraj R. Subbareddy
  • Patent number: 11296889
    Abstract: Confidential, secret data may be shared via one or more blockchains. Mortgage applications, medical records, financial records, and other electronic documents often contain social security numbers, names, addresses, account information, and other personal data. A secret sharing algorithm is applied to any secret data to generate shares. The shares may then be integrated or written to one or more blockchains for distribution.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: April 5, 2022
    Assignee: Inveniam Capital Partners, Inc.
    Inventors: Paul Snow, Brian Deery, Mahesh Paolini-Subramanya