Abstract: A semiconductor non-volatile memory, wherein a memory cell can be read accurately without having to discharge bit lines before the read operation. When reading a memory cell, the first bit line connected to the drain thereof is connected to the voltage source to receive a predetermined voltage, and the second bit line connected to the source thereof is connected to the sense amplifier. In this process, the third bit line in the vicinity of the second bit line is connected to the ground power supply. Thus, since the third bit line in the vicinity of the second bit line being sensed is forcibly set to the ground level, no charge flows in therefrom, thus preventing a current flowing into the second bit line.

Abstract: A conductive film of thickness of from 3 nm to 50 nm made from a metal or ally formed on a substrate, wherein the ratio of density thereof to bulk density of the metal or alloy is from 0.2 to 0.5, and the ratio of resistivity thereof to bulk resistivity of the metal or alloy is from 100 to 100000.

Abstract: An air conditioner that reverses and appropriately controls the stream of refrigerant between paths of a flow divider corresponding to an air conditioner heat exchanger having a plurality of paths to increase the heat exchange capacity is provided. The air conditioner includes a compressor, a four-way valve, an outdoor heat exchanger, a restriction device, and an indoor heat exchanger including a plurality of paths. These members are sequentially connected by a refrigerant pipe to form a refrigerant circuit. A flow divider including a plurality of paths is arranged between the indoor heat exchanger, which includes the plurality of paths, and the restriction device. A refrigerant flow amount regulation valve is provided for each of the plurality of paths in the flow divider.

Abstract: A refrigerant flow dividing apparatus of a heat exchanger for refrigerating apparatus is provided with a minimal number of refrigerant flow regulating valves and suppresses increase in the size and costs of the apparatus. Refrigerant is supplied to paths of the heat exchanger for refrigerating apparatus including a heat exchanger for reheat dehumidification via a refrigerant flow divider provided with paths. Each path of the refrigerant flow divider is provided with a refrigerant flow regulating valve, and a predetermined one of the refrigerant flow regulating valves of the paths also functions as a reheat dehumidification valve.

Abstract: An electron-emitting device comprises a pair of opposing electrodes formed on a substrate, an electroconductive film having a fissure arranged between the pair of electrodes, and at least a film having a gap and containing carbon as a main ingredient, arranged at an end portion of the electroconductive film facing the fissure. The fissure is a region of 95% or more of a length in the fissure direction, has a width of from 60 nm or more to 800 nm or less, and has a difference of 300 nm or less between a maximum value and a minimum value of the width, thereby providing high withstanding voltage without forming branched fissure.

Abstract: Based on a result of detection taken by the high-low pressure difference detection means (93, 97) for detecting a difference between a high and a low pressure of a refrigeration cycle, an estimate of whether there is leakage of refrigerant in an expansion valve (52) is made. Based on the result detected by the high-low pressure difference detection means (93, 97), a control means (81) sets a reference temperature (T3) to a value corresponding to the degree of refrigerant leakage in the expansion valve (52).

Abstract: Even when the number of rewrite operations varies among erase unit areas, the number of rewrite operations is improved for all of the erase unit areas. A flash EEPROM 100 comprises a trimming value storing area 130 of storing a trimming value corresponding to each erase unit area 120 included in a memory cell array 110. When an erase operation and a write operation are performed with respect to a certain erase unit area 120, a regulator circuit 150 converts a voltage boosted by a booster circuit 140 to a level corresponding to the trimming value for the erase unit area 120. When a read determination circuit 170 detects an abnormality as the number of rewrite operations is increased, the trimming value is updated to a value which causes the regulator circuit 150 to increase the output voltage.

Abstract: A plurality of memory cells are connected between two adjacent sub-bit lines. A row decoder 3 selects a word line connected to a memory cell to be read. A selection line selection circuit 2 and a column selection circuit 5 include first and second selection portions that perform selection operations simultaneously and independently. The first selection portion selects a first pair of main bit lines and selection lines in order to select the memory cell to be read. The second selection portion selects a second pair of main bit lines that is different from the first pair of main bit lines and selection lines for selecting a sector different from that for the memory cell to be read in order to select a line to be used for reading a reference voltage.

Abstract: Even when the number of rewrite operations varies among erase unit areas, the number of rewrite operations is improved for all of the erase unit areas. A flash EEPROM 100 comprises a trimming value storing area 130 of storing a trimming value corresponding to each erase unit area 120 included in a memory cell array 110. When an erase operation and a write operation are performed with respect to a certain erase unit area 120, a regulator circuit 150 converts a voltage boosted by a booster circuit 140 to a level corresponding to the trimming value for the erase unit area 120. When a read determination circuit 170 detects an abnormality as the number of rewrite operations is increased, the trimming value is updated to a value which causes the regulator circuit 150 to increase the output voltage.

Abstract: The invention provides a CMOS integrated circuit capable of carrying out an operation at a comparatively high supply voltage, comprising a first MOS type transistor having a drain profile to come in contact with a gate through a low concentration region having an impurity concentration which is equal to or lower than a predetermined concentration corresponding to the supply voltage at a drain end, and a second MOS type transistor and transfer gate having the same polarity which is connected to a gate of the first MOS type transistor, wherein a gate voltage is applied to the gate of the first MOS type transistor through the second MOS type transistor and transfer gate to which a predetermined potential (a shielding voltage) is applied.

Abstract: An electron-emitting device comprises a pair of opposing electrodes formed on a substrate, an electroconductive film having a fissure arranged between the pair of electrodes, and at least a film having a gap and containing carbon as a main ingredient, arranged at an end portion of the electroconductive film facing the fissure. The fissure is a region of 95% or more of a length in the fissure direction, has a width of from 60 nm or more to 800 nm or less, and has a difference of 300 nm or less between a maximum value and a minimum value of the width, thereby providing high withstanding voltage without forming branched fissure.

Abstract: A method for producing a pattern of an electroconductive member, comprises: a step of forming on a substrate surface a resin film containing acid group; a step of incorporating into the resin film a liquid containing a metal complex salt and having a pH value of 5 to 7; and a step of baking the resin film to form the electroconductive member from a metal component incorporated into the resin film, thereby improving uniformity and speed of an adsorbing of the metal component into the resin, and providing uniform characteristics of the electroconductive pattern.

Abstract: An electron-emitting device comprises a pair of opposing electrodes formed on a substrate, an electroconductive film having a fissure arranged between the pair of electrodes, and at least a film having a gap and containing carbon as a main ingredient, arranged at an end portion of the electroconductive film facing the fissure. The fissure is a region of 95% or more of a length in the fissure direction, has a width of from 60 nm or more to 800 nm or less, and has a difference of 300 nm or less between a maximum value and a minimum value of the width, thereby providing high withstanding voltage without forming branched fissure.

Abstract: An oscillation circuit 10 outputs oscillation clocks 100 different in phase, and a four-phase clock generation circuit 20 generates a four-phase clock 200 based on a difference in phase between the oscillation clocks 100. A four-phase clock transfer control circuit 50 controls whether to transfer the four-phase clock 200 in accordance with a signal CP_EN, and a pump circuit 60 generates a boosted voltage based on the transferred four-phase clock. A time period of delay Tos between clocks included in the four-phase clock 200 is generated based on the difference in phase between the oscillation clocks 100, and therefore always in a proportional relationship with a cycle (Tosc) of the oscillation clocks 100. Accordingly, even if the cycle (Tosc) is changed due to operating conditions, and therefore a time period of charge transfer (Ttr) can be uniquely determined.

Abstract: A plurality of memory cells are connected between two adjacent sub-bit lines. A row decoder 3 selects a word line connected to a memory cell to be read. A selection line selection circuit 2 and a column selection circuit 5 include first and second selection portions that perform selection operations simultaneously and independently. The first selection portion selects a first pair of main bit lines and selection lines in order to select the memory cell to be read. The second selection portion selects a second pair of main bit lines that is different from the first pair of main bit lines and selection lines for selecting a sector different from that for the memory cell to be read in order to select a line to be used for reading a reference voltage.

Abstract: A process for preparing a single crystal silicon in accordance with the Czochralski method, is provided. More specifically, by quickly reducing the pull rate at least once during the growth of the neck portion of the single crystal ingot, in order to change the melt/solid interface shape from a concave to a convex shape, the present process enables zero dislocation growth to be achieved in a large diameter neck within a comparably short neck length, such that large diameter ingots of substantial weight can be produced safely and at a high throughput.

Abstract: In a dynamic sensing-type nonvolatile semiconductor memory device of the invention, which employs a differential sense amplifier circuit, a memory cell is connected to a bit line using a word line and a reference memory cell is connected to an anti-bit line using a reference word line, the potential difference between the bit line and the anti-bit line is amplified by a sense amplifier, and when reading the data of the memory cell, at the start of data readout the bit lines are both precharged to a predetermined potential by a precharge circuit, and during and after precharging or only after precharging is finished, an identical amount of current is supplied to the bit line and the anti-bit line by a bit line current supply circuit.

Abstract: The booster circuit includes a voltage reset circuit in a booster cell. The voltage reset circuit receives a gate voltage reset signal via a reset terminal of the booster circuit. The reset signal is asserted during abrupt change of the boosted voltage from high to low or during a restart after an instantaneous power interruption. The voltage reset circuit grounds the gate terminal of a charge-transfer transistor during the assertion of the gate voltage reset signal, to reset the gate potential of the charge-transfer transistor to the ground potential. By this resetting, normal boost operation is secured even in an event that a switching transistor remains cut-off because the amplitude of a boost clock signal is small due to use of low-voltage power supply.

Abstract: It is an object of the present invention to manufacture a conductive film with a small shape fluctuation at a high stability and a high reproducibility by using the ink jet system. It is another object of the present invention to provide an electron-emitting device having a preferable electron-emitting characteristic, an electron source in which a plurality of preferable electron-emitting devices having a high uniformity are arranged, and an image-forming apparatus having a high uniformity and a preferable display quality. It is still another object of the present invention to provide inexpensive electron-emitting device, electron source, and image-forming apparatus at a high yield.

Abstract: A Czochralski method of producing a single crystal silicon ingot having a uniform thermal history. In the process, the power supplied to the side heater is decreased during the growth of a latter portion of main body, and optionally the end-cone, of the ingot, while power supplied to a bottom heater is gradually increased during growth the same portion. The present process enables a substantial portion of an ingot to be obtained yielding wafers having fewer light point defects in excess of about 0.2 microns and improved gate oxide integrity.