Patents by Inventor Makoto Kojima

Makoto Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010021451
    Abstract: A pressure-sensitive adhesive composition, wherein the storage elastic modulus [G′] at room temperature is at least 2×106 dyne/cm2 and the adhesive strength at room temperature is 1 kg/20 mm width or higher.
    Type: Application
    Filed: January 31, 2001
    Publication date: September 13, 2001
    Inventors: Yasuyuki Tokunaga, Masahiko Ando, Takeshi Yamanaka, Waka Hikosaka, Makoto Kojima, Shin-Ichi Kouno, Hiroaki Mashiko, Hiroshi Wada, Hiroshi Yamamoto, Yoshikazu Soeda, Naoki Matsuoka, Katsuya Kume, Mitsuo Kuramoto
  • Patent number: 6272049
    Abstract: In order to read a data stored in a given memory cell, two dummy cells are provided, one of which is set to an erase state and the other to a program state. The threshold voltage of each cell attained in the program state is higher than the threshold voltage attained in the erase state and is lower than a maximum read voltage applied between a control gate and a source. Bit lines connected to the drains of the dummy cells are mutually connected through an equalizing switch for generating a reference potential at an intermediate level in a read cycle. The potential of a bit line connected to the drain of the memory cell and the generated reference potential are compared by a differential sense amplifier, so as to sense the state of the memory cell. In this manner, the invention provides a flash memory in which a program operation completed in short time and an accurate read operation can be consistent with each other.
    Type: Grant
    Filed: May 12, 2000
    Date of Patent: August 7, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takafumi Maruyama, Makoto Kojima
  • Publication number: 20010003507
    Abstract: To read data stored on a memory cell transistor with a floating gate, a flash memory uses: a single-gate reference transistor; a differential sense amplifier; and a gate voltage generator for generating a gate voltage for the reference transistor. The gate voltage generator includes: a dummy cell transistor, which has the same structure as the memory cell transistor and has been turned ON; a current mirror for creating a current proportional to a drain current of the dummy cell transistor; an NMOS transistor for generating a gate voltage for the reference transistor in accordance with the current created by the current mirror; and a voltage hold circuit for holding the gate voltage generated. Even if temperature or fabricating process conditions have changed, this construction ensures accurate and high-speed read operation.
    Type: Application
    Filed: December 7, 2000
    Publication date: June 14, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takafumi Maruyama, Makoto Kojima
  • Patent number: 6243301
    Abstract: Redundancy function with excellent repair efficiency is implemented by specifying a single address for a semiconductor memory device of a multi-bit accessing type. A memory array includes a plurality of memory segments associated with respective addresses. Each memory segment is coupled to a data bus multiplexer via an associated first data bus. A sub-data bus, which includes a larger number of signal lines than that of those included in the first data bus, is provided for each memory segment. These signal lines are connected to associated bit lines in each memory sub-array. A data bus switching circuit is associated with each memory segment to electrically connect the respective signal lines included in the first data bus to the counterparts included in the sub-data bus to meet a predetermined relationship by cutting one of fuses off. In this manner, redundancy function with excellent repair efficiency is implementable on a bit-by-bit basis, not on an address basis.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: June 5, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masashi Agata, Naoki Kuroda, Makoto Kojima
  • Patent number: 6229382
    Abstract: The MOS semiconductor integrated circuit of the present invention includes: a plurality of serial transistors serially and sequentially connected to the drain of an output transistor of a current mirror circuit receiving input current; a plurality of reference voltage transistors, each connected serially between the gate of an associated one of the serial transistors and ground; PMOS transistors each supplying constant current to an associated one of the reference voltage transistors; an input transistor of an output current mirror circuit, which is connected to the drain of one of the serial transistors that is closest to the input transistor of the output current mirror circuit; and an output transistor of the output current mirror circuit for supplying output current.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: May 8, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Makoto Kojima
  • Patent number: 6218006
    Abstract: A pressure-sensitive adhesive composition, wherein the storage elastic modulus [G′] at room temperature is at least 2×106 dyne/cm2 and the adhesive strength at room temperature is 1 kg/20 mm width or higher. Preferably, a pressure-sensitive adhesive composition comprising a polymer having a polycarbonate structure having a repeating unit represented by the following formula wherein R represents a straight chain or branched hydrocarbon group having from 2 to 20 carbon atoms, a pressure-sensitive adhesive sheet, a sealing material, a reinforcing sheet, and a pressure-sensitive sheet for printing, each having the pressure-sensitive adhesive composition.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: April 17, 2001
    Assignee: Nitto Denko Corporation
    Inventors: Yasuyuki Tokunaga, Masahiko Ando, Takeshi Yamanaka, Waka Hikosaka, Makoto Kojima, Shin-ichi Kouno, Hiroaki Mashiko, Hiroshi Wada, Hiroshi Yamamoto, Yoshikazu Soeda, Naoki Matsuoka, Katsuya Kume, Mitsuo Kuramoto
  • Patent number: 6188608
    Abstract: A nonvolatile semiconductor memory device includes: first and second memory cell blocks, each of the first and second memory cell blocks including at least one memory cell connected to a first word line; third and fourth memory cell blocks, each of the third and fourth memory cell blocks including at least one memory cell connected to a second word line; and an amplifier for inputting or outputting data through first and second bit lines. Each said memory cell block includes at least one dummy cell.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: February 13, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takafumi Maruyama, Makoto Kojima
  • Patent number: 6174626
    Abstract: An ion-conducting polyelectrolyte moldable and flexible even at low temperatures is disclosed, comprising a (meth)acrylic polymer and an ionic salt, the (meth)acrylic polymer comprising (A) 20 to 100 parts by weight of a (meth)acrylic monomer represented by formula (I): CH2═C(R1)COO—R2—R3  (I) wherein R1 represents a hydrogen atom or a methyl group; R2 represents an alkyl group having 3 to 12 carbon atoms; and R3 represents (XR4)nXR5, wherein X represents —O— or —S—; R4 represents an alkyl group having 1 to 4 carbon atoms; n represents 0 or an integer of 1 to 20; and R5 represents a hydrogen atom, a methyl group or an ethyl group, (B) 0 to 80 parts by weight of a (meth)acrylic monomer represented by formula (II): CH2═C(R1)COO—R6  (II) wherein R1 represents a hydrogen atom or a methyl group; and R6 represents an alkyl group having 2 to 12 carbon atoms, and (C) 0 to 30 parts by weight, per 100 parts by weight of the total amount of comp
    Type: Grant
    Filed: January 14, 1998
    Date of Patent: January 16, 2001
    Assignee: Nitto Denko Corporation
    Inventors: Makoto Kojima, Tetsuo Omata
  • Patent number: 6069824
    Abstract: A plurality of pull-down transistors, each grounding a source line at discrete positions, are provided in order that current, flowing from bit lines through some of nonvolatile memory cells having lower threshold voltages into the source line, is not concentrated at a single pull-down transistor in a source line driver during a read cycle.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: May 30, 2000
    Assignees: Matsushita Electric Industrial Co., Ltd., Halo LSI Design and Device Technologies, Inc.
    Inventors: Makoto Kojima, Tomoko Ogura
  • Patent number: 6064188
    Abstract: An internal step-down converter includes a potential difference detector and a cross-coupled amplifier. The potential difference detector detects and amplifies a potential difference between a reference voltage VREF and an internally-stepped-down supply voltage VINT. The cross-coupled amplifier receives the amplified output VDRV2 of the potential difference detector and the output VDRV of a current-mirror differential amplifier, which is applied as a control voltage to a driver implemented as a p-channel MOSFET. The cross-coupled amplifier regulates the amplitude of the control voltage VDRV substantially at the potential difference .vertline.VDD-VSS.vertline. between the external supply voltages. As a result, the load-current-handling capability of the driver can be considerably increased. While the load current ILOAD is relatively small, a control signal generator deactivates the potential difference detector and the cross-coupled amplifier to prevent the current from being consumed in vain.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: May 16, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Takashima, Makoto Kojima
  • Patent number: 5901096
    Abstract: There is provided disconnecting circuit for disconnecting an internal boosted power supply from a word line. At the time of testing, one of a plurality of word lines is selected therefrom and data on the "Low" level is written in a plurality of memory cells connected to the selected word line. Thereafter, the disconnecting circuit is activated such that the selected word line has high impedance. When there is a leakage current flowing from the word line due to a defect, the potential on the word line lowers rapidly after the word line is disconnected from the internal boosted power supply. Consequently, the data cannot be written properly in the memory cells any more. After a specified period of time has elapsed, data on the "High" level is written sequentially in the memory cells connected to the selected word line. Then, the same word line is selected again such that the data written in the memory cells connected to the word line is read therefrom.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: May 4, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshihiro Inokuchi, Makoto Kojima
  • Patent number: 5877836
    Abstract: A liquid crystal device is constituted by a pair of oppositely disposed substrates having opposing inner surfaces and opposing electrodes thereon, and a chiral smectic liquid crystal assuming two stable states disposed between the opposing electrodes. The opposing inner surfaces of the pair of substrates have been subjected to an aligning treatment such that the liquid crystal placed in one of the two stable states moves under application of an electric field in a direction identical to one in which the liquid crystal placed in the other of the two stable states moves under the application of the electric field. The liquid crystal device has an effective optical modulation region and a peripheral region outside the effective optical modulation region, wherein the effective optical modulation region and the photosensitive member have been subjected to different aligning treatments.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: March 2, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventors: Seishi Miura, Hideaki Takao, Masanobu Asaoka, Bunryo Sato, Tadashi Mihara, Yasuto Kodera, Makoto Kojima, Masamichi Saito, Sunao Mori, Kazuhiro Aoyama
  • Patent number: 5852119
    Abstract: Disclosed are a pressure-sensitive adhesive composition comprising a reactive mixture of a relatively low molecular weight acrylic prepolymer containing highly reactive hydroxyl groups in the molecule thereof which is obtained by copolymerizing two alkyl acrylate monomers satisfying a specific relationship and, as a chain extender, a polyfunctional isocyanate mainly exhibiting bifunctionality; a pressure-sensitive adhesive composition comprising the above reactive mixture and a relatively high molecular weight polymer component; and pressure-sensitive adhesive sheets having a pressure-sensitive adhesive layer comprising those pressure-sensitive adhesive compositions. Because the molecular chain of the acrylic prepolymer is extended efficiently, the amount of an organic solvent required for viscosity adjustment can be decreased.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: December 22, 1998
    Assignee: Nitto Denko Corporation
    Inventors: Makoto Kojima, Hironori Tamai, Yoshihide Kawaguchi, Yoshikazu Tanaka, Katsuhide Kojima
  • Patent number: 5835181
    Abstract: A liquid crystal device is produced through the steps of: a) disposing a pair of substrates opposite to each other so as to form a cell between the substrates while leaving a first aperture and a second aperture for communication with an exterior and forming an effective optical modulation region between the first and second apertures, b) heating a liquid crystal material for filling the cell, and c) filling the cell with the liquid crystal material by injecting the liquid crystal material through the first aperture under a pressure difference held between the first and second apertures and, after a prescribed period, allowing the liquid crystal material to be discharged out of the second aperture. In the step c), the first aperture, the second aperture and the effective optical modulation region of the cell may preferably receive external pressures P1, P2 and P3, respectively, satisfying P1>P2 and -1 kg.f/cm.sup.2 .ltoreq.P1-P3.ltoreq.0.5 kg.f/cm.sup.2.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: November 10, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsutoshi Nakamura, Makoto Kojima, Masaki Sunaga
  • Patent number: 5835248
    Abstract: A ferroelectric liquid crystal device of a cell structure having a suppressed increase of cell thickness along a cell side is constituted by disposing a ferroelectric liquid crystal between a pair of electrode plates each sequentially provided with an electrode, an insulating film and an alignment film on a substrate. The alignment film is provided with a surface unevenness for suppressing a liquid crystal movement causing the increase in cell thickness. The surface unevenness is provided to the alignment film directly or to the insulating film below the alignment film, e.g., by wet forming the relevant film by using at least two solvents having different boiling points or dispersing fine particles within the relevant film, optionally followed by removal of the fine particles.
    Type: Grant
    Filed: September 28, 1994
    Date of Patent: November 10, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yukio Hanyu, Kenji Onuma, Yoshio Hotta, Osamu Taniguchi, Hideaki Takao, Masanobu Asaoka, Tadashi Mihara, Yasuto Kodera, Makoto Kojima, Katsutoshi Nakamura, Takatsugu Wada
  • Patent number: 5831705
    Abstract: A liquid crystal device is constituted by a pair of oppositely disposed substrates including a first substrate having a uniaxial alignment characteristic and a second substrate having a non-uniaxial alignment characteristic and a liquid crystal disposed between the first and second substrates. The first and second substrates are controlled to have surface potentials providing a difference therebetween of less than 50 mV in terms of an absolute value at their liquid crystal-contacting surfaces. As a result, the liquid crystal device is provided with an improved symmetry of switching threshold while retaining a good liquid crystal alignment characteristic.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: November 3, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shuzo Kaneko, Ihachiro Gofuku, Etsuro Kishi, Makoto Kojima, Katsutoshi Nakamura
  • Patent number: 5815230
    Abstract: A liquid crystal device is constituted by a pair of oppositely disposed substrates having opposing inner surfaces and opposing electrodes thereon, and a chiral smectic liquid crystal assuming two stable states disposed between the opposing electrodes. The opposing inner surfaces of the pair of substrates have been subjected to an aligning treatment such that the liquid crystal placed in one of the two stable states moves under application of an electric field in a direction identical to one in which the liquid crystal placed in the other of the two stable states moves under the application of the electric field. The liquid crystal device has an effective optical modulation region and a peripheral region outside the effective optical modulation region, wherein the effective optical modulation region and the photosensitive member have been subjected to different aligning treatments.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: September 29, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Seishi Miura, Hideaki Takao, Masanobu Asaoka, Bunryo Sato, Tadashi Mihara, Yasuto Kodera, Makoto Kojima, Masamichi Saito, Sunao Mori, Kazuhiro Aoyama
  • Patent number: 5764327
    Abstract: A ferroelectric liquid crystal device of a cell structure having a suppressed increase of cell thickness along a cell side is constituted by disposing a ferroelectric liquid crystal between a pair of electrode plates each sequentially provided with an electrode, an insulating film and an alignment film on a substrate. The alignment film is provided with a surface unevenness for suppressing a liquid crystal movement causing the increase in cell thickness. The surface unevenness is provided to the alignment film directly or to the insulating film below the alignment film, e.g., by wet forming the relevant film by using at least two solvents having different boiling points or dispersing fine particles within the relevant film, optionally followed by removal of the fine particles.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: June 9, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yukio Hanyu, Kenji Onuma, Yoshio Hotta, Osamu Taniguchi, Hideaki Takao, Masanobu Asaoka, Tadashi Mihara, Yasuto Kodera, Makoto Kojima, Katsutoshi Nakamura, Takatsugu Wada
  • Patent number: 5734456
    Abstract: A ferroelectric liquid crystal device comprises a ferroelectric liquid crystal held between a pair of parallel substrates each provided with transparent electrodes formed thereon, and color filters formed between the transparent electrode and the substrate at least on one side. In the device, a difference in surface roughness between the color filters for all the pixels is less than 0.1 .mu.m. With this device, the occurrence of orientation defects is prevented and excellent characteristics specific to a ferroelectric liquid crystal are sufficiently developed.
    Type: Grant
    Filed: March 25, 1994
    Date of Patent: March 31, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Takao, Masanobu Asaoka, Makoto Kojima
  • Patent number: 5714209
    Abstract: A liquid crystal device is constituted by disposing a liquid crystal between a pair of substrates; at least one of which has thereon an alignment film comprising a polyimide formed by reaction between at least two acid components including an acid component of formula (1) below and at least one component of formula (2) or (3) below and a diamine component of formula (4) below: ##STR1## wherein R.sub.1 and R.sub.2 independently denote an alkyl group.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: February 3, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanobu Asaoka, Hideaki Takao, Makoto Kojima