Patents by Inventor Makoto Yasuda
Makoto Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9973444Abstract: When relaying a frame received at a MCLAG port to a bridge port, a MCLAG identifier adding unit adds a MCLAG identifier to the frame. When an encapsulated frame to which a MCLAG identifier has been added is received at the bridge port and the encapsulation of the frame, is performed by a peer device, a learning information control unit does not learn an encapsulation address contained in the encapsulated frame. More specifically, the learning information control unit learns a source customer address contained in the frame in association with the MCLAG identifier added to the frame to the address table, but does not learn a source encapsulation address.Type: GrantFiled: August 28, 2015Date of Patent: May 15, 2018Assignee: Hitachi Metals, Ltd.Inventor: Makoto Yasuda
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Patent number: 9973349Abstract: An encapsulation address of a first switching device is set so as to be different only in a mask bit in comparison with that of a second switching device. A learning information control unit of a third switching device does not learn the correspondence relation between a source customer address and a source encapsulation address in a first case and a second case. The first case corresponds to a case in which an encapsulated frame is received at an upper-link port and an encapsulation address corresponding to the source customer address is acquired from an address table. The second case corresponds to a case in which a difference between the source encapsulation address and the encapsulation address acquired from the address table lies only in the mask bit.Type: GrantFiled: November 25, 2015Date of Patent: May 15, 2018Assignee: Hitachi Metals, LtdInventor: Makoto Yasuda
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Publication number: 20170309561Abstract: There is provided a semiconductor device including a memory region and a logic region. The memory region includes a transistor (memory transistor) that stores information by accumulating charge in a sidewall insulating film. The width of the sidewall insulating film of the memory transistor included in the memory region is made larger than the width of a sidewall insulating film of a transistor (logic transistor) included in the logic region.Type: ApplicationFiled: July 12, 2017Publication date: October 26, 2017Applicant: MIE FUJITSU SEMICONDUCTOR LIMITEDInventors: Taiji Ema, Makoto Yasuda, Kazuhiro Mizutani
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Patent number: 9794194Abstract: A MCLAG table retains a first port in association with a first identifier. A port control unit controls a first port group to a transmission/reception permitted state when the first port group is set to active, and controls the first port group to a transmission/reception prohibited state when the first port group is set to standby. A relay processing unit relays a frame containing the first identifier as a destination port to the first port group when the first port group is controlled to the transmission/reception permitted state and relays the same to a bridge port when the first port group is controlled to the transmission/reception prohibited state. When the first port group is controlled to the transmission/reception prohibited state, a transmission stop instructing unit instructs a peer device to stop frame transmission to the first port group.Type: GrantFiled: April 6, 2015Date of Patent: October 17, 2017Assignee: Hitachi Metals, Ltd.Inventors: Makoto Yasuda, Shigeru Tsubota
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Patent number: 9773733Abstract: There is provided a semiconductor device including a memory region and a logic region. The memory region includes a transistor (memory transistor) that stores information by accumulating charge in a sidewall insulating film. The width of the sidewall insulating film of the memory transistor included in the memory region is made larger than the width of a sidewall insulating film of a transistor (logic transistor) included in the logic region.Type: GrantFiled: March 10, 2016Date of Patent: September 26, 2017Assignee: MIE FUJITSU SEMICONDUCTOR LIMITEDInventors: Taiji Ema, Makoto Yasuda, Kazuhiro Mizutani
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Patent number: 9762510Abstract: When a frame is received at a first port, a MCLAG learning frame transmitting unit generates a MCLAG learning frame containing a source MAC address of the frame and transmits it from a bridge port to a peer device. When the MCLAG learning frame is received and the MCLAG learning frame contains a source MAC address and does not contain a MCLAG identifier, a MCLAG learning frame receiving unit learns a second correspondence relation between a port identifier of the bridge port and the source MAC address to an address table.Type: GrantFiled: August 28, 2015Date of Patent: September 12, 2017Assignee: Hitachi Metals, Ltd.Inventor: Makoto Yasuda
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Patent number: 9748231Abstract: A semiconductor device includes: a substrate; a first active region formed in the substrate and that includes a first region that has a first width and a second region including a second width larger than the first width and extended in a first direction; a second active region formed in the substrate and extended in parallel to the second region of the first active region; and an element isolation insulating film formed in the substrate and that partitions the first active region and the second active region, respectively, wherein the second region of the first active region or the second active region includes a depressed part depressed in a second direction that is perpendicular to the first direction in a plan view.Type: GrantFiled: June 24, 2014Date of Patent: August 29, 2017Assignee: FUJITSU SEMICONDUCTOR LIMITEDInventors: Makoto Yasuda, Taiji Ema, Mitsuaki Hori, Kazushi Fujita
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Publication number: 20170243934Abstract: A semiconductor device includes as a resistance element a first polycrystalline silicon and a second polycrystalline silicon containing impurities, such as boron, of the same kind and having different widths. The first polycrystalline silicon contains the impurities at a concentration CX. The second polycrystalline silicon has a width larger than a width of the first polycrystalline silicon and contains the impurities of the same kind at a concentration CY lower than the concentration CX. A sign of a temperature coefficient of resistance (TCR) of the first polycrystalline silicon changes at the concentration CX. A sign of a TCR of the second polycrystalline silicon changes at the concentration CY.Type: ApplicationFiled: January 10, 2017Publication date: August 24, 2017Inventors: Taiji Ema, Nobuhiro Misawa, Kazuyuki Kumeno, Makoto Yasuda
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Publication number: 20170222830Abstract: A plurality of management cards including an active card and a standby card are provided. The active card determines open or block of a ring port in accordance with an event based on a ring protocol, issues an open instruction or a block instruction to a line card, and notifies a block factor in addition to the block instruction when issuing the block instruction. The line card controls open or block of the ring port in accordance with the open instruction or the block instruction and retains open/block information of the ring port and a block factor of the block state in a port management table. When the standby card is changed to the active card in accordance with a predetermined change instruction, it acquires the information retained in the port management table from the line card.Type: ApplicationFiled: June 24, 2016Publication date: August 3, 2017Inventor: Makoto YASUDA
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Publication number: 20170199480Abstract: An image forming apparatus includes a toner pattern bearer to bear a first toner pattern having a first image area rate and a second toner pattern having a second image area rate different from the first image area rate. A toner adhesion amount detector detects a toner adhesion amount of toner of each of the first toner pattern and the second toner pattern. A toner degradation rate calculator calculates a first deviation in the toner adhesion amount of the first toner pattern and a second deviation in the toner adhesion amount of the second toner pattern based on the toner adhesion amount detected by the toner adhesion amount detector. The toner degradation rate calculator compares the first deviation with the second deviation and calculates a toner degradation rate based on a comparison result.Type: ApplicationFiled: October 18, 2016Publication date: July 13, 2017Inventors: Mutsuki MORINAGA, Tadashi KASAI, Jun HITOSUGI, Takamasa OZEKI, Makoto YASUDA, Kunio HASEGAWA, Emiko SHIRAISHI, Hitoshi YAMAMOTO, Masahiko SHAKUTO, Tetsuya MUTO, Keiko KAJIMURA, Tomoya OHSUGI
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Publication number: 20170186649Abstract: A semiconductor device manufacturing method includes forming a silicon layer by epitaxial growth over a semiconductor substrate having a first area and a second area; forming a first gate oxide film by oxidizing the silicon layer; removing the first gate oxide film from the second area, while maintaining the first gate oxide film in the first area; thereafter, increasing a thickness of the first gate oxide film in the first area and simultaneously forming a second gate oxide film by oxidizing the silicon layer in the second area; and forming a first gate electrode and a second gate electrode over the first gate oxide film and the second gate oxide film, respectively, wherein after the formation of the first and second gate electrodes, the silicon layer in the first area is thicker than the silicon layer in the second area.Type: ApplicationFiled: March 16, 2017Publication date: June 29, 2017Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Makoto Yasuda, Taiji Ema, Mitsuaki Hori, Kazushi Fujita
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Patent number: 9685442Abstract: A semiconductor device including an insulating film in a first region of a semiconductor substrate; a first impurity region and a second impurity region of a first conductivity type, each of the regions including a part located deeper than the insulating film in contact with each other, and the insulating film being sandwiched by the first and second impurity regions in planar view in the first region of the semiconductor substrate; a metal silicide film on the first impurity region and in Schottky junction with the first impurity region; a first impurity of the first impurity region having a peak of a concentration profile deeper than a bottom of the insulating film; a second impurity of the second impurity region having a concentration higher than a concentration of the first impurity in a part of the first impurity region shallower than the bottom of the insulating film.Type: GrantFiled: October 16, 2015Date of Patent: June 20, 2017Assignee: FUJITSU SEMICONDUCTOR LIMITEDInventors: Kazushi Fujita, Taiji Ema, Makoto Yasuda, Mitsuaki Hori
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Patent number: 9684259Abstract: An image forming apparatus includes an image formation processor to perform image formation to a recording medium with a primary color toner and a secondary color toner that is different from the primary color toner, a database to store multiple setting values, each of which corresponding a combination of a mode type depending on the primary color toner and the secondary color toner and a media type of the recording medium and being applied to a process of the image formation performed by the image forming processor, a database retriever to retrieve an optimum setting value from the multiple setting values stored in the database according to a specified combination of the mode type and the media type, and an operation setting arranger to perform the image formation based on the optimum setting value acquired from the database retriever.Type: GrantFiled: December 16, 2015Date of Patent: June 20, 2017Assignee: Ricoh Company, Ltd.Inventors: Takatsugu Komori, Emiko Shiraishi, Tadashi Kasai, Takamasa Ozeki, Jun Hitosugi, Kunio Hasegawa, Makoto Yasuda, Wakana Itoh, Mutsuki Morinaga, Hitoshi Yamamoto
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Patent number: 9634021Abstract: A semiconductor device manufacturing method includes forming a silicon layer by epitaxial growth over a semiconductor substrate having a first area and a second area; forming a first gate oxide film by oxidizing the silicon layer; removing the first gate oxide film from the second area, while maintaining the first gate oxide film in the first area; thereafter, increasing a thickness of the first gate oxide film in the first area and simultaneously forming a second gate oxide film by oxidizing the silicon layer in the second area; and forming a first gate electrode and a second gate electrode over the first gate oxide film and the second gate oxide film, respectively, wherein after the formation of the first and second gate electrodes, the silicon layer in the first area is thicker than the silicon layer in the second area.Type: GrantFiled: June 9, 2015Date of Patent: April 25, 2017Assignee: FUJITSU SEMICONDUCTOR LIMITEDInventors: Makoto Yasuda, Taiji Ema, Mitsuaki Hori, Kazushi Fujita
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Patent number: 9599946Abstract: An image forming apparatus includes a latent image bearer, a developing device, a supplier, and a controller. The controller controls the supplier according to a detection result of a toner density by the toner density sensor and a toner density target value to adjust the toner density of developer in the developing device. The controller is configured to correct the toner density target value and an imaging condition affecting a toner adhesion amount of an output image separately from the toner density, according to a component adhesion deterioration degree being a deterioration degree of carrier due to adhesion of a toner component, obtained based on at least an average image area ratio of the output image, and a coating abrasion deterioration degree being a progression degree of deterioration due to coating abrasion of the carrier, obtained based on at least the average image area ratio of the output image.Type: GrantFiled: September 8, 2015Date of Patent: March 21, 2017Assignee: Ricoh Company, Ltd.Inventors: Mutsuki Morinaga, Tadashi Kasai, Jun Hitosugi, Takamasa Ozeki, Makoto Yasuda, Kunio Hasegawa, Emiko Shiraishi, Wakana Itoh, Takatsugu Komori, Hitoshi Yamamoto
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Patent number: 9590815Abstract: A first redundancy device and a second redundancy device connected to the first redundancy device are provided. A third switching device has a first link with a first port group of the first switching device and has no link with the second switching device. A fourth switching device has a second link with a first port group of the second switching device and has no link with the first switching device. Here, a communication between the first redundancy device and the second redundancy device is performed through the first link when the first link has no fault, and the communication is performed through the second link when the first link has a fault and the second link has no fault.Type: GrantFiled: May 7, 2015Date of Patent: March 7, 2017Assignee: Hitachi Metals, Ltd.Inventors: Makoto Yasuda, Shigeru Tsubota
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Patent number: 9588460Abstract: An image forming apparatus includes a latent image bearer, a developing device, a toner container, a toner feed connector, a processor, and a notifier. The developing device develops, with toner, a latent image on the latent image bearer. The toner container contains the toner. The toner container is detachably attachable to the image forming apparatus. The toner feed connector guides the toner of the toner container to the developing device. The information detector detects identification information including toner type information and maintenance contract information stored in the toner container. The processor determines whether the toner type information of the toner container coincides before and after replacement and whether the maintenance contract information of the toner container is matched with maintenance contract information of the image forming apparatus. The notifier indicates a determination made by the processor.Type: GrantFiled: November 9, 2015Date of Patent: March 7, 2017Assignee: Ricoh Company, Ltd.Inventors: Tadashi Kasai, Jun Hitosugi, Kunio Hasegawa, Takamasa Ozeki, Emiko Shiraishi, Wakana Itoh, Makoto Yasuda, Mutsuki Morinaga, Hitoshi Yamamoto
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Patent number: 9525609Abstract: A first fault monitoring unit monitors presence/absence of fault on a communication path between bridge ports, and a second fault monitoring unit monitors presence/absence of fault on a communication path via a ring network between upper link ports. A third fault monitoring unit monitors presence/absence of fault at a MCLAG port. When a monitoring result by the third fault monitoring unit changes from absence of fault to presence of fault, a MCLAG control unit transmits a fault notification frame. At this time, when a monitoring result by the first fault monitoring unit is absence of fault, the MCLAG control unit transmits the fault notification frame from the bridge port, and when the monitoring result by the first fault monitoring unit is presence of fault and a monitoring result by the second fault monitoring unit is absence of fault, it transmits the fault notification frame from the upper link port.Type: GrantFiled: April 10, 2015Date of Patent: December 20, 2016Assignee: Hitachi Metals, Ltd.Inventors: Makoto Yasuda, Shigeru Tsubota
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Patent number: 9525591Abstract: Each of MCLAG devices has a MCLAG table, a port control unit, and a relay processing unit. The MCLAG table retains one or a plurality of first ports in association with a first identifier. The port control unit controls a first port group to transmission/reception permitted state when the first port group is set to active, and controls the first port group to a transmission prohibited state when the first port group is set to standby. The relay processing unit relays a frame containing the first identifier as a destination port to the first port group when the first port group is controlled to the transmission/reception permitted state, and relays the same to a bridge port when the first port group is controlled to the transmission prohibited state.Type: GrantFiled: February 17, 2015Date of Patent: December 20, 2016Assignee: Hitachi Metals, Ltd.Inventors: Makoto Yasuda, Shigeru Tsubota
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Patent number: 9513594Abstract: A protective layer forming device, including: a powdery image bearer protecting agent formed of a granulated product containing a fatty acid metal salt and an inorganic lubricant; and a roller-shaped protecting agent supplying member configured to supply the powdery image bearer protecting agent to a surface of an image bearer.Type: GrantFiled: November 13, 2014Date of Patent: December 6, 2016Assignee: RICOH COMPANY, LTD.Inventors: Kunio Hasegawa, Hiroshi Nakai, Kenji Komito, Tadashi Kasai, Takamasa Ozeki, Jun Hitosugi, Makoto Yasuda, Emiko Shiraishi, Wakana Itoh, Takatsugu Komori, Mutsuki Morinaga, Hitoshi Yamamoto