Abstract: A driving method of a display panel is provided, including setting the first red, first green, first blue, second red, second green, and second blue multiplexed signals. In the 2i?1th multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is earlier than that controlled by the second red, the second green, and the second blue multiplexed signals. While In the 2ith multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is later than that controlled by the second red, the second green, and the second blue multiplexed signals. The method will eliminate the stripe feeling of the scream picture displayed on the display panel and so improve the display quality.

Abstract: A drive method for a display panel is provided. A first multiplex signal, a second multiplex signal, a third multiplex signal, a fourth multiplex signal, a fifth multiplex signal, and a sixth multiplex signal sequentially generate the high level pulse in the predetermined order in each of the first row periods of the (2i?1)th multiplex period. In addition, the first multiplex signal, the second multiplex signal, the third multiplex signal, the fourth multiplex signal, the fifth multiplex signal, and the sixth multiplex signal sequentially generate the high level pulse in a reverse order to the predetermined order in each of the second row periods of the (2i)th multiplex period. As a result, mura within the display picture of the display panel is eliminated to improve the display quality.

Abstract: The present disclosure provides a scan-driving circuit and a display device. The scan-driving circuit includes a plurality of series-connecting scan-driving units including an input circuit generating a pull-up control signal and a pull-down control signal; a latch circuit pulling up or pulling down a pull-up control signal point; a processing circuit generating a current scan-driving signal, a cache circuit driving an output of a current scan-driving signal, and a reset circuit clearing the pull-up control signal point. Therefore, it improves driving flexibility and reduces driving power consumption of the display device, and is beneficial to narrow bezel design.

Abstract: A scanning driving circuit includes a scanning-level-signal-generation module and a scanning-signal-output-module. The scanning-level-signal-generation module is configured to input an (N?1)th stage scanning signal, an (N+1)th stage scanning signal, and a reset signal, generate a scanning level signal based on the (N?1)th stage scanning signal, the (N+1)th stage scanning signal, and the reset signal, and hold the scanning level signal. The scanning-signal-output-module, connected to the scanning-level-signal-generation module, is configured to input a clock signal, and configured to output a scanning signal based in the scanning level signal and the clock signal.

Abstract: The present disclosure provides a scanning driving circuit and a display device. The scanning driving circuit includes a plurality of stages of scanning driving units in cascade connection. The plurality of stages of scanning driving units include a first stage scanning driving unit, a plurality of intermediate stage scanning driving units and a last stage scanning driving unit each including a forward and reverse scanning circuit configured to control the scanning driving circuit to forward scanning or reverse scanning, an input circuit configured to charge a pull-up control signal point, a latch circuit configured to latch a signal of the pull-up control signal point, an output circuit configured to generate a scanning driving signal, and a reset circuit configured to reset the pull-up control signal point, which reduces the number of signal lines, simplifies the signal line design, saves space and facilitates the narrow frame design.

Abstract: A pull-down circuit of a gate driving unit includes: a first thin film transistor having a first gate to which a scan direction signal is inputted, a first source and a first drain to which a clock signal is inputted; a second thin film transistor having a second gate coupled to the first source, a second source coupled to a pull-down control node and a second drain to which a first direct-current voltage is inputted; a third thin film transistor having a third gate to which a first control signal is inputted, a third source coupled to the pull-down control node and a third drain coupled to a second direct-current voltage; and a fourth thin film transistor having a fourth gate coupled to the pull-down control node, a fourth source coupled to an output node and a fourth drain coupled to the second direct-current voltage.

Abstract: A touch panel and a display device are disclosed, the touch panel includes a touch unit array, a plurality of touch switches, a plurality of touch wires, and an integrated circuit board, the touch switches are connected to the touch wires, the touch wires connect the touch units to the touch switches, wherein each of the touch units is connected to at least two of the touch wires that evenly distributed within each of the touch units.

Abstract: The present disclosure provides a scan-driving circuit and a liquid crystal display, which comprises a scan-level-signal-output module, a present-stage cascaded-signal-output module, and a present-stage scanning-signal-output module. The scan-level-signal-output module is used for generating a scanning level signal and for performing a latching operation on the scanning level signal. A forward/reverse scanning control signal is used for controlling the scanning drive unit be on a forward-driving mode or a reverse-driving mode.

Abstract: The present disclosure provides a scan-driving circuit and a display device. The scan-driving circuit includes a plurality of series-connecting scan-driving units including an input circuit generating a pull-up control signal and a pull-down control signal; a latch circuit pulling up or pulling down a pull-up control signal point; a processing circuit generating a current scan-driving signal, a cache circuit driving an output of a current scan-driving signal, and a reset circuit clearing the pull-up control signal point. Therefore, it improves driving flexibility and reduces driving power consumption of the display device, and is beneficial to narrow bezel design.

Abstract: A scan driving circuit, and an array substrate and a display panel having the scan driving circuit are disclosed. The scan driving circuit includes a plurality of cascaded scan driving units. Each scan driving unit includes an input unit and an output unit. The input unit receives the activation trigger signal, transmits to the output unit and controls the output units in a scanning state. The scan driving unit includes a scan signal modulation unit having at least two transistors. The transistors output a clock modulation signal according to a plurality of clock signals. The clock modulation signal includes at least two first voltages separated with predetermined duration. The output unit outputs scan driving signal from the scan signal output end according to the clock modulation signal. The scan signal includes two sub-scan signals to control pixel unit to receive image data within a scan cycle.

Abstract: A gate driver on array (GOA) circuit includes a plurality of stages of GOA units cascaded. A first control latch module, a signal processing module, and a second control latch module of an Nth stage GOA unit generate an Nth stage dipulse gate driving signal and an Nth stage cascade signal according to clock signals, and an (N?2)th or (N+2)th stage cascade signal. For the clock signals corresponding to adjacent two stages of the GOA units, a first clock signal is delayed for a predetermined period of time with respect to a second clock signal. The two dipulse gate driving signals generated by the adjacent two stages of the GOA units partially overlap.

Abstract: Disclosed is a GOA driving circuit, which includes: an input control module, a latch module, a processing module, and a buffer module. A clock control signal is not used to control the input control module, so that the load for generating the clock control signal and power consumption of the circuit can be effectively reduced.

Abstract: A liquid crystal panel driving circuit and a liquid crystal display device are provided. Every three sub-pixel unit columns are defined as a row cycle that comprises a first data line, a second data line, and a third data line coupled to a same data driving signal output line of the data driver via the switch unit. The switch unit is configured to control the first data line, the second data line, and the third data line to output data signals in different output orders.

Abstract: A GOA circuit includes GOA circuit units. Each GOA circuit has a holding module A first transistor and a second transistor in the holding module holds the voltage imposed on the first control node to be at high voltage level. Also, the transistors form a direct current passage between the first control node and a first fixed voltage at high voltage level so the voltage imposed on the first control node is not lowered due to electricity leakage. The GOA circuit unit can resolve the problem of easy leakage of electricity. When the scanning signals are output by the GOA circuit unit, the stability is highly ensured.

Abstract: The present disclosure provides a scanning driving circuit and a display device. The scanning driving circuit includes a plurality of stages of scanning driving units in cascade connection. The plurality of stages of scanning driving units include a first stage scanning driving unit, a plurality of intermediate stage scanning driving units and a last stage scanning driving unit each including a forward and reverse scanning circuit configured to control the scanning driving circuit to forward scanning or reverse scanning, an input circuit configured to charge a pull-up control signal point, a latch circuit configured to latch a signal of the pull-up control signal point, an output circuit configured to generate a scanning driving signal, and a reset circuit configured to reset the pull-up control signal point, which reduces the number of signal lines, simplifies the signal line design, saves space and facilitates the narrow frame design.

Abstract: A testing circuit includes at least one sub-circuit. The sub-circuit includes a first input end, at least one second input end, at least one third input end, and at least one driving output end. The first switch unit includes controllable switches. The second switch unit includes sub-units and first inverters. The sub-unit includes transmission gates. The control end of the controllable switch connects to the second input end, the first end connects to the first input end, and the second end connects to the input end of the transmission gate. The first control end of the transmission gate connects to the third input end and the input end of the first inverter, the second control end connects to the output end of the first inverter, the output end connects to the driving output end.

Abstract: The present disclosure relates to a display panel including a first substrate, a second substrate, a liquid crystal layer between the first substrate and the second substrate, a masking layer on the first substrate, a buffering layer arranged on the masking layer and the first substrate, a first semiconductor layer on the buffering layer, and an active layer on the first semiconductor layer and the buffering layer. The present disclosure also relates to a display device. With such configuration, the leakage current of the TFTs may be reduced, which also reduces the cross-talk and the flicker of the liquid crystal panel.

Abstract: The present invention provides a scan driving circuit utilized to drive cascading scan lines. The scan driving circuit comprises a pull-down control module, a pull-down module, a reset control module, a reset module, a lower transmission module, a first bootstrap capacitor, a constant low voltage source, and a constant high voltage source. By use of the deployment of the reset module, the scan driving circuit of the present invention improves the stability of the scan driving circuit and meanwhile, the structure of the whole scan driving circuit is simplified.

Abstract: A scanning driving circuit includes a scanning-level-signal-generation module and a scanning-signal-output-module. The scanning-level-signal-generation module is configured to input an (N?1)th stage scanning signal, an (N+1)th stage scanning signal, and a reset signal, generate a scanning level signal based on the (N?1)th stage scanning signal, the (N+1)th stage scanning signal, and the reset signal, and hold the scanning level signal. The scanning-signal-output-module, connected to the scanning-level-signal-generation module, is configured to input a clock signal, and configured to output a scanning signal based in the scanning level signal and the clock signal.

Abstract: Disclosed is a GOA driving circuit, which includes: an input control module, a latch module, a processing module, and a buffer module. A clock control signal is not used to control the input control module, so that the load for generating the clock control signal and power consumption of the circuit can be effectively reduced.