Abstract: A catheter assembly for inserting in a fluid filled space in a body includes a main body having a first end portion and a second end portion. The first end portion is positionable within the fluid filled space and the second end portion is adapted to extend outward from the fluid filled space when the first end portion is positioned within the fluid filled space. The catheter assembly also includes a catheter tip that is connected to the second end portion. The catheter tip includes a housing having a cavity defined therein. The catheter tip also includes a rotating element positioned within the cavity. The rotating element is configured to rotate within the cavity to facilitate movement of the first end portion of the main body within the fluid filled space.

Abstract: An apparatus and method for saving power during TLB searches is disclosed. In one embodiment, a TLB includes a CAM having a plurality of entries each storing a virtual address, and enable logic coupled to the CAM. Responsive to initiation of a TLB query by a thread executing on a processor that includes the TLB, the enable logic is configured to enable only those CAM entries that are associated with the initiating thread. Entries in the CAM not associated with the thread are not enabled. Accordingly, an initial search of the TLB for responsive to the query is conducted only in the CAM entries that are associated with the thread. Those CAM entries that are not associated with the thread are not searched. As a result, dynamic power consumption during TLB searches may be reduced.

Abstract: Embodiments for a processor that selectively enables and disables branch prediction are disclosed. The processor may include counters to track a number of fetched instructions, a number of branches, and a number of mispredicted branches. A misprediction threshold may be calculated dependent upon the tracked number of branches and a predefined misprediction ratio. Branch prediction may then be disabled when the number of mispredictions exceed the determined threshold value and dependent upon the branch rate.

Abstract: A data attribution system uses a unique identifier (UID) that uniquely identifies a particular individual. A search is conducted of different data sources and, different types of profile information associated with the UID is extracted from the data sources. The different types of profile information associated with the same UID is aggregated together and displayed in a same screen presentation on a user interface.

Abstract: Some novel features pertain to a memory controller that includes a memory controller logic, a built-in-self-tester (BIST) logic, and a switch. The memory controller logic is for controlling memory on a memory die. The built-in-self tester (BIST) logic is for testing the memory. The switch is coupled to the BIST logic and the memory. In some implementations, the BIST logic bypasses the memory controller logic when testing the memory by accessing the memory through the switch. The switch may be controlled by the BIST logic. In some implementations, the switch is coupled to the memory controller logic. The switch may control data to the memory that is transmitted from the memory controller logic and the BIST logic based on priority of the data.

Abstract: An apparatus and method for saving power during TLB searches is disclosed. In one embodiment, a TLB includes a CAM having a plurality of entries each storing a virtual address, and enable logic coupled to the CAM. Responsive to initiation of a TLB query by a thread executing on a processor that includes the TLB, the enable logic is configured to enable only those CAM entries that are associated with the initiating thread. Entries in the CAM not associated with the thread are not enabled. Accordingly, an initial search of the TLB for responsive to the query is conducted only in the CAM entries that are associated with the thread. Those CAM entries that are not associated with the thread are not searched. As a result, dynamic power consumption during TLB searches may be reduced.

Abstract: A data attribution system uses a unique identifier (UID) that uniquely identifies a particular individual. A search is conducted of different data sources and, different types of profile information associated with the UID is extracted from the data sources. The different types of profile information associated with the same UID is aggregated together and displayed in a same screen presentation on a user interface.

Abstract: A communication request from a contact center caller may be received in a contact center via any of a variety of communication devices equipped with any of a variety of operating systems, any of a variety of applications and with any of a variety of device capabilities. The communication request may also be received via any of the multiple different communication mediums. The contact center may have multiple agent devices logged in to the contact center. Agent devices logged in to the contact center may have different device capabilities. A system for dynamic contact center routing may route the communication request to an agent device based on device capabilities of a communication device used by the caller, and device capabilities of the agent device.

Abstract: Lamp assemblies for reducing headlamp condensation are disclosed. One example lamp assembly includes a lamp housing including a front housing and a rear housing forming a lamp cavity; a light source extending from the rear housing into the lamp cavity; a reflector extending around the light source; and a duct extending between the rear housing and the reflector from the light source to a remote section of the lamp cavity spaced from the light source. The duct can include a duct cavity configured to draw air from the remote section of the lamp cavity toward the light source to reduce condensation in the lamp cavity.

Abstract: Lamp assemblies for reducing headlamp condensation are disclosed. One example lamp assembly includes a lamp housing including a front housing and a rear housing forming a lamp cavity; a light source extending from the rear housing into the lamp cavity; a reflector extending around the light source; and a duct extending between the rear housing and the reflector from the light source to a remote section of the lamp cavity spaced from the light source. The duct can include a duct cavity configured to draw air from the remote section of the lamp cavity toward the light source to reduce condensation in the lamp cavity.

Abstract: Some novel features pertain to a memory controller that includes a memory controller logic, a built-in-self-tester (BIST) logic, and a switch. The memory controller logic is for controlling memory on a memory die. The built-in-self tester (BIST) logic is for testing the memory. The switch is coupled to the BIST logic and the memory. In some implementations, the BIST logic bypasses the memory controller logic when testing the memory by accessing the memory through the switch. The switch may be controlled by the BIST logic. In some implementations, the switch is coupled to the memory controller logic. The switch may control data to the memory that is transmitted from the memory controller logic and the BIST logic based on priority of the data.

Abstract: Bed Bugs Cimicidae (referred to as bedbugs) are small parasitic insect. The name “bed bug” is derived from the incest's preferred habitat of houses and especially beds. The most common type is Cimex Lectularius, species that prefer to feed on human blood or the blood of warm-blooded animals. There are numerous health effects due to bed bug. These include skin rashes and allergic symptoms. These nocturnal insects can feed unnoticed on their hosts. Vetiver Chrysopogon zizanioides, commonly known as Vetiver, is a perennial grass of the Poaceae family, native to India. In western and northern India, it is popularly known as khus. This grass is known to grow up to 1.5 meters high and forms clumps as wide. Vetiver oil can be extracted from Vetiver roots. Normally, Vetiver is commonly used for cattle feed, aromatherapy, perfumes, soil erosion protection, ropes and handicrafts.

Abstract: A user correlation system uses aggregated data and matching/comparison in order to assign an association score that determines likelihood that unique identifiers are associated with the same user.

Abstract: A computer-implemented method for updating multiple data records in a database in a single transaction. The method includes searching a data model associated with the data records in the database for fields related to an objective. Once complete, a user will enter new objective values associated with the objective. The processor then performs a business rule validation of the fields found during the searching step with the new objective values entered. The report is then displayed to a user on a display. The user reviews the report and may approve the new objective values. If approved, the finalized objective values are applied to the database.

Abstract: This patent covers the any use of vetiver roots material to provide shade, cooling and humidifying effect to any indoor or outdoor area. The use of vetiver root material could be in form of a mat, carpet or rug, however, not limited to them in their use to provide cooling and humidifying effect. A wet or dry mat using vetiver roots is placed in path of any natural or forced air to cool the air that is passing through. The air may be naturally flowing or forced via fan through the mat to provide cooling effect as well as cleaning effect. The patent also covers the use of water with the vetiver mat to provide additional cooling and humidity. The solution significantly reduces energy consumption.

Abstract: Determining an effective address of a memory with a three-operand add operation in single execution cycle of a multithreaded processor that can access both segmented memory and non-segmented memory. During that cycle, the processor determines whether a memory segment base is zero. If the segment base is zero, the processor can access a memory location at the effective address without adding the segment base. If the segment base is not zero, such as when executing legacy code, the processor consumes another cycle to add the segment base to the effective address. Similarly, the processor consumes another cycle if the effective address or the linear address is misaligned. An integer execution unit that performs the three-operand add using a carry-save adder coupled to a carry look-ahead adder. If the segment base is not zero, the effective address is fed back through the integer execution unit to add the segment base.

Abstract: A microprocessor capable of decoding a plurality of instructions associated with a plurality of threads is disclosed. The microprocessor may comprise a first array comprising a first plurality of microcode operations associated with an instruction from within the plurality of instructions, the first array capable of delivering a first predetermined number of microcode operations from the first plurality of microcode operations. The microprocessor may further comprise a second array comprising a second plurality of microcode operations, the second array capable of providing one or more of the second plurality of microcode operations in the event that the instruction decodes into more than the first predetermined number of microcode operations. The microprocessor may further comprise an arbiter coupled between the first and second arrays, where the arbiter may determine which thread from the plurality of threads accesses the second array.

Abstract: A user correlation system uses aggregated data and matching/comparison in order to assign an association score that determines likelihood that unique identifiers are associated with the same user.

Abstract: A system and method for reducing branch misprediction penalty. In response to detecting a mispredicted branch instruction, circuitry within a microprocessor identifies a predetermined condition prior to retirement of the branch instruction. Upon identifying this condition, the entire corresponding pipeline is flushed prior to retirement of the branch instruction, and instruction fetch is started at a corresponding address of an oldest instruction in the pipeline immediately prior to the flushing of the pipeline. The correct outcome is stored prior to the pipeline flush. In order to distinguish the mispredicted branch from other instructions, identification information may be stored alongside the correct outcome. One example of the predetermined condition being satisfied is in response to a timer reaching a predetermined threshold value, wherein the timer begins incrementing in response to the mispredicted branch detection and resets at retirement of the mispredicted branch.

Abstract: A multithreaded processor with a banked cache is provided. The instruction set includes at least one atomic operation which is executed in the L2 cache if the atomic memory address source data is aligned. The core executing the instruction determines whether the atomic memory address source data is aligned. If it is aligned, the atomic memory address is sent to the bank that contains the atomic memory address source data, and the operation is executed in the bank. In one embodiment, if the instruction is mis-aligned, the operation is executed in the core.