Patents by Inventor Manish Singh

Manish Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8958337
    Abstract: A network device determines whether the network device has a local link for a link aggregation group (LAG), and identifies, when the network device has a local link for the LAG, the network device as a designated forwarder for the LAG. The network device also identifies, when the network device does not have a local link for the LAG, a closest network device to the network device, with a local link for the LAG, as the designated forwarder for the LAG.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: February 17, 2015
    Assignee: Juniper Networks, Inc.
    Inventors: Shankar Ramanathan, Srinivas Chinnam, Manish Singh, Harshad Nakil
  • Publication number: 20140362736
    Abstract: A network device determines whether the network device has a local link for a link aggregation group (LAG), and identifies, when the network device has a local link for the LAG, the network device as a designated forwarder for the LAG. The network device also identifies, when the network device does not have a local link for the LAG, a closest network device to the network device, with a local link for the LAG, as the designated forwarder for the LAG.
    Type: Application
    Filed: August 25, 2014
    Publication date: December 11, 2014
    Inventors: Shankar RAMANATHAN, Srinivas Chinnam, Manish Singh, Harshad Nakil
  • Publication number: 20140237017
    Abstract: The system provides energy-efficiency of computing nodes in a cluster such that application level compatibility is maintained with legacy programs. This enables clusters to grow in computer capability while optimizing and managing expenses in energy usage, cooling infrastructure and real estate costs. The present technology may leverage existing purpose built parallel processing hardware, such as for example GPU hardware cards, with software to provide the functionality discussed herein. The present technology may create and add to an existing Hadoop cluster, or other distributed data processing framework, an augmented data node with enhanced compute per watt capability using off the shelf parallel processing hardware (e.g., GPU cards) while preserving the application level compatibility with the framework infrastructure.
    Type: Application
    Filed: February 13, 2014
    Publication date: August 21, 2014
    Applicant: mParallelo Inc.
    Inventors: Sanjay Adkar, Bogdan Mitu, Manish Singh
  • Patent number: 8604167
    Abstract: An immunogen includes an isolated peptide that includes the amino sequence of any one of SEQ ID NOs:1-21 with four or fewer amino acid substitutions.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: December 10, 2013
    Assignee: ImmunoCellular Therapeutics, Ltd.
    Inventors: Manish Singh, James Bender
  • Patent number: 8516059
    Abstract: A system, method, and computer program product are provided for communicating automatic response messages based on a policy. In use, use of an automatic message generator utilized for automatically responding to receipt of a first message using a second message is identified. Additionally, it is determined whether a characteristic of at least one of the first message and the second message violates a predetermined policy. Furthermore, the second message is conditionally communicated based on the determination.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: August 20, 2013
    Assignee: McAfee, Inc.
    Inventors: Manish Singh, Srikanth Chowdary Marri, Rajesh Shinde
  • Publication number: 20130157718
    Abstract: A portable electronic device, a method and a non-transitory computer-readable media are provided for enabling a device to determine if it is lost or stolen. The device includes a processing unit and a memory, at least two sensors connected to the processing unit, a data acquisition module for polling at least one of the sensors and storing the related information that it polls in the memory, a pattern-seeking module for processing the information to determine a threshold, and a comparator for comparing the information to the threshold. When the device has reached the threshold, it changes to an active state where it can do various tasks.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 20, 2013
    Applicant: Intel Mobile Communications GmbH
    Inventors: James A. Johanson, III, Manish A. Singh
  • Patent number: 8385199
    Abstract: Adaptive traffic shaping techniques, apparatuses, and systems can include obtaining information that associates mobile devices with wireless network areas handling wireless communications with the mobile devices and influencing data flow transmissions to the mobile devices associated with the wireless network areas based at least on the obtained information. Adaptive traffic shaping can include determining loading factors for the wireless network areas based on the associations. Techniques, apparatuses, and systems can control data flows to the mobile devices based on associated loading factors.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: February 26, 2013
    Assignee: Radisys Corporation
    Inventors: Michael Hamilton Coward, Manish Singh, Renuka Bhalerao
  • Patent number: 8383768
    Abstract: An immunogen includes an isolated peptide that includes the amino sequence of any one of SEQ ID NOs:1-21 with four or fewer amino acid substitutions.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: February 26, 2013
    Assignee: ImmunoCellular Therapeutics, Ltd.
    Inventors: Manish Singh, James Bender
  • Publication number: 20110119779
    Abstract: The invention provides methods and compositions for generating non-human transgenic cells and organisms that are transgenic at one or more gene sequences by separately recombining fragments of a complete gene in temporal sequence. According to the methods of the invention, a set of DNA constructs containing a non-endogenous DNA sequence flanked and/or operably linked at its ends by sequences from the non-human organism are generated by recombination in a bacterial cell, for example, in E. coli. The DNA constructs that are produced can then be introduced into a non-human homologous recombination competent cell where successive cells will contain recombined segments of a target gene, with the ultimate cell in a line containing an endogenous target gene completely replaced by genomic DNA of another species.
    Type: Application
    Filed: December 10, 2008
    Publication date: May 19, 2011
    Applicant: ALIVA BIOPHARMACEUTICALS, INC.
    Inventors: Hiroaki Shizuya, Manish Singh, Cecilia Roh
  • Publication number: 20100310643
    Abstract: An immunogen includes an isolated peptide that includes the amino sequence of any one of SEQ ID NOs:1-21 with four or fewer amino acid substitutions.
    Type: Application
    Filed: May 7, 2010
    Publication date: December 9, 2010
    Inventors: Manish Singh, James Bender
  • Patent number: 7810031
    Abstract: An email generation method and system. The method comprises receiving and storing by a computing system, a first data object. The computing system comprises XML files. Each XML file comprises email templates. The computing system receives language identification data identifying a first XML file of the XML files. The first XML file comprises a first set of email templates. The computing system selects the first XML file in response to receiving the first language identification data. The computing system receives template identification data identifying a first email template of the first set of email templates. The computing system selects the first email template in response to receiving the template identification data. The computing system retrieves the first data object stored in the computing system. The computing system automatically generates a first email by incorporating first portions of the first data object into associated sections of the first email template.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Andrew Coleman, Gautam Majumdar, Muthusamy Palanisamy Muthusamy, Manish Singh
  • Publication number: 20080098073
    Abstract: An email generation method and system. The method comprises receiving and storing by a computing system, a first data object. The computing system comprises XML files. Each XML file comprises email templates. The computing system receives language identification data identifying a first XML file of the XML files. The first XML file comprises a first set of email templates. The computing system selects the first XML file in response to receiving the first language identification data. The computing system receives template identification data identifying a first email template of the first set of email templates. The computing system selects the first email template in response to receiving the template identification data. The computing system retrieves the first data object stored in the computing system. The computing system automatically generates a first email by incorporating first portions of the first data object into associated sections of the first email template.
    Type: Application
    Filed: October 24, 2006
    Publication date: April 24, 2008
    Inventors: Andrew Coleman, Gautam Majumdar, Muthusamy Palanisamy Muthusamy, Manish Singh
  • Patent number: 7325207
    Abstract: The method and apparatus for analysis of integrated circuits using static timing analysis. For a circuit being analyzed, the value of the state net for the case of an undriven sensitization is resolved to a Hi/Lo logic on the output net and the sensitization is added to the appropriate pull-up/pull-down function on the output net. Furthermore, in the sensitization generation, the “present” state logic function at the output net is determined by the “previous” state variable of the sequential state net and the “present” state variables of the rest of the inputs to the sequential circuit. The “next” state logic function at the output net is determined by the “present” state variable of the sequential state net and the “next” state variables of the rest of the inputs to the sequential circuit. This variable is resolved as a function of “previous” state net variable and “present” state input net variables.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: January 29, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Bhaskar Subramanian, Manish Singh
  • Patent number: 7225434
    Abstract: A method to collect address trace of instructions executed by a processor has been disclosed. An embodiment of the method includes receiving a software program having a set of instructions and performing instrumentation on the software program to determine addresses of the instructions of the software program in the order in which the instructions are executed by a processor.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: May 29, 2007
    Assignee: Intel Corporation
    Inventors: Rangarajan R. Calyanakoti, Veerasham Bukka, Manish Singh, Brian James Pollard
  • Patent number: 7189410
    Abstract: This invention provides a fibrin sealant bandage, wherein said fibrin sealant may be supplemented with at least one composition selected from, for example, one or more regulatory compounds, antibody, antimicrobial compositions, analgesics, anticoagulants, antiproliferatives, anti-inflammatory compounds, cytokines, cytotoxins, drugs, growth factors, interferons, hormones, lipids, demineralized bone or bone morphogenetic proteins, cartilage inducing factors, oligonucleotides polymers, polysaccharides, polypeptides, protease inhibitors, vasoconstrictors or vasodilators, vitamins, minerals, stabilizers and the like. Also disclosed are methods of preparing and/or using the unsupplemented or supplemented fibrin sealant bandage.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 13, 2007
    Assignee: The American National Red Cross
    Inventors: William N. Drohan, Martin J. MacPhee, Wilson H. Burgess, Hernan Nunez, Manish Singh, Gene Liau, Thomas Maciag
  • Patent number: 7143021
    Abstract: A machine-implemented, simulations-supporting system creates a hierarchy of data structures for simplifying the task of identifying iso-topological, and iso-geometric, and iso-static instances of subcircuit-definitions. The behaviors of such isomorphic and iso-static instances can be simultaneously predicted by appointing a simulation leader for them and using the simulation leader in combination with a respective simulation model to predict the behavior of the simulation leader. The predicted behavior of the leader is then copied for the followers. In one embodiment, state-describing S-circuit cards each point to a respective, and possibly merged, I-circuit card. The I-circuit cards each point to respective, and possibly merged, element instantiating cards (AG-cards) as well as to respective, and possibly merged, interconnect-topology describing cards (T-circuits).
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: November 28, 2006
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bruce W. McGaughy, Prashant Karhade, Peng Wan, Manish Singh
  • Patent number: 7134105
    Abstract: A method and apparatus for improved formal equivalence checking to verify the operation of components in a VLSI integrated circuit. The present invention enhances previous techniques for dynamic circuits by generating a multi-level transistor abstraction for dynamic circuits. Two-levels of abstracted code are generated. First, an abstracted legal Verilog® is generated for the evaluate phase of a dynamic circuit. Second, “comment-logic” in Verilog® syntax is generated for the pre-charge phase of the dynamic circuit. Using the method and apparatus of the present invention, it is possible to obtain a multi-level transistor abstraction for both the “clk=0” and the “clk=1” conditions. The binary decision diagram property of the circuit being analyzed is used to generate multi-level representations for both the pre-charge (clk=0) and the evaluate phases (clk=1). The multi-level abstracted model of the present invention has several advantages over the prior art.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: November 7, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Manish Singh, Arun Chandra
  • Patent number: 7133997
    Abstract: A method, apparatus, and system for configuring an address bit in a cache formed on an integrated circuit. The method, apparatus, and system include the ability to configure the address bit as either a tag bit or a set index bit and reconfigure the address bit.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: November 7, 2006
    Assignee: Intel Corporation
    Inventor: Manish Singh
  • Patent number: D587941
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: March 10, 2009
    Assignee: ABM Group, Inc.
    Inventor: Manish Singh
  • Patent number: D590642
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: April 21, 2009
    Assignee: ABM Group, Inc.
    Inventor: Manish Singh