Abstract: A dense array of semiconductor devices having an array of micro-reflectors, the micro-reflectors having characteristics that enhance dense packing of the array in balance with collection and collimation of the array's radiant output.

Abstract: The invention consists of a camera, light sources, lenses and software algorithms that are used to image and inspect semiconductor structures, including through infrared radiation. The use of various configurations of solid state lighting and software algorithms enhances the imaging and inspection.

Abstract: The present invention provides an optical system having an array of light emitting semiconductor devices to performing an operation that have multiple characteristics associated with performing the operation. The array includes at least one detector located within the array to selectively monitor multiple characteristics of the light emitting semiconductor devices and is configured to generate a signal corresponding to the selected characteristic. A controller is configured to control the light emitting semiconductor devices in response to the signal from the at least one detector. At least one of the multiple characteristics may be concentrated at an area of the array and the at least one detector may be located within the array at the area of the array to selectively monitor characteristic that is concentrated at the area of the array.

Abstract: A method and apparatus are provided for implementing automated electronic package transmission line characteristic impedance verification. A sinusoidal voltage source is coupled to a transmission line test structure for generating a selected frequency. Impedance measuring circuitry is coupled to the transmission line test structure for measuring an input impedance with an open-circuit termination and a short-circuit termination. Characteristic impedance calculation circuitry is coupled to the impedance measuring circuitry receiving the input impedance measured values for the open-circuit termination and the short-circuit termination for calculating characteristic impedance. Logic circuitry is coupled to the characteristic impedance calculation circuitry for comparing the calculated characteristic impedance with threshold values for verifying acceptable electronic package transmission line characteristic impedance.

Abstract: The present invention provides an optical array module that includes a plurality of semiconductor devices mounted on a thermal substrate formed with a plurality of openings that function as micro-reflectors, wherein each micro-reflector includes a layer of reflective material to reflect light. Such material preferably is conductive so as to provide electrical connection for its associated semiconductor device.

Abstract: The invention relates to an automated transaction machine of the recycling currency type. The machine permits a merchant to both store and withdraw cash. The machine also permits a customer to withdraw cash. The automated transaction machine includes a chest portion and a top hat portion. The portions have a front side and a rear side. The rear side of the machine is primarily intended for use by the merchant. The front side of the machine is primarily intended for use by a customer. The merchant side of the chest portion includes an inlet opening for inserting cash and an outlet opening for dispensing cash. The customer side of the chest portion also includes an outlet opening for dispensing cash. The top hat portion includes a separate user interface on the merchant side and a separate user interface on the customer side. The machine provides for the safekeeping of excess cash from a merchant's business operations.

Abstract: Methods and apparatus are provided for implementing silicon wafer chip carrier passive devices including customized silicon capacitors and resistors mounted directly on a module or carrier package. A plurality of system design inputs is received for a package arrangement. A respective physical design is generated for customized passive devices, a logic chip, and a chip carrier. Silicon devices are fabricated utilizing the generated respective physical design for customized passive devices and the logic chip and a carrier package is fabricated. The fabricated silicon devices are assembled on the carrier package.

Abstract: The invention relates to a self-service automated transaction machine that permits an authorized user to perform transactions therewith based on facial recognition. Examples of transactions include withdrawing cash, depositing cash, and exchanging cash. The machine includes a plurality of cameras from which plural facial images are captured in determining whether to grant machine access to an individual adjacent the machine.

Abstract: For use in a data processor comprising an instruction execution pipeline comprising N processing stages, a system and method of encoding constant operands is disclosed. The system comprises a constant generator unit that is capable of generating both short constant operands and long constant operands. The constant generator unit extracts the bits of a short constant operand from an instruction syllable and right justifies the bits in an output syllable. For long constant operands, the constant generator unit extracts K low order bits from an instruction syllable and T high order bits from an extension syllable. The right justified K low order bits and the T high order bits are combined to represent the long constant operand in one output syllable. In response to the status of op code bits located within a constant generation instruction, the constant generator unit enables and disables multiplexers to automatically generate the appropriate short or long constant operand.

Abstract: A high-intensity light source is formed by a micro array of a semiconductor light source such as a LEDs, laser diodes, or VCSEL placed densely on a liquid or gas cooled thermally conductive substrate. The semiconductor devices are typically attached by a joining process to electrically conductive patterns on the substrate, and driven by a microprocessor controlled power supply. An optic element is placed over the micro array to achieve improved directionality, intensity, and/or spectral purity of the output beam. The light module may be used for such processes as, for example, fluorescence, inspection and measurement, photopolymerzation, ionization, sterilization, debris removal, and other photochemical processes.

Abstract: Method and system for routing fibre channel frames using a fibre channel switch element is provided. The method includes, inserting a time stamp value in a fibre channel frame that is received at a receive segment of the fibre channel switch element; determining if a timeout occurs after a frame arrives at a receive buffer; and processing the frame if the timeout occurred. The method also includes, determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data; subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fibre channel switch element. A timeout checker circuit declares a timeout after comparing a time stamp value that is inserted in a fibre channel frame with a programmed time out value and a global counter value.

Abstract: A method and system for distributing credit using a fibre channel switch element is provided. The switch element includes, a wait threshold counter that is used to set up a status for a port that has to wait for certain duration to send a frame due to lack of buffer to buffer credit; a credit module that controls buffer to buffer credit for a transmit segment of the fibre channel switch element; and a virtual lane credit module with a counter that is incremented every time a frame assigned to a virtual lane is sent and decreased every time a VC_RDY is received. The method includes, determining if a VC_RDY primitive is received; and allocating credit to a virtual lane that is not at its maximum credit, after the VC_RDY primitive is received.

Abstract: A method of photographing a simulated activity includes a stable photographic platform that enables an individual to safely mount an item of equipment or a safety surface adjacent the item of equipment so that a photograph may be taken. The item of equipment may be positioned in concealing relation to a structure that supports the item of equipment or the safety surface. The posing individual or the clothing of the posing individual may also conceal the support structure. Alternatively, the support structure and the safety surface may be unconcealed but disguised as a natural element of a photographed scene, such as a rail in a skateboard park. The result is a photograph of an activity where the individual and the equipment appear to be precariously positioned or even suspended in the air with no apparent support. No part of the equipment or individual is cropped from the photograph.

Abstract: There is described a cache memory system including a first cache memory and a second cache memory. A first port is arranged to receive a request for a first item and determine whether the first item is in the first cache memory. A second port is arranged to receive a request for a second item and determine whether the second item is in the second cache memory. The system is arranged such that if the second item is determined not to be in the second cache memory, a request for the second item is sent to the first port. There is also described a method of accessing multiple items from a memory which has associated with it a first cache memory having a first port and a second cache memory having a second port.

Abstract: A method, apparatus, system, and signal-bearing medium that in an embodiment select a subset of transmission line models based on bounding electrical criteria. The bounding electrical criteria may include combinations of maximum and minimum values and in an embodiment may also include nominal values. Models that meet the bounding electrical criteria may be used in modeling the transmission line while models that do not meet the bounding electrical criteria are not used.

Abstract: Methods and apparatus are disclosed for improved via utilization on printed wiring boards (PWB). A via in a PWB typically transfers a single electrical signal from one signal plane to another wiring plane on the PWB. The present invention provides for more than a single signal to be transferred through a single via having a conducting wall. The conducting wall of the via is divided into more than one conducting portion, each portion capable of conducting a signal from one signal plane to another signal plane.

Abstract: There is disclosed a data processor comprising: 1) an instruction execution pipeline comprising N processing stages for executing a load instruction; 2) a status register for storing a modifiable configuration value, the modifiable configuration value having a first value indicating the data processor is capable of executing a misaligned access handling routine and a second value indicating the data processor is not capable of executing a misaligned access handling routine; 3) a misalignment detection circuit for determining if the load instruction performs a misaligned access to a target address of the load instruction and, in response to a determination that the load instruction does perform a misaligned access, generating a misalignment flag; and 4) exception control circuitry capable of detecting the misalignment flag and in response thereto determining if the modifiable configuration value is equal to the first value.

Abstract: An automated canister reloading machine is able to reload a currency canister removed from an ATM. The reloading machine includes a supply of currency notes. The reloading machine can transfer currency notes from the supply into a storage area of the canister. The canister includes a memory that can store data representative of information concerning the canister, such as data representative of the type and number of currency notes held in the canister. The reloading machine is able to update the canister memory.

Abstract: There is disclosed a data processor having a clustered architecture that comprises a plurality of clusters and an interrupt and exception controller. Each of the clusters comprises an instruction execution pipeline having N processing stages. Each of the N processing stages is capable of performing at least one of a plurality of execution steps associated with instructions being executed by the clusters. The interrupt and exception controller operates to (i) detect an exception condition associated with one of the executing instructions, wherein this executing instruction issued at time t0, and (ii) generate an exception in response to the exception condition upon completed execution of earlier ones of the executing instructions, these earlier executing instructions issued at time preceding t0.

Abstract: A method and structure are provided for implementing enhanced differential signal trace routing in a printed circuit board. The structure includes a differential signal trace pair and a differential pair via arrangement including a pair of vias. The pair of vias is coupled to the differential signal trace pair for routing the differential signal trace pair between first and second layers of the PCB. The vias are laterally offset by a predefined spacing sharing overlapping clearance holes and are diagonally oriented to allow minimal separation of the differential signal trace pair and matched signal trace lengths of the differential signal trace pair.